Commit 8480341
committed
feat(boards): add the Waveshare ESP32-S3-RS485-CAN
Requested in #53; already running in the field per #22. ESP32-S3 with 8MB
PSRAM and 16MB flash, an isolated RS485 front end, DIN-rail mounting and a
7-36V input — so it can share the CCA's supply instead of needing a USB
brick. The full profile fits with room to spare: web UI, the whole 8MB
history partition, and BLE without a repartition (the 16MB table's 3MB OTA
slots already exceed the 2.25MB the BLE build needs on the 8MB boards).
The board's one trap is the transceiver enable. GPIO21 drives DE and /RE
of the SP3485EN as a single net, and it floats at reset, so a config that
sets only tx_pin/rx_pin comes up with the *receiver* disabled and reads
zero bytes off the bus forever — no frames, no checksum errors, just
`Buffer: 0 bytes`. That is exactly what #22 looked like. The board file
holds the pin low, which also disables the driver: the same hardware
read-only guarantee the wiring guide gets from strapping a discrete
MAX485, and better than the T-CAN485 can offer.
That polarity is the opposite of the T-CAN485's three enables, and the
config builder emitted `restore_mode: ALWAYS_ON` unconditionally — which
would have generated a config that boots deaf. gpioSwitches entries now
carry an optional restore_mode, defaulting to ALWAYS_ON so the T-CAN485 is
untouched. Both directions are covered by tests.
Verified: `esphome config` and `esphome compile` clean on the example
(40.4% of a 3MB slot); 52 site tests pass; docs build with valid links.
Not bench-tested here — no maintainer unit — so the pin map rests on
Waveshare's schematic plus the working install in #22.1 parent 24c3445 commit 8480341
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