fix: set RBLN_CTX_STANDALONE to False

rebel-eunji · web-flow · commit 67d853368112 · 2026-02-23T23:36:05.000+09:00
diff --git a/vllm_rbln/platform.py b/vllm_rbln/platform.py
@@ -135,7 +135,7 @@ def validate_and_setup_prerequisite(cls, vllm_config: VllmConfig) -> None:
                     "RBLN_PROFILER is not supported when using vLLM model parallel "
                     "(TP, DP, EP, or PP)."
                 )
-            os.environ["RBLN_CTX_STANDALONE"] = "1"
+            os.environ["RBLN_CTX_STANDALONE"] = "0"
             os.environ["RBLN_FORCE_CCL_ASYNC"] = "1"
 
     @classmethod

Original file line number	Diff line number	Diff line change
`@@ -135,7 +135,7 @@ def validate_and_setup_prerequisite(cls, vllm_config: VllmConfig) -> None:`
`135`	`135`	`"RBLN_PROFILER is not supported when using vLLM model parallel "`
`136`	`136`	`"(TP, DP, EP, or PP)."`
`137`	`137`	`)`
`138`		`- os.environ["RBLN_CTX_STANDALONE"] = "1"`
	`138`	`+ os.environ["RBLN_CTX_STANDALONE"] = "0"`
`139`	`139`	`os.environ["RBLN_FORCE_CCL_ASYNC"] = "1"`
`140`	`140`
`141`	`141`	`@classmethod`