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Merge pull request #4 from AMD-Lightning-Internal/amd/dev/msearles/merge-amd-develop
merge amd-develop into amd-staging
2 parents 4476d03 + d72d817 commit 52afdc1

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README.md

+15
Original file line numberDiff line numberDiff line change
@@ -277,3 +277,18 @@ creating a pull request or raising an issue on GitHub.
277277
As mentioned earlier there are branches `llvm_release_*` that get backported
278278
changes. Those changes if exists are released automatically by github CI on
279279
monthly basis in a format `<llvm_major>.<llvm_minor>.<latest patch +1>`.
280+
281+
## Deprecation of "preview extensions"
282+
283+
In a case if a "preview extension" has to be deprecated, as the first step one
284+
should disable support for forward translation of the extension in the main branch
285+
(this will prevent new SPIR-V modules from being generated using the extension).
286+
Meanwhile support reverse translation for the extension should be continued
287+
(this retains compatibility with existing SPIR-V modules).
288+
* Addition of deprecation warning for the extension is not required.
289+
* We encourage backporting the changes to other branches to speed up removal, but this is not required.
290+
291+
After at least one release cycle one may remove support for reverse translation in the main branch as well,
292+
at which point support for the "preview extension" is considered removed.
293+
294+
These are guidelines, not requirements, and we will consider exceptions on a case-by-case basis.

include/LLVMSPIRVExtensions.inc

+2-1
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ EXT(SPV_INTEL_global_variable_fpga_decorations)
6464
EXT(SPV_INTEL_complex_float_mul_div)
6565
EXT(SPV_INTEL_split_barrier)
6666
EXT(SPV_INTEL_masked_gather_scatter)
67-
EXT(SPV_INTEL_tensor_float32_rounding)
67+
EXT(SPV_INTEL_tensor_float32_conversion)
6868
EXT(SPV_EXT_relaxed_printf_string_address_space)
6969
EXT(SPV_INTEL_fpga_argument_interfaces)
7070
EXT(SPV_INTEL_fpga_latency_control)
@@ -76,3 +76,4 @@ EXT(SPV_INTEL_maximum_registers)
7676
EXT(SPV_INTEL_bindless_images)
7777
EXT(SPV_INTEL_2d_block_io)
7878
EXT(SPV_INTEL_subgroup_matrix_multiply_accumulate)
79+
EXT(SPV_KHR_bfloat16)

lib/SPIRV/LLVMToSPIRVDbgTran.cpp

+89-4
Original file line numberDiff line numberDiff line change
@@ -1208,14 +1208,24 @@ LLVMToSPIRVDbgTran::transDbgGlobalVariable(const DIGlobalVariable *GV) {
12081208
Ops.push_back(transDbgEntry(StaticMember)->getId());
12091209

12101210
// Check if Ops[VariableIdx] has no information
1211-
if (isNonSemanticDebugInfo() && Ops[VariableIdx] == getDebugInfoNoneId()) {
1211+
if (isNonSemanticDebugInfo()) {
12121212
// Check if GV has an associated GVE with a non-empty DIExpression.
12131213
// The non-empty DIExpression gives the initial value of the GV.
12141214
for (const DIGlobalVariableExpression *GVE : DIF.global_variables()) {
12151215
if ( // GVE matches GV
12161216
GVE->getVariable() == GV &&
12171217
// DIExpression is non-empty
12181218
GVE->getExpression()->getNumElements()) {
1219+
if (Ops[VariableIdx] != getDebugInfoNoneId()) {
1220+
#ifdef SPIRV_HAS_DIOP_DIEXPRESSION
1221+
if (GVE->getExpression()->holdsNewElements()) {
1222+
Ops.resize(MaxOperandCount, getDebugInfoNoneId());
1223+
Ops[DIOpBasedExprIdx] =
1224+
transDbgExpression(GVE->getExpression())->getId();
1225+
}
1226+
#endif
1227+
break;
1228+
}
12191229
// Repurpose VariableIdx operand to hold the initial value held in the
12201230
// GVE's DIExpression
12211231
Ops[VariableIdx] = transDbgExpression(GVE->getExpression())->getId();
@@ -1608,21 +1618,96 @@ LLVMToSPIRVDbgTran::transDbgLocalVariable(const DILocalVariable *Var) {
16081618

16091619
// DWARF Operations and expressions
16101620

1621+
template <>
1622+
void LLVMToSPIRVDbgTran::transDIOpOperand(SPIRVWordVec &Vec, unsigned Idx,
1623+
llvm::Type *Ty) {
1624+
Vec[Idx] = SPIRVWriter->transType(Ty)->getId();
1625+
}
1626+
1627+
template <>
1628+
void LLVMToSPIRVDbgTran::transDIOpOperand(SPIRVWordVec &Vec, unsigned Idx,
1629+
uint32_t UInt) {
1630+
Vec[Idx] = UInt;
1631+
if (isNonSemanticDebugInfo())
1632+
transformToConstant(Vec, {Idx});
1633+
}
1634+
1635+
template <>
1636+
void LLVMToSPIRVDbgTran::transDIOpOperand(SPIRVWordVec &Vec, unsigned Idx,
1637+
llvm::ConstantData *Data) {
1638+
Vec[Idx] = SPIRVWriter->transConstant(Data)->getId();
1639+
}
1640+
16111641
SPIRVEntry *LLVMToSPIRVDbgTran::transDbgExpression(const DIExpression *Expr) {
16121642
SPIRVWordVec Operations;
1643+
1644+
#ifdef SPIRV_HAS_DIOP_DIEXPRESSION
1645+
if (auto NewElems = Expr->getNewElementsRef()) {
1646+
if (!(BM->allowExtraDIExpressions() ||
1647+
BM->getDebugInfoEIS() == SPIRVEIS_NonSemantic_Shader_DebugInfo_200))
1648+
report_fatal_error(
1649+
llvm::Twine("unsupported DIOp-based opcode found in DIExpression"));
1650+
1651+
for (DIOp::Variant DIOp : *NewElems) {
1652+
using namespace SPIRVDebug::Operand::Operation;
1653+
1654+
unsigned BitcodeID = llvm::DIOp::getBitcodeID(DIOp);
1655+
SPIRVDebug::ExpressionOpCode OC =
1656+
SPIRV::DbgExpressionDIOpBasedOpCodeMap::map(BitcodeID);
1657+
if (OpCountMap.find(OC) == OpCountMap.end())
1658+
report_fatal_error(
1659+
llvm::Twine("unknown DIOp-based opcode found in DIExpression"));
1660+
1661+
unsigned OpCount = OpCountMap[OC];
1662+
SPIRVWordVec Op(OpCount);
1663+
Op[OpCodeIdx] = OC;
1664+
if (isNonSemanticDebugInfo())
1665+
transformToConstant(Op, {OpCodeIdx});
1666+
1667+
#define HANDLE_OP1(Name, OpType, OpName) \
1668+
case llvm::DIOp::Name::getBitcodeID(): \
1669+
assert(OpCount == 2); \
1670+
transDIOpOperand<OpType>(Op, 1, \
1671+
std::get<llvm::DIOp::Name>(DIOp).get##OpName()); \
1672+
break;
1673+
#define HANDLE_OP2(Name, OpType1, OpName1, OpType2, OpName2) \
1674+
case llvm::DIOp::Name::getBitcodeID(): \
1675+
assert(OpCount == 3); \
1676+
transDIOpOperand<OpType1>( \
1677+
Op, 1, std::get<llvm::DIOp::Name>(DIOp).get##OpName1()); \
1678+
transDIOpOperand<OpType2>( \
1679+
Op, 2, std::get<llvm::DIOp::Name>(DIOp).get##OpName2()); \
1680+
break;
1681+
1682+
switch (BitcodeID) {
1683+
#include "llvm/IR/DIExprOps.def"
1684+
default:
1685+
// This is the OP0 case.
1686+
assert(OpCount == 1);
1687+
break;
1688+
}
1689+
1690+
auto *Operation =
1691+
BM->addDebugInfo(SPIRVDebug::Operation, getVoidTy(), Op);
1692+
Operations.push_back(Operation->getId());
1693+
}
1694+
1695+
return BM->addDebugInfo(SPIRVDebug::Expression, getVoidTy(), Operations);
1696+
}
1697+
#endif
1698+
16131699
for (unsigned I = 0, N = Expr->getNumElements(); I < N; ++I) {
16141700
using namespace SPIRVDebug::Operand::Operation;
16151701
auto DWARFOpCode = static_cast<dwarf::LocationAtom>(Expr->getElement(I));
16161702

16171703
SPIRVDebug::ExpressionOpCode OC =
16181704
SPIRV::DbgExpressionOpCodeMap::map(DWARFOpCode);
16191705
if (OpCountMap.find(OC) == OpCountMap.end())
1620-
report_fatal_error(llvm::Twine("unknown opcode found in DIExpression"));
1706+
report_fatal_error("unknown opcode found in DIExpression");
16211707
if (OC > SPIRVDebug::Fragment &&
16221708
!(BM->allowExtraDIExpressions() ||
16231709
BM->getDebugInfoEIS() == SPIRVEIS_NonSemantic_Shader_DebugInfo_200))
1624-
report_fatal_error(
1625-
llvm::Twine("unsupported opcode found in DIExpression"));
1710+
report_fatal_error("unsupported opcode found in DIExpression");
16261711

16271712
unsigned OpCount = OpCountMap[OC];
16281713
SPIRVWordVec Op(OpCount);

lib/SPIRV/LLVMToSPIRVDbgTran.h

+3
Original file line numberDiff line numberDiff line change
@@ -159,6 +159,9 @@ class LLVMToSPIRVDbgTran {
159159
// DWARF expressions
160160
SPIRVEntry *transDbgExpression(const DIExpression *Expr);
161161

162+
template <class OperandTy>
163+
void transDIOpOperand(SPIRVWordVec &Vec, unsigned Idx, OperandTy Operand);
164+
162165
// Imported declarations and modules
163166
SPIRVEntry *transDbgImportedEntry(const DIImportedEntity *IE);
164167

lib/SPIRV/Mangler/ManglingUtils.cpp

+3
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,7 @@ static const char *PrimitiveNames[PRIMITIVE_NUM] = {
2828
"half",
2929
"float",
3030
"double",
31+
"__bf16",
3132
"void",
3233
"...",
3334
"image1d_ro_t",
@@ -105,6 +106,7 @@ const char *MangledTypes[PRIMITIVE_NUM] = {
105106
"Dh", // HALF
106107
"f", // FLOAT
107108
"d", // DOUBLE
109+
"u6__bf16", // __BF16
108110
"v", // VOID
109111
"z", // VarArg
110112
"14ocl_image1d_ro", // PRIMITIVE_IMAGE1D_RO_T
@@ -197,6 +199,7 @@ static const SPIRversion PrimitiveSupportedVersions[PRIMITIVE_NUM] = {
197199
SPIR12, // HALF
198200
SPIR12, // FLOAT
199201
SPIR12, // DOUBLE
202+
SPIR12, // __BF16
200203
SPIR12, // VOID
201204
SPIR12, // VarArg
202205
SPIR12, // PRIMITIVE_IMAGE1D_RO_T

lib/SPIRV/Mangler/ParameterType.h

+1
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@ enum TypePrimitiveEnum {
4545
PRIMITIVE_HALF,
4646
PRIMITIVE_FLOAT,
4747
PRIMITIVE_DOUBLE,
48+
PRIMITIVE_BFLOAT,
4849
PRIMITIVE_VOID,
4950
PRIMITIVE_VAR_ARG,
5051
PRIMITIVE_STRUCT_FIRST,

lib/SPIRV/SPIRVReader.cpp

+19-10
Original file line numberDiff line numberDiff line change
@@ -315,6 +315,8 @@ std::optional<uint64_t> SPIRVToLLVM::getAlignment(SPIRVValue *V) {
315315
Type *SPIRVToLLVM::transFPType(SPIRVType *T) {
316316
switch (T->getFloatBitWidth()) {
317317
case 16:
318+
if (T->isTypeFloat(16, FPEncodingBFloat16KHR))
319+
return Type::getBFloatTy(*Context);
318320
return Type::getHalfTy(*Context);
319321
case 32:
320322
return Type::getFloatTy(*Context);
@@ -480,15 +482,20 @@ Type *SPIRVToLLVM::transType(SPIRVType *T, bool UseTPT) {
480482
}
481483
case OpTypeBufferSurfaceINTEL: {
482484
auto *PST = static_cast<SPIRVTypeBufferSurfaceINTEL *>(T);
483-
Type *StructTy = getOrCreateOpaqueStructType(M, transVCTypeName(PST));
484-
Type *PointerTy;
485-
if (UseTPT)
486-
PointerTy = TypedPointerType::get(StructTy, SPIRAS_Global);
487-
else
488-
PointerTy = PointerType::get(StructTy, SPIRAS_Global);
489-
return mapType(T, PointerTy);
485+
Type *Ty = nullptr;
486+
if (UseTPT) {
487+
Type *StructTy = getOrCreateOpaqueStructType(M, transVCTypeName(PST));
488+
Ty = TypedPointerType::get(StructTy, SPIRAS_Global);
489+
} else {
490+
std::vector<unsigned> Params;
491+
if (PST->hasAccessQualifier()) {
492+
unsigned Access = static_cast<unsigned>(PST->getAccessQualifier());
493+
Params.push_back(Access);
494+
}
495+
Ty = TargetExtType::get(*Context, "spirv.BufferSurfaceINTEL", {}, Params);
496+
}
497+
return mapType(T, Ty);
490498
}
491-
492499
case internal::OpTypeJointMatrixINTEL: {
493500
auto *MT = static_cast<SPIRVTypeJointMatrixINTEL *>(T);
494501
auto R = static_cast<SPIRVConstant *>(MT->getRows())->getZExtIntValue();
@@ -1501,7 +1508,9 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
15011508
const llvm::fltSemantics *FS = nullptr;
15021509
switch (BT->getFloatBitWidth()) {
15031510
case 16:
1504-
FS = &APFloat::IEEEhalf();
1511+
FS =
1512+
(BT->isTypeFloat(16, FPEncodingBFloat16KHR) ? &APFloat::BFloat()
1513+
: &APFloat::IEEEhalf());
15051514
break;
15061515
case 32:
15071516
FS = &APFloat::IEEEsingle();
@@ -3524,7 +3533,7 @@ Function *SPIRVToLLVM::transFunction(SPIRVFunction *BF, unsigned AS) {
35243533

35253534
// TODO: this is temporarily disabled as it breaks some more complex code
35263535
// patterns that are otherwise correctly(-ish) handled
3527-
if (M->getTargetTriple().getVendor() == Triple::VendorType::AMD)
3536+
if (M->getTargetTriple().getVendor() != Triple::VendorType::AMD)
35283537
validatePhiPredecessors(F);
35293538
transLLVMLoopMetadata(F);
35303539

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