[Task] SPU LLVM: Vectorized Instructions

[elad335]

It is common, especially in floating point code, to unroll loops by four or two and thus ensuring concurrent execution of instructions on the same CPU core.
Here is an example of program that does this:

Notice how many instructions are repeated using different registers.
The task is to execute multiple at once and thus improving performance extensively for these programs.

[Whatcookie]

The unrolled code can be a problem for our JIT since it means register spilling. It might be prudent to perform reverse loop unrolling, then unroll as far as possible, to fill up AVX/AVX-512 vector width, and without spilling registers. Then, on the final iteration of the loop, make sure the SPU registers are all "clobbered" as expected.

[kd-11]

This kind of work is hard to perfect without tests (UT/IT/FT) built in to our pipelines. We really need some kind of test job to make sure we don't break the JIT since they can be so fragile.