diff --git a/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp b/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
index 03a968de1a02..4c704d5e2b6e 100644
--- a/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
+++ b/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
@@ -2340,7 +2340,6 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
 						}
 
 						bool has_gpr_barriers_in_the_way = false;
-						bool potential_loop = false;
 
 						for (auto [a2, b2] : sucs)
 						{
@@ -2352,7 +2351,6 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
 									break;
 								}
 
-								potential_loop = true;
 								continue;
 							}
 
@@ -2392,7 +2390,6 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
 									break;
 								}
 
-								potential_loop = true;
 								continue;
 							}
 
@@ -2427,12 +2424,6 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
 							continue;
 						}
 
-						if (!potential_loop)
-						{
-							spu_log.trace("Avoided postponing r%u store from block 0x%x (not loop)", i, block_q[bi].first);
-							continue;
-						}
-
 						for (auto [a2, b2] : sucs)
 						{
 							if (b2 != bqbi)