newlib: riscv: Add Zicfilp lpads to asm functions

Adds `lpad 0` instructions, guarded by `#if __riscv_landing_pad`,
to the RISC-V assembly memory, setjmp and string functions.

Signed-off-by: Arjun Salunkhe <arjun.salunkhe@proton.me>

Author: ethycS0

newlib/libc/machine/riscv/memcpy-asm.S

@@ -14,6 +14,10 @@
 .global memcpy
 .type	memcpy, @function
 memcpy:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+
   mv a3, a0
   beqz a2, 2f
 

newlib/libc/machine/riscv/memmove-asm.S

@@ -14,6 +14,10 @@
 .global memmove
 .type	memmove, @function
 memmove:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+
   beqz a2, .Ldone		/* in case there are 0 bytes to be copied, return immediately */
 
   mv a4, a0			/* copy the destination address over to a4, since memmove should return that address in a0 at the end */

newlib/libc/machine/riscv/memset.S

@@ -50,6 +50,10 @@
 
 
 memset:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+
 #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__)
   mv     a3, a0
   beqz   a2, .Ldone

newlib/libc/machine/riscv/setjmp.S

@@ -15,6 +15,9 @@
   .globl  setjmp
   .type   setjmp, @function
 setjmp:
+#if __riscv_landing_pad
+  lpad 0
+#endif
 	REG_S ra,  0*SZREG(a0)
   #if __riscv_xlen == 32 && (__riscv_zilsd) && (__riscv_misaligned_fast)
 	  sd    s0,  1*SZREG(a0)
@@ -70,6 +73,9 @@ setjmp:
   .globl  longjmp
   .type   longjmp, @function
 longjmp:
+#if __riscv_landing_pad
+  lpad 0
+#endif
 	REG_L ra,  0*SZREG(a0)
   #if __riscv_xlen == 32 && (__riscv_zilsd) && (__riscv_misaligned_fast)
     ld s0, 1*SZREG(a0)

newlib/libc/machine/riscv/strcmp.S

@@ -15,6 +15,10 @@
 .globl strcmp
 .type  strcmp, @function
 strcmp:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+
 #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__)
 .Lcompare:
   lbu   a2, 0(a0)