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63 | 63 | #[inline]
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64 | 64 | pub fn erase_byte(&mut self, offset: u16) {
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65 | 65 | assert!(offset < Self::CAPACITY);
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66 |
| - self.p.raw_erase_byte(offset) |
| 66 | + // Write 0xff here because the erase function is borked. |
| 67 | + // See also: https://github.com/Rahix/avr-hal/issues/406 |
| 68 | + self.p.raw_write_byte(offset, 0xff) |
67 | 69 | }
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68 | 70 |
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69 | 71 | pub fn read(&self, offset: u16, buf: &mut [u8]) -> Result<(), OutOfBoundsError> {
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@@ -179,26 +181,12 @@ macro_rules! impl_eeprom_common {
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179 | 181 |
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180 | 182 | // Check if any bits are changed to '1' in the new value.
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181 | 183 | if (diff_mask & data) != 0 {
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182 |
| - // Now we know that _some_ bits need to be erased to '1'. |
183 |
| - |
184 |
| - // Check if any bits in the new value are '0'. |
185 |
| - if data != 0xff { |
186 |
| - // Now we know that some bits need to be programmed to '0' also. |
187 |
| - self.eedr.write(|w| w.bits(data)); // Set EEPROM data register. |
188 |
| - |
189 |
| - { |
190 |
| - let $periph_ewmode_var = &self; |
191 |
| - $set_erasewrite_mode |
192 |
| - } |
193 |
| - self.eecr.write(|w| w.eepe().set_bit()); // Start Erase+Write operation. |
194 |
| - } else { |
195 |
| - // Now we know that all bits should be erased. |
196 |
| - { |
197 |
| - let $periph_emode_var = &self; |
198 |
| - $set_erase_mode |
199 |
| - } |
200 |
| - self.eecr.write(|w| w.eepe().set_bit()); // Start Erase-only operation. |
| 184 | + self.eedr.write(|w| w.bits(data)); // Set EEPROM data register. |
| 185 | + { |
| 186 | + let $periph_ewmode_var = &self; |
| 187 | + $set_erasewrite_mode |
201 | 188 | }
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| 189 | + self.eecr.write(|w| w.eepe().set_bit()); // Start Erase+Write operation. |
202 | 190 | }
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203 | 191 | //Now we know that _no_ bits need to be erased to '1'.
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204 | 192 | else {
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