Update to v6.5.11 (base hekate v6.5.1)

Author: Random-Penguin

Versions.inc

@@ -1,11 +1,11 @@
 # IPL Version.
 BLVERSION_MAJOR := 6
 BLVERSION_MINOR := 5
-BLVERSION_HOTFX := 10
+BLVERSION_HOTFX := 11
 BLVERSION_REL   := 0
 
 # Nyx Version.
 NYXVERSION_MAJOR := 1
 NYXVERSION_MINOR := 9
-NYXVERSION_HOTFX := 0
+NYXVERSION_HOTFX := 1
 NYXVERSION_REL   := 0

bdk/display/di.c

@@ -694,8 +694,8 @@ static void _display_panel_and_hw_end(bool no_panel_deinit)
 	DSI(DSI_WR_DATA) = (MIPI_DCS_SET_DISPLAY_OFF << 8) | MIPI_DSI_DCS_SHORT_WRITE;
 
 	// Wait for 5 frames (HOST1X_CH0_SYNC_SYNCPT_9).
-	// Not here. Wait for 1 frame manually.
-	usleep(20000);
+	// Not here. Wait for 1 frame + transmission manually.
+	usleep((_panel_id == PANEL_SAM_AMS699VC01) ? (15933 + 195) : (16666 + 230));
 
 	// Propagate changes to all register buffers and disable host cmd packets during video.
 	DISPLAY_A(DC_CMD_STATE_ACCESS) = READ_MUX_ACTIVE | WRITE_MUX_ACTIVE;

bdk/input/joycon.c

@@ -107,9 +107,11 @@ enum
 {
 	JC_STATE_START         = 0,
 	JC_STATE_HANDSHAKED    = 1,
-	JC_STATE_BRATE_CHANGED = 2,
-	JC_STATE_BRATE_OK      = 3,
-	JC_STATE_INIT_DONE     = 4
+	JC_STATE_INFO_PARSED   = 2,
+	JC_STATE_BRATE_CHANGED = 3,
+	JC_STATE_HID_NO_CONN   = 4,
+	JC_STATE_HID_CONN      = 5,
+	JC_STATE_INIT_DONE     = 6
 };
 
 enum
@@ -650,14 +652,12 @@ static void _jc_send_hid_cmd(jc_dev_t *jc, u8 subcmd, const u8 *data, u16 size)
 		if (send_l_rumble)
 			_jc_send_hid_output_rpt(&jc_l, hid_pkt, 0x10, false);
 
-		if (send_r_rumble || send_l_rumble)
-		{
-			msleep(2);
-			if (send_r_rumble)
-				_jc_rcv_pkt(&jc_r);
-			if (send_l_rumble)
-				_jc_rcv_pkt(&jc_l);
-		}
+		msleep(15);
+
+		if (send_r_rumble)
+			_jc_rcv_pkt(&jc_r);
+		if (send_l_rumble)
+			_jc_rcv_pkt(&jc_l);
 
 		// Send rumble.
 		hid_pkt->cmd = JC_HID_RUMBLE_RPT;
@@ -785,23 +785,35 @@ static void _jc_parse_wired_init(jc_dev_t *jc, const jc_wired_hdr_t *pkt, int si
 	switch (pkt->subcmd)
 	{
 	case JC_WIRED_CMD_GET_INFO:
-		for (int i = 6; i > 0; i--)
+		if (!pkt->status)
+		{
+			for (int i = 6; i > 0; i--)
 			jc->mac[6 - i] = payload[i];
-		jc->type = payload[0];
-		jc->connected = true;
+			jc->type = payload[0];
+			jc->state = JC_STATE_INFO_PARSED;
+		}
 		break;
 
 	case JC_WIRED_CMD_SET_BRATE:
-		jc->state = JC_STATE_BRATE_CHANGED;
+		if (!pkt->status)
+			jc->state = JC_STATE_BRATE_CHANGED;
 		break;
 
 	case JC_WIRED_CMD_HID_DISC:
-		jc->state = JC_STATE_BRATE_OK;
+		if (pkt->status == 0xF)
+			jc->state = JC_STATE_HID_NO_CONN;
 		break;
 
 	case JC_WIRED_CMD_HID_CONN:
+		if (!pkt->status)
+			jc->state = JC_STATE_HID_CONN;
+		break;
+
 	case JC_WIRED_CMD_SET_HIDRATE:
-		// done.
+		jc->state = JC_STATE_INIT_DONE;
+		jc->connected = true;
+		break;
+
 	default:
 		break;
 	}
@@ -870,12 +882,13 @@ static void _jc_sio_uart_pkt_parse(jc_dev_t *jc, const jc_sio_in_rpt_t *pkt, int
 	switch (cmd)
 	{
 	case JC_SIO_CMD_INIT:
-		jc->connected = pkt->status == 0;
+		if (!pkt->status)
+			jc->state = JC_STATE_HANDSHAKED;
 		break;
 
 	case JC_SIO_CMD_VER_RPT:
-		if (jc->connected)
-			jc->connected = pkt->status == 0;
+		if (!pkt->status)
+			jc->state = JC_STATE_HID_CONN;
 		break;
 
 	case JC_SIO_CMD_IAP_VER:
@@ -1012,9 +1025,16 @@ static bool _jc_handle_charging(jc_dev_t *jc)
 
 static bool _jc_send_enable_rumble(jc_dev_t *jc)
 {
+	bool send_r_rumble = jc_r.connected && !jc_r.rumble_sent;
+	bool send_l_rumble = jc_l.connected && !jc_l.rumble_sent;
+
+	// Do not sent report yet if second Joy-Con is expected to be initialized.
+	if ((send_r_rumble && !jc_l.rumble_sent && jc_l.state == JC_STATE_HID_CONN) ||
+		(send_l_rumble && !jc_r.rumble_sent && jc_r.state == JC_STATE_HID_CONN))
+		return 1;
+
 	// Send init rumble or request nx pad status report.
-	if ((jc_r.connected && !jc_r.rumble_sent) ||
-		(jc_l.connected && !jc_l.rumble_sent))
+	if (send_r_rumble || send_l_rumble)
 	{
 		_jc_send_hid_cmd(jc, JC_HID_SUBCMD_SND_RUMBLE, NULL, 0);
 
@@ -1033,14 +1053,14 @@ static bool _jc_send_enable_rumble(jc_dev_t *jc)
 
 static void _jc_req_status(jc_dev_t *jc)
 {
-	if (!jc->detected)
+	if (!jc->connected)
 		return;
 
-	bool is_nxpad = !(jc->type & JC_ID_HORI) && !jc->sio_mode;
-
-	if (jc->last_status_req_time > get_tmr_ms() || !jc->connected)
+	if (jc->last_status_req_time > get_tmr_ms())
 		return;
 
+	bool is_nxpad = !(jc->type & JC_ID_HORI) && !jc->sio_mode;
+
 	// Init/maintenance for Joy-Con.
 	if (is_nxpad)
 	{
@@ -1258,24 +1278,26 @@ static void _jc_conn_init(jc_dev_t *jc)
 		// Initialize uart to 1 megabaud and manual RTS.
 		uart_init(jc->uart, 1000000, UART_AO_TX_MN_RX);
 
+		jc->state = JC_STATE_START;
+
 		if (!jc->sio_mode)
 		{
 			jc_gamepad.buttons = 0;
-			jc->state = JC_STATE_START;
 
 			// Set TX and RTS inversion for Joycon.
 			uart_invert(jc->uart, true, UART_INVERT_TXD | UART_INVERT_RTS);
 
-			// Wake up the controller.
-			_joycon_send_raw(jc->uart, _jc_init_wake, sizeof(_jc_init_wake));
-			_jc_rcv_pkt(jc); // Clear RX FIFO.
-
-			// Do a handshake.
+			// Initialize.
 			u32 retries = 10;
 			while (retries && jc->state != JC_STATE_HANDSHAKED)
 			{
+				// Wake up the controller.
+				_joycon_send_raw(jc->uart, _jc_init_wake, sizeof(_jc_init_wake));
+				_jc_rcv_pkt(jc); // Clear RX FIFO.
+
+				// Do a handshake.
 				_joycon_send_raw(jc->uart, _jc_init_handshake, sizeof(_jc_init_handshake));
-				msleep(5);
+				msleep(4);
 				_jc_rcv_pkt(jc);
 				retries--;
 			}
@@ -1288,6 +1310,9 @@ static void _jc_conn_init(jc_dev_t *jc)
 			msleep(2);
 			_jc_rcv_pkt(jc);
 
+			if (jc->state != JC_STATE_INFO_PARSED)
+				goto out;
+
 			if (!(jc->type & JC_ID_HORI))
 			{
 				// Request 3 megabaud change.
@@ -1301,17 +1326,18 @@ static void _jc_conn_init(jc_dev_t *jc)
 					uart_init(jc->uart, 3000000, UART_AO_TX_MN_RX);
 					uart_invert(jc->uart, true, UART_INVERT_TXD | UART_INVERT_RTS);
 
-					// Disconnect HID.
+					// Make sure HID is disconnected and check connection. Reply expected after 30ms.
 					retries = 10;
-					while (retries && jc->state != JC_STATE_BRATE_OK)
+					while (retries && jc->state != JC_STATE_HID_NO_CONN)
 					{
 						_joycon_send_raw(jc->uart, _jc_init_hid_disconnect, sizeof(_jc_init_hid_disconnect));
 						msleep(5);
 						_jc_rcv_pkt(jc);
 						retries--;
 					}
 
-					if (jc->state != JC_STATE_BRATE_OK)
+					// Was connected before or no response. Do a reinit.
+					if (jc->state != JC_STATE_HID_NO_CONN)
 						goto out;
 				}
 
@@ -1320,10 +1346,15 @@ static void _jc_conn_init(jc_dev_t *jc)
 				msleep(2);
 				_jc_rcv_pkt(jc);
 
+				if (jc->state != JC_STATE_HID_CONN)
+					goto out;
+
 				// Set hid packet rate.
 				_joycon_send_raw(jc->uart, _jc_init_set_hid_rate, sizeof(_jc_init_set_hid_rate));
 				msleep(2);
 				_jc_rcv_pkt(jc);
+
+				goto out; // Wait for set hid rate reply.
 			}
 			else // Hori. Unset RTS inversion.
 				uart_invert(jc->uart, false, UART_INVERT_RTS);
@@ -1342,25 +1373,34 @@ static void _jc_conn_init(jc_dev_t *jc)
 
 			// Initialize the controller.
 			u32 retries = 10;
-			while (!jc->connected && retries)
+			while (retries && jc->state != JC_STATE_HANDSHAKED)
 			{
 				_joycon_send_raw(jc->uart, _sio_init, sizeof(_sio_init));
 				msleep(5);
 				_jc_rcv_pkt(jc);
 				retries--;
 			}
 
-			if (!jc->connected)
+			if (jc->state != JC_STATE_HANDSHAKED)
 				goto out;
 
 			// Set output report version.
-			_joycon_send_raw(jc->uart, _sio_set_rpt_version, sizeof(_sio_set_rpt_version));
-			msleep(5);
-			_jc_rcv_pkt(jc);
+			retries = 10;
+			while (retries && jc->state != JC_STATE_HID_CONN)
+			{
+				_joycon_send_raw(jc->uart, _sio_set_rpt_version, sizeof(_sio_set_rpt_version));
+				msleep(5);
+				_jc_rcv_pkt(jc);
+				retries--;
+			}
+
+			if (jc->state != JC_STATE_HID_CONN)
+				goto out;
 		}
 
 		// Initialization done.
 		jc->state = JC_STATE_INIT_DONE;
+		jc->connected = true;
 
 out:
 		jc->last_received_time = get_tmr_ms();

bdk/sec/se.c

@@ -91,29 +91,34 @@ static int _se_op_wait()
 		return 0;
 	}
 
-	// T210B01: IRAM/TZRAM/DRAM AHB coherency WAR.
-	if (!tegra_t210 && ll_dst_ptr)
+	// WAR: Coherency flushing.
+	if (ll_dst_ptr)
 	{
-		u32 timeout = get_tmr_us() + 1000000;
 		// Ensure data is out from SE.
-		while (SE(SE_STATUS_REG) & SE_STATUS_MEM_IF_BUSY)
+		if (tegra_t210)
+			usleep(15); // Worst case scenario.
+		else
 		{
-			if (get_tmr_us() > timeout)
-				return 0;
-			usleep(1);
-		}
-
-		// Ensure data is out from AHB.
-		if (ll_dst_ptr->addr >= DRAM_START)
-		{
-			timeout = get_tmr_us() + 200000;
-			while (AHB_GIZMO(AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID) & MEM_WRQUE_SE_MST_ID)
+			// T210B01 has a status bit for that.
+			u32 retries = 500000;
+			while (SE(SE_STATUS_REG) & SE_STATUS_MEM_IF_BUSY)
 			{
-				if (get_tmr_us() > timeout)
+				if (!retries)
 					return 0;
 				usleep(1);
+				retries--;
 			}
 		}
+
+		// Ensure data is out from AHB.
+		u32 retries = 500000;
+		while (AHB_GIZMO(AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID) & MEM_WRQUE_SE_MST_ID)
+		{
+			if (!retries)
+				return 0;
+			usleep(1);
+			retries--;
+		}
 	}
 
 	return 1;
@@ -181,7 +186,7 @@ static int _se_execute_aes_oneshot(void *dst, const void *src, u32 size)
 
 	u32 size_aligned = ALIGN_DOWN(size, SE_AES_BLOCK_SIZE);
 	u32 size_residue = size % SE_AES_BLOCK_SIZE;
-	int res = 0;
+	int res = 1;
 
 	// Handle initial aligned message.
 	if (size_aligned)
@@ -507,10 +512,14 @@ static int _se_sha_hash_256(void *hash, u64 total_size, const void *src, u32 src
 	// Set total size: BITS(total_size), up to 2 EB.
 	SE(SE_SHA_MSG_LENGTH_0_REG) = (u32)(total_size << 3);
 	SE(SE_SHA_MSG_LENGTH_1_REG) = (u32)(total_size >> 29);
+	SE(SE_SHA_MSG_LENGTH_2_REG) = 0;
+	SE(SE_SHA_MSG_LENGTH_3_REG) = 0;
 
 	// Set leftover size: BITS(src_size).
 	SE(SE_SHA_MSG_LEFT_0_REG) = (u32)(msg_left << 3);
 	SE(SE_SHA_MSG_LEFT_1_REG) = (u32)(msg_left >> 29);
+	SE(SE_SHA_MSG_LEFT_2_REG) = 0;
+	SE(SE_SHA_MSG_LEFT_3_REG) = 0;
 
 	// Set config based on init or partial continuation.
 	if (total_size == src_size || !total_size)

bdk/soc/hw_init.c

@@ -470,7 +470,12 @@ void hw_init()
 
 void hw_deinit(bool keep_display)
 {
-	bool tegra_t210 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210;
+	// Seamless display or display power off.
+	if (!keep_display)
+	{
+		display_end();
+		clock_disable_host1x();
+	}
 
 	// Scale down BPMP clock.
 	bpmp_clk_rate_set(BPMP_CLK_NORMAL);
@@ -495,16 +500,9 @@ void hw_deinit(bool keep_display)
 	hw_config_arbiter(true);
 
 	// Re-enable clocks to Audio Processing Engine as a workaround to rerunning mbist war.
-	if (tegra_t210)
+	if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210)
 	{
 		CLOCK(CLK_RST_CONTROLLER_CLK_ENB_V_SET) = BIT(CLK_V_AHUB);
 		CLOCK(CLK_RST_CONTROLLER_CLK_ENB_Y_SET) = BIT(CLK_Y_APE);
 	}
-
-	// Seamless display or display power off.
-	if (!keep_display)
-	{
-		display_end();
-		clock_disable_host1x();
-	}
 }