Improvement: Add NUMA topology diagram and business use cases to NUMA and Hugepages tutorial

[acmenezes]

Feature Type

Improvement to existing tutorial

Description

Enhance modules/performance/pages/numa-hugepages.adoc with a visual NUMA topology diagram, a hugepage comparison visual, and business use cases for workloads that benefit from NUMA-aware placement and hugepage-backed memory.

Suggested Additions

NUMA Topology Diagram

A diagram showing a 2-socket server:

• NUMA Node 0: CPU cores 0-15 + 128 GB local memory (fast access)
• NUMA Node 1: CPU cores 16-31 + 128 GB local memory (fast access)
• Cross-NUMA access: Core 0 accessing Node 1 memory = ~1.5x slower (remote access penalty)
• VM with NUMA passthrough: VM sees the same 2-node topology, guest OS can schedule NUMA-aware applications
• VM without passthrough: VM sees flat memory, guest OS cannot optimize for locality

Hugepage Comparison Visual

• 4K pages: 1 GB memory = 262,144 page table entries -> TLB thrashing on large datasets
• 2Mi pages: 1 GB memory = 512 entries -> 500x fewer TLB misses -> good for most workloads
• 1Gi pages: 1 GB memory = 1 entry -> minimal TLB overhead -> best for very large memory VMs, but wastes memory in small increments

Business Use Cases

• In-memory databases (SAP HANA, Redis, Memcached): Large datasets in memory benefit enormously from hugepages (reduced TLB misses) and NUMA-local access (consistent latency)
• High-frequency trading: Memory access latency directly impacts trade execution time -- NUMA-local memory eliminates cross-socket penalties
• Large-memory VMs (256 GB+): Without hugepages, the page table itself consumes significant memory and TLB pressure becomes a real bottleneck
• Scientific computing / HPC: Matrix operations and simulations benefit from NUMA-aware memory allocation and hugepage-backed buffers
• When 2Mi vs 1Gi: 2Mi for most workloads (flexible allocation); 1Gi only for very large, long-lived memory allocations (databases with stable memory footprint)

Value Proposition

NUMA and hugepages are the most abstract performance concepts in the module. Without a visual showing the physical hardware topology and its impact on memory access latency, users cannot reason about when these features matter. The diagrams make the hardware architecture concrete, and business use cases help users determine whether their workloads justify the configuration complexity.

Target File

modules/performance/pages/numa-hugepages.adoc