Feature Type
Deep dive expanding existing tutorial
Description
Create a deep-dive companion to the existing cpu-pinning.adoc (435 lines, ~1,830 words) that covers advanced CPU topology concepts not present in the current content: thread-level pinning, SMT-aware scheduling, CPU model passthrough, and performance measurement methodology.
Key Topics to Cover
- CPU topology planning: Understanding sockets, cores, and threads (SMT/HyperThreading) -- how KubeVirt maps VM topology to host topology
- SMT-aware pinning: Whether to pin to full cores (both threads) or allow sibling thread sharing -- impact on security (side-channel attacks) and performance
- CPU model passthrough vs host-model:
spec.domain.cpu.model: host-passthrough for maximum performance vs host-model for migration compatibility -- trade-offs
- PCID/INVPCID feature passthrough: Enabling Process-Context Identifiers for guest kernel performance (reduces TLB flush cost on context switches)
- Emulator and I/O thread placement: Dedicating cores for the QEMU emulator thread and I/O threads separately from vCPU cores -- prevents emulator overhead from impacting VM performance
- VM CPU topology exposure: Configuring sockets/cores/threads in the guest to match host topology for optimal guest OS scheduling
- Measuring CPU pinning effectiveness: Using
cyclictest, stress-ng, sysbench to validate that pinning actually improves latency and throughput
- Capacity planning: How CPU pinning reduces schedulable capacity -- calculating effective node capacity with N pinned VMs vs shared VMs
- Advanced: CPU hotplug: Adding vCPUs to running VMs (KubeVirt support status and configuration)
Value Proposition
The current tutorial enables CPU pinning with defaults. Production environments need to make informed decisions about SMT, CPU model passthrough, emulator thread isolation, and capacity trade-offs. This deep dive provides the CPU architecture knowledge needed to optimize pinning for specific workloads rather than using one-size-fits-all settings.
Suggested Module
modules/performance/
Feature Type
Deep dive expanding existing tutorial
Description
Create a deep-dive companion to the existing
cpu-pinning.adoc(435 lines, ~1,830 words) that covers advanced CPU topology concepts not present in the current content: thread-level pinning, SMT-aware scheduling, CPU model passthrough, and performance measurement methodology.Key Topics to Cover
spec.domain.cpu.model: host-passthroughfor maximum performance vshost-modelfor migration compatibility -- trade-offscyclictest,stress-ng,sysbenchto validate that pinning actually improves latency and throughputValue Proposition
The current tutorial enables CPU pinning with defaults. Production environments need to make informed decisions about SMT, CPU model passthrough, emulator thread isolation, and capacity trade-offs. This deep dive provides the CPU architecture knowledge needed to optimize pinning for specific workloads rather than using one-size-fits-all settings.
Suggested Module
modules/performance/