nmh1000_reg.h

/**
  ******************************************************************************
  * @file    nmh1000_reg.h
  * @author  Sensors Software Solution Team
  * @brief   This file contains all the functions prototypes for the
  *          nmh1000_reg.c driver.
  ******************************************************************************
  * @attention
  *
  * Copyright (c) 2026 STMicroelectronics.
  * All rights reserved.
  *
  * This software is licensed under terms that can be found in the LICENSE file
  * in the root directory of this software component.
  * If no LICENSE file comes with this software, it is provided AS-IS.
  *
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef NMH1000_REG_H
#define NMH1000_REG_H


#ifdef __cplusplus
extern "C" {
#endif


/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
#include <stddef.h>

/** @defgroup  Endianness definitions
  * @{
  *
  */


#ifndef DRV_BYTE_ORDER
#ifndef __BYTE_ORDER__

#define DRV_LITTLE_ENDIAN 1234
#define DRV_BIG_ENDIAN    4321

/** if _BYTE_ORDER is not defined, choose the endianness of your architecture
  * by uncommenting the define which fits your platform endianness
  */
//#define DRV_BYTE_ORDER    DRV_BIG_ENDIAN
#define DRV_BYTE_ORDER    DRV_LITTLE_ENDIAN

#else /* defined __BYTE_ORDER__ */

#define DRV_LITTLE_ENDIAN  __ORDER_LITTLE_ENDIAN__
#define DRV_BIG_ENDIAN     __ORDER_BIG_ENDIAN__
#define DRV_BYTE_ORDER     __BYTE_ORDER__

#endif /* __BYTE_ORDER__*/
#endif /* DRV_BYTE_ORDER */

/* Bit Endianess template reference */
/*
typedef struct
{
#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
  uint8_t bit0                         : 1;
  uint8_t bit1                         : 1;
  uint8_t bit2                         : 1;
  uint8_t bit3                         : 1;
  uint8_t bit4                         : 1;
  uint8_t bit5                         : 1;
  uint8_t bit6                         : 1;
  uint8_t bit7                         : 1;
#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
  uint8_t bit7                         : 1;
  uint8_t bit6                         : 1;
  uint8_t bit5                         : 1;
  uint8_t bit4                         : 1;
  uint8_t bit3                         : 1;
  uint8_t bit2                         : 1;
  uint8_t bit1                         : 1;
  uint8_t bit0                         : 1;
#endif // DRV_BYTE_ORDER
} bitwise_t;
*/

/**
  * @}
  *
  */

/** @addtogroup  Interfaces_Functions
  * @brief       This section provide a set of functions used to read and
  *              write a generic register of the device.
  *              MANDATORY: return 0 -> no Error.
  * @{
  *
  */


typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, const uint8_t *, uint16_t);
typedef int32_t (*stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
typedef void (*stmdev_mdelay_ptr)(uint32_t millisec);

/**
  * @}
  *
  */

/* STdC-style context */
typedef struct
{
  /** Component mandatory fields **/
  stmdev_write_ptr  write_reg;
  stmdev_read_ptr   read_reg;
  /** Component optional fields **/
  stmdev_mdelay_ptr   mdelay;
  /** Customizable optional pointer **/
  void *handle;

  /** private data **/
  void *priv_data;
} stmdev_ctx_t;


#define NMH_SETB         1  /* Set Bit */
#define NMH_RSTB         0  /* Reset Bit */

/*!
 * @brief nmh1000 commong definitions.
 */
#define ONE_SHOT_TRIGGER      (1)
#define NMH1000_SENS_G_LSB     1.75f
#define NMH1000_THRESH_LIMIT   223U  /* Max threshold limit: low or high */


/* NMH1000 I2C addresses adjusted based as 8-bit addressing */
#define NMH1000_I2C_ADD_VAL (0x60 << 1)

/* WHO_AM_I value for NMH1000 device.*/
#define NMH1000_WHO_AM_I_VAL     (0x01) /* Who AM I Value of NMH1000 */
#define NMH1000_WHO_AM_I_ERROR   (0x00) /* WHO_AM_I Error condition, refer to DS */
#define NMH1000_WHO_AM_I_NPROG   (0xFF) /* Who AM I Value not programmed, refer to DS */


/* The NMH1000 Sensor Internal Register Map. */

#define NMH1000_STATUS               0x00
#define NMH1000_CONTROL_REG1         0x01
#define NMH1000_RESERVED1            0x02
#define NMH1000_OUT_M_REG            0x03
#define NMH1000_USER_LOW_THRESH      0x04
#define NMH1000_USER_HIGH_THRESH     0x05
#define NMH1000_ODR                  0x06
#define NMH1000_RESERVED2            0x07
#define NMH1000_WHO_AM_I             0x08
#define NMH1000_I2C_ADDR             0x09


/* Bitfield structs – pack exactly 1 byte.*/

/*--------------------------------
** Register: STATUS
** Enum: NMH1000_STATUS
** --
** Offset : 0x00 Status reporting of modes and selections.
** ------------------------------*/
typedef union
{
  struct
  {
#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
    uint8_t out_b : 1;       /* Output Buffer indicate a latched state of the VOUT pin after a transition
                                from either Asserted to Clear or Clear to Asserted. */
    uint8_t rst_stat : 1;    /* Reset Status indicates the state-machine reset sequence. */
    uint8_t _reserved_0 : 1; /* Reserved */
    uint8_t opmode : 1;      /* The read-only OPMODE shall indicate the mode of the internal state-machine. */
    uint8_t _reserved_1 : 1; /* Reserved */
    uint8_t mdr : 1;         /* MDR (Magnetic Data Ready) indicates that value in register $03 is available for read operation.
                                MDR bit retains this value until the host clears it. */
    uint8_t mdo : 1;         /* MDO (Magnetic Data Overwrite) asserts when MDR is set to 1 and new data is available at $03.
                                MDO bit retains this value until the host clears it. */
    uint8_t output : 1;      /* Vout control block state. */
#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
    uint8_t output : 1;      /* Vout control block state. */
    uint8_t mdo : 1;         /* MDO (Magnetic Data Overwrite) asserts when MDR is set to 1 and new data is available at $03.
                                MDO bit retains this value until the host clears it. */
    uint8_t mdr : 1;         /* MDR (Magnetic Data Ready) indicates that value in register $03 is available for read operation.
                                MDR bit retains this value until the host clears it. */
    uint8_t _reserved_1 : 1; /* Reserved */
    uint8_t opmode : 1;      /* The read-only OPMODE shall indicate the mode of the internal state-machine. */ 
    uint8_t _reserved_0 : 1;  /* Reserved */
    uint8_t rst_stat : 1;    /* Reset Status shall indicate the state-machine reset sequence. */
    uint8_t out_b : 1;       /* Output Buffer indicate a latched state of the VOUT pin after a transition
                                from either Asserted to Clear or Clear to Asserted. */    
#endif /* DRV_BYTE_ORDER */
  } b;
  uint8_t w;
} nmh1000_status_t;

/*
** STATUS - Bit field value definitions  
*/
#define NMH1000_STATUS_OUT_B_CLEARED              ((uint8_t) 0x00)  /*  OUT Cleared on previous cycle.                      */
#define NMH1000_STATUS_OUT_B_ASSERTED             ((uint8_t) 0x01)  /*  OUT asserted on previous cycle.                     */
#define NMH1000_STATUS_RST_STAT_SEQ_COMPLETED     ((uint8_t) 0x00)  /*  Reset sequence complete and read operation          */
                                                                    /*  performed on register $00.                          */
#define NMH1000_STATUS_RST_STAT_SEQ_FAIL          ((uint8_t) 0x02)  /*  Reset sequence not complete. Result of Reset.       */
#define NMH1000_STATUS_OPMODE_STATE_MACHINE_FAULT ((uint8_t) 0x00)  /*  indicates VPP < VSTAND and the device in            */
                                                                    /*  Standalone mode indicating a state machine fault,   */
                                                                    /*  since the registers are only accessible in the      */
                                                                    /*  I2C mode.                                           */
#define NMH1000_STATUS_OPMODE_USER_MODE           ((uint8_t) 0x08)  /*  Indicates VPP >= VSTAND and the device in I2C User Mode. */
#define NMH1000_STATUS_MDR_DATA_NOT_AVAILABLE     ((uint8_t) 0x00)  /*  $03 data available.                                 */
#define NMH1000_STATUS_MDO_DATA_FRESH             ((uint8_t) 0x00)  /*  Register $03 value is within the range $00 to $1F.  */
#define NMH1000_STATUS_MDR_DATA_AVAILABLE         ((uint8_t) 0x20)  /*  $03 data not available. Result of Reset.            */

#define NMH1000_STATUS_MDO_DATA_OVERWRITTEN       ((uint8_t) 0x40)  /*  Register $03 value is >$1F indicating out-of-range  */
                                                                    /*  or fault. Result of Reset.                          */
#define NMH1000_STATUS_OUTPUT_VOUT_DRIVEN_TO_VOL  ((uint8_t) 0x00)  /*  The state of VOUT is driven to VOL; Result of Reset.*/
#define NMH1000_STATUS_OUTPUT_VOUT_DRIVEN_TO_VOH  ((uint8_t) 0x80)  /*  The state of VOUT is driven to VOH.                 */
/*------------------------------*/


/*--------------------------------
** Register: CONTROL_REG1
** Enum: NMH1000_CONTROL_REG1
** --
** Offset : 0x01 - Control Register
** ------------------------------*/
typedef union {
  struct 
  {
#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
    uint8_t rst : 1;         /* Internal device Soft Reset. */
    uint8_t _reserved_0 : 1;
    uint8_t one_shot : 1;    /* Triggers a single sequence of Compare to Vout Control, then halt. */
    uint8_t auto_mode : 1;   /* Enters a sequential autonomous mode cycling from Sleep to Compare to 
                                Vout Control, then back to Sleep. */
    uint8_t i2c_dis : 1;     /* This allows the user to force the device into standalone mode. */
    uint8_t v_pol : 1;       /* Control of the user-defined OUT pin and resultant OUT_B register bit
                                assert / clear polarity. */
    uint8_t reserved_1 : 2;
#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
    uint8_t reserved_1 : 2;
    uint8_t v_pol : 1;       /* Control of the user-defined OUT pin and resultant OUT_B register bit
                                assert / clear polarity. */		
    uint8_t i2c_dis : 1;     /* This allows the user to force the device into standalone mode. */
    uint8_t auto_mode : 1;   /* Enters a sequential autonomous mode cycling from Sleep to Compare to
                                Vout Control, then back to Sleep. */
    uint8_t one_shot : 1;    /* Triggers a single sequence of Compare to Vout Control, then halt. */
    uint8_t _reserved_0 : 1;
    uint8_t rst : 1;         /* Internal device Soft Reset. */
#endif /* DRV_BYTE_ORDER */
  } b;
  uint8_t w;
} nmh1000_control_reg1_t;


/*
** CONTROL_REG1 - Bit field value definitions  
*/
#define NMH1000_CONTROL_REG1_RST_NO_RESET          ((uint8_t) 0x00)  /*  No reset is forced.                              */
#define NMH1000_CONTROL_REG1_RST_RESET             ((uint8_t) 0x01)  /*  Internal device reset is be forced.              */
#define NMH1000_CONTROL_REG1_ONE_SHORT_EN          ((uint8_t) 0x04)  /*  Trigger a One-Shot sequence.                     */
#define NMH1000_CONTROL_REG1_AUTO_MODE_HALT        ((uint8_t) 0x00)  /*  Halts or prevents Autonomous mode.               */
#define NMH1000_CONTROL_REG1_AUTO_MODE_START       ((uint8_t) 0x08)  /*  Start the Autonomous mode.                       */
#define NMH1000_CONTROL_REG1_I2C_DIS_STANDALONE_MODE ((uint8_t) 0x10)  /*  force the device into i2c standalone mode.     */
#define NMH1000_CONTROL_REG1_V_POL_ASSERT_VOH_CLR_VOL ((uint8_t) 0x00)  /*  Assert = VOH, Clear = VOL; Result of Reset    */
#define NMH1000_CONTROL_REG1_V_POL_ASSERT_VOL_CLR_VOH ((uint8_t) 0x20)  /*  Assert = VOL, Clear = VOH.                    */
/*------------------------------*/


/*--------------------------------
** Register: RESERVED_REG_1
** Enum: NMH1000_RESERVED_REG_1
** --
** Offset : 0x02
** ------------------------------*/
typedef uint8_t nmh1000_reserved_reg_1_t;


/*--------------------------------
** Register: OUT_M_REG
** Enum: NMH1000_OUT_M_REG
** --
** Offset : 0x03 - Report of Magnetic Field Strength
** ------------------------------*/
typedef union {
  struct 
  {
#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
    uint8_t mag_data : 8;    /* Report of Magnetic Strength. */
#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
    uint8_t mag_data : 8;    /* Report of Magnetic Strength. */
#endif /* DRV_BYTE_ORDER */
  } b;
  uint8_t w;
} nmh1000_out_m_reg_t;


/*--------------------------------
** Register: USER_LOW_THRESH
** Enum: NMH1000_USER_LOW_THRESH
** --
** Offset : 0x04 - User selectable output Low Threshold value;
** provides the capability for the user to override the fixed low threshold controlling
** the low-side of the threshold hysteresis loop.
** ------------------------------*/
typedef union {
  struct
  {
#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
    uint8_t user_low_thresh : 8; /* User selectable output Low threshold, N or S */
#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
    uint8_t user_low_thresh : 8; /* User selectable output Low threshold, N or S */
#endif /* DRV_BYTE_ORDER */
  } b;
  uint8_t w;
} nmh1000_user_low_thresh_t;


/*--------------------------------
** Register: USER_HIGH_THRESH
** Enum: NMH1000_USER_HIGH_THRESH
** --
** Offset : 0x05 - User selectable output High Threshold value;
** provides the capability for the user to override the fixed high threshold controlling
** the high-side of the trheshold hysteresis loop.
** ------------------------------*/
typedef union {
  struct
  {
#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
    uint8_t user_high_thresh : 8; /* User selectable output High threshold, N or S */
#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
    uint8_t user_high_thresh : 8; /* User selectable output High threshold, N or S */
#endif /* DRV_BYTE_ORDER */
  } b;
  uint8_t w;
} nmh1000_user_high_thresh_t;


/*--------------------------------
** Register: USER_ODR
** Enum: NMH1000_USER_ODR
** --
** Offset : 0x06 - User Setting of Sample Rate(ODR)
** ------------------------------*/
typedef union {
  struct
  {
#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
    uint8_t user_odr : 3; /* User selectable sleep sample output data rate */
    uint8_t _reserved_0 : 5;
#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
    uint8_t _reserved_0 : 5;
    uint8_t user_odr : 3; /* User selectable sleep sample output data rate */
#endif /* DRV_BYTE_ORDER */
  } b;
  uint8_t w;
} nmh1000_user_odr_t;


/*
** USER_ODR - Bit field value definitions  
*/
#define NMH1000_USER_ODR_LSP               0U /* Low sample rate selected */
#define NMH1000_USER_ODR_5X_LSP            1U /* 5*Low sample rate selected */
#define NMH1000_USER_ODR_MSP               2U /* Medium sample rate selected */
#define NMH1000_USER_ODR_5x_MSP            3U /* 5*Medium sample rate selected */
#define NMH1000_USER_ODR_HSP               4U /* High sample rate selected */
#define NMH1000_USER_ODR_5X_HSP            5U /* 5*High sample rate selected */
#define NMH1000_USER_ODR_10X_HSP           6U /* 10*High sample rate selected */
#define NMH1000_USER_ODR_CONFIG_ERR        7U /* Coniguration error */
/*------------------------------*/


/*--------------------------------
** Register: RESERVED_REG_2
** Enum: NMH1000_RESERVED_REG_2
** --
** Offset : 0x07
** ------------------------------*/
typedef uint8_t nmh1000_reserved_reg_2_t;


/*--------------------------------
** Register: WHO_AM_I
** Enum: NMH1000_WHO_AM_I
** --
** Offset : 0x08 - Device identification register
** ------------------------------*/
typedef uint8_t nmh1000_who_am_i_t;


/*--------------------------------
** Register: I2C_ADDR
** Enum: NMH1000_I2C_ADDR
** --
** Offset : 0x09 - I2C Address register
** ------------------------------*/
typedef uint8_t nmh1000_i2c_addr_t;


/*!
 * @brief nmh1000 auto-mode
 */
typedef enum nmh1000_auto_mode
{
  AUTO_OFF                = 0,  /* Auto mode off */
  AUTO_ON                 = 1,  /* Auto mode on.*/
} nmh1000_auto_mode_t;


/* Simple byte container for magnetic field value. */
typedef struct
{
  uint8_t mag;     /* Magnetic Field in LSB */
  float mag_field; /* Magnetic Field in Gauss - G */

} nmh1000_mag_t;


/*
* @brief nmh1000 USER ODR bits values
*/
typedef enum
{
  NMH1000_ODR_LSP = 0x0,
  NMH1000_ODR_5X_LSP = 0x1,
  NMH1000_ODR_MSP = 0x2,
  NMH1000_ODR_5x_MSP = 0x3,
  NMH1000_ODR_HSP = 0x4,
  NMH1000_ODR_5X_HSP = 0x5,
  NMH1000_ODR_10X_HSP = 0x6,
  NMH1000_ODR_CONFIG_ERR = 0x7
} nmh1000_user_odr_val_t;

/**
  * @defgroup    NMH1000_Interfaces_Functions
  * @brief       This section provide a set of functions used to read and
  *              write a generic register of the device.
  *              MANDATORY: return 0 -> no Error.
  * @{
  *
  */

/* Generic read/write */
/**
  * @brief  NMH1000 generic device register read
  *
  * @param  ctx   read / write interface definitions (ptr)
  * @param  reg   register to read
  * @param  data  pointer to buffer that store the data read (ptr)
  * @param  len   number of consecutive register to read
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_read_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len);


/**
  * @brief  NMH1000 generic device register write
  *
  * @param  ctx   read / write interface definitions (ptr)
  * @param  reg   register to write
  * @param  data  pointer to data to write in register reg (ptr)
  * @param  len   number of consecutive register to write
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_write_reg(stmdev_ctx_t *ctx, uint8_t reg, const uint8_t *data, uint16_t len);

/**
  * @}
  *
  */

/**
  * @defgroup   NMH1000_common
  * @brief      This section groups common useful functions.
  * @{
  *
  */

/* Basic control */
/**
  * @brief  NMH1000 get device ID
  *
  * @param  ctx   read / write interface definitions (ptr)
  * @param  id    buffer that stores device id
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_device_id_get(stmdev_ctx_t *ctx, uint8_t *id);


/**
  * @brief  Reset NMH1000 device
  *
  * @param  ctx   read / write interface definitions (ptr)
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_reset(stmdev_ctx_t *ctx);

/**
  * @}
  *
  */

/**
  * @defgroup    NMH1000_Mode
  * @brief       These functions set the sensor mode of operation.
  * @{
  *
  */

/**
  * @brief  Set auto mode for NMH1000 device
  *
  * @param  ctx   read / write interface definitions (ptr)
  * @param  mode  set auto mode value (Starts autonomous mode)
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_auto_mode_set(stmdev_ctx_t *ctx, uint8_t mode);


/**
  * @brief  Trigger one-shot (only one event) for NMH1000 device
  *
  * @param  ctx   read / write interface definitions (ptr)
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_one_shot_trigger(stmdev_ctx_t *ctx);


/**
  * @brief  Force the NMH1000 device into stand-alone mode from the I2C mode.
  *         Writing 1 to I2C_DIS is a one-time-only operation. Bringing the device
  *         into I2C mode from standalone requires a full power cycle and release of POR
  * @param  ctx   read / write interface definitions (ptr)
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_standlone_force(stmdev_ctx_t *ctx);

/**
  * @}
  *
  */

/**
  * @defgroup   NMH1000_Dataoutput
  * @brief      This section groups all the data output function(s).
  * @{
  *
  */

/**
  * @brief  Get the raw magnetic field (LSB) from the I2C mode.
  * @param  ctx   read / write interface definitions (ptr)
  * @param  val   contains the latest magnetic field read from the sensor.
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_magnetic_field_get(stmdev_ctx_t *ctx, nmh1000_mag_t *val);

/**
  * @}
  *
  */

/**
  * @defgroup   NMH1000_Datageneration
  * @brief      This section groups all the functions concerning
  *             data generation
  * @{
  *
  */

/**
  * @brief  Set the user output data rate ODR.
  * @param  ctx   read / write interface definitions (ptr)
  * @param  val   set the values of ODR in reg NMH1000_ODR
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_user_odr_set(stmdev_ctx_t *ctx, nmh1000_user_odr_val_t val);


/**
  * @brief  Get the user output data rate ODR.
  * @param  ctx   read / write interface definitions (ptr)
  * @param  val   get the values of ODR in reg NMH1000_ODR
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_user_odr_get(stmdev_ctx_t *ctx, nmh1000_user_odr_val_t *val);

/**
  * @}
  *
  */

/**
  * @defgroup   NMH1000_Threshold
  * @brief      This section groups all the functions for
  *             thresholds settings
  * @{
  *
  */

/**
  * @brief  Set the user-configurable high threshold.
  * @param  ctx         read / write interface definitions (ptr)
  * @param  usr_thresh  value of the high threshold to be written into
  *                     the NMH1000_HIGH_THRESH register
  * @retval             Interface status (MANDATORY: return 0 -> no Error)
  */
int32_t nmh1000_high_thresh_set(stmdev_ctx_t *ctx, uint8_t usr_thresh);


/**
  * @brief  Get the user-configurable high threshold.
  * @param  ctx   read / write interface definitions (ptr)
  * @param  val   pointer to structure that stores the high threshold
  *               value read from NMH1000_HIGH_THRESH register
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  */
int32_t nmh1000_high_thresh_get(stmdev_ctx_t *ctx, nmh1000_user_high_thresh_t *val);


/**
  * @brief  Set the user-configurable low threshold.
  * @param  ctx         read / write interface definitions (ptr)
  * @param  usr_thresh  value of the low threshold to be written into
  *                     the NMH1000_LOW_THRESH register
  * @retval             Interface status (MANDATORY: return 0 -> no Error)
  */
int32_t nmh1000_low_thresh_set(stmdev_ctx_t *ctx, uint8_t usr_thresh);


/**
  * @brief  Get the user-configurable low threshold.
  * @param  ctx   read / write interface definitions (ptr)
  * @param  val   pointer to structure that stores the low threshold
  *               value read from NMH1000_LOW_THRESH register
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  */
int32_t nmh1000_low_thresh_get(stmdev_ctx_t *ctx, nmh1000_user_low_thresh_t *val);

/**
  * @}
  *
  */

/**
  * @defgroup   NMH1000_OutPin_setting
  * @brief      This section groups all the functions for
  *             Out pin polarity settings
  * @{
  *
  */

/**
  * @brief  Set output Polarity for NMH1000 device.
  *         Two states: Default (V_POL=0) assert for magnet not present,
  *         clear for magnet present, relative to VSS.
  *
  * @param  ctx   read / write interface definitions(ptr)
  * @param  val   provides control of the user-defined OUT pin
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_polarity_set(stmdev_ctx_t *ctx, uint8_t val);

/**
  * @brief  Get output Polarity of NMH1000 device
  *
  * @param  ctx   read / write interface definitions(ptr)
  * @param  val   V_POL provides control of the user-defined OUT pin
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_polarity_get(stmdev_ctx_t *ctx, uint8_t *val);
/**
  * @}
  *
  */

/**
  * @defgroup   NMH1000_status
  * @brief      This section groups all the functions for
  *             sensor status settings
  * @{
  *
  */

/**
  * @brief  Clear MDR (Magnetic Data Ready) status of NMH1000 device
  *
  * @param  ctx   read / write interface definitions (ptr)
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_status_mdr_clear(stmdev_ctx_t *ctx);


/**
  * @brief  Clear MDO (Magnetic Data Overwrite) status of NMH1000 device
  *
  * @param  ctx   read / write interface definitions (ptr)
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_status_mdo_clear(stmdev_ctx_t *ctx);


/* Read Events */
/**
  * @brief  Get Status from NMH1000 device
  *
  * @param  ctx   read / write interface definitions(ptr)
  * @param  status   pointer to the register that contains the device status
  * @retval       Interface status (MANDATORY: return 0 -> no Error)
  *
  */
int32_t nmh1000_status_get(stmdev_ctx_t *ctx, nmh1000_status_t *status);

/**
  * @}
  *
  */

/* Raw to Magentic Field (G - Gauss) conversion */
/**
  * @defgroup    NMH1000_Sensitivity
  * @brief       Converts raw-data into G units.
  * @{
  *
  */
float nmh1000_convert_to_G(uint8_t lsb);

/**
  * @}
  *
  */

#ifdef __cplusplus
}
#endif

#endif /* NMH1000_REG_H */