-
Notifications
You must be signed in to change notification settings - Fork 17
Expand file tree
/
Copy pathRelease_Notes.html
More file actions
1280 lines (1280 loc) · 41.3 KB
/
Release_Notes.html
File metadata and controls
1280 lines (1280 loc) · 41.3 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
<head>
<meta charset="utf-8" />
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for STM32CubeH5 HAL and LL drivers</title>
<style>
code{white-space: pre-wrap;}
span.smallcaps{font-variant: small-caps;}
div.columns{display: flex; gap: min(4vw, 1.5em);}
div.column{flex: auto; overflow-x: auto;}
div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;}
/* The extra [class] is a hack that increases specificity enough to
override a similar rule in reveal.js */
ul.task-list[class]{list-style: none;}
ul.task-list li input[type="checkbox"] {
font-size: inherit;
width: 0.8em;
margin: 0 0.8em 0.2em -1.6em;
vertical-align: middle;
}
.display.math{display: block; text-align: center; margin: 0.5rem auto;}
</style>
<link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
<link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
<!--[if lt IE 9]>
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
<![endif]-->
</head>
<body>
<div class="row">
<div class="col-sm-12 col-lg-4">
<center>
<h1 id="release-notes-for-stm32cubeh5-hal-and-ll-drivers">Release Notes
for <mark>STM32CubeH5 HAL and LL drivers</mark></h1>
<p>Copyright © 2023 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img
src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded
software, ensure maximized portability across STM32 portfolio.</p>
<p>The portable APIs layer provides a generic, multi instanced and
simple set of APIs to interact with the upper layer (application,
libraries and stacks). It is composed of native and extended APIs set.
It is directly built around a generic architecture and allows the
build-upon layers, like the middleware layer, to implement its functions
without knowing in-depth the used STM32 device. This improves the
library code reusability and guarantees an easy portability on other
devices and STM32 families.</p>
<p>The Low Layer (LL) drivers are part of the STM32Cube firmware HAL
that provides a basic set of optimized and one-shot services. The Low
layer drivers, contrary to the HAL ones are not fully portable across
the STM32 families; the availability of some functions depends on the
physical availability of the relative features on the product. The Low
Layer (LL) drivers are designed to offer the following features:</p>
<ul>
<li>New set of inline functions for direct and atomic register
access</li>
<li>One-shot operations that can be used by the HAL drivers or from
application level</li>
<li>Full independence from HAL and standalone usage (without HAL
drivers)</li>
<li>Full features coverage of all the supported peripherals</li>
</ul>
</div>
<section id="update-history" class="col-sm-12 col-lg-8">
<h1>Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section8" checked aria-hidden="true">
<label for="collapse-section8" checked aria-hidden="true"><strong>V1.7.0
/ 03-June-2026</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li><p><strong>Offical Release</strong> V1.7.0 of <span
style="font-weight: bold;">STM32CubeH5</span> Firmware Package, to
support <strong>STM32H543xx</strong> and <strong>STM32H553xx</strong>
devices.</p></li>
<li><p>Support added for H5 1M devices in all HAL/LL drivers.</p></li>
<li><p>General updates to fix known defects and implementation
enhancements</p></li>
<li><p><strong>HAL Drivers</strong> updates:</p>
<ul>
<li><strong>HAL CCB</strong> driver
<ul>
<li>Fixed Coverity issues.</li>
<li>Updated support for recovery from seed error sequence after RNG
v4.4.</li>
<li>Aligned STM32H5 code with the common code structure.</li>
<li>Fixed transient variable handling in sanity check support.</li>
<li>Fixed preprocessor handling for sanity check compilation.</li>
<li>Added RNG handle support for resilient seed error recovery.</li>
<li>Updated support for wrap keys from secure domain to non-secure
domain.</li>
<li>Fixed MISRA Rule 12.2 issues in HAL CCB.</li>
<li>Fixed MISRA-C and Coverity warnings.</li>
<li>Updated support to CCB v2.1.</li>
</ul></li>
<li><strong>HAL CRYP</strong> driver
<ul>
<li>Fixed MISRA-C Rule 7.1 in hal_cryp.c.</li>
<li>Fixed MISRA-C Rule 2.2_c warning in stm32h5xx_hal_cryp.c.</li>
<li>Fixed CCM partial output handling for non-32-bit aligned
payloads.</li>
<li>Fixed missing second CRYP handle usage in SAES shared-key mode.</li>
<li>Fixed a typo in the CR->SR register call.</li>
<li>Updated seed recovery handling after the RNG v4.4.</li>
<li>Fixed tickstart handling in SAES.</li>
<li>Fixed Coverity issue INTEGER_OVERFLOW.</li>
<li>Updated implementation related to AES GCM decryption tag
handling.</li>
</ul></li>
<li><strong>HAL DMA2D</strong> driver
<ul>
<li>DMA2D3 downscaling implementation added to expose the full 4K-step
scaling range with equidistant increments.</li>
</ul></li>
<li><strong>HAL FLASH</strong> driver
<ul>
<li>Removed smart prefetch APIs from the FLASH driver.</li>
<li>Added dedicated HAL functions to independently lock and unlock
secure and non-secure FLASH control registers.</li>
</ul></li>
<li><strong>HAL FMC</strong> driver
<ul>
<li>Fixed MISRA warning Rule 11.3 on the NOR driver.</li>
<li>Removed 8-bit configuration support from the FMC NOR driver.</li>
<li>Fixed NAND status handling when HAL_NAND_Read_Status returns
NAND_ERROR.</li>
</ul></li>
<li><strong>HAL RNG</strong> driver
<ul>
<li>Updated comment for <code>NistCompliance</code> field in
<code>RNG_ConfigTypeDef</code>.</li>
<li>Updated seed recovery handling after the RNG v4.4.</li>
<li>Fixed the clear logic for the clock error flag during interrupt
handling.</li>
<li>Added error-state check at the start of seed recovery.</li>
<li>Added resilient <code>__HAL_UNLOCK</code>.</li>
<li>Added warning handling related to resilient seed recovery.</li>
<li>Fixed missing NSCR register.</li>
<li>Improved recovery from seed error handling related to RNG v4.4.</li>
<li>Fixed resilient recovery warning handling.</li>
</ul></li>
<li><strong>HAL SDMMC</strong> driver
<ul>
<li>Fixed MISRA-C warning Rule 10.3 in
<code>stm32h5xx_hal_sdio.c</code>.</li>
<li>Fixed Coverity warnings.</li>
<li>Fixed MISRA-C Rule 8.13 violation.</li>
<li>Fixed SD card initialization at frequencies below 3 MHz.</li>
<li>Fixed MISRA-C Rule 12.2 violations.</li>
<li>Improved support for SD card V1.</li>
<li>Fixed command argument handling for block and byte modes.</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> driver
<ul>
<li>Fixed improper initialization of the smartcard clock.</li>
</ul></li>
<li><strong>HAL USB</strong> driver
<ul>
<li>Added support for get frame number.</li>
<li>Updated RX count register handling.</li>
<li>Avoided out-of-band reads.</li>
<li>Fixed MISRA-C Rule 8.13 issues.</li>
</ul></li>
</ul></li>
<li><p><strong>HAL Drivers</strong> updates:</p>
<ul>
<li><strong>LL RNG</strong> driver
<ul>
<li>Updated recovery from seed error handling after RNG v4.4.</li>
<li>Updated interrupt clear handling and resilient recovery logic.</li>
<li>Added support for resilient unlock behavior.</li>
<li>Fixed warnings related to resilient seed recovery.</li>
<li>Fixed missing NSCR register.</li>
<li>Updated NIST compliance parameter handling.</li>
</ul></li>
</ul></li>
</ul>
<p>Note: HAL/LL Backward compatibility ensured by legacy defines.</p>
<h2 id="known-limitations">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="backward-compatibility">Backward compatibility</h2>
<ul>
<li>No compatibility break</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true">
<label for="collapse-section7" aria-hidden="true"><strong>V1.6.0 /
04-February-2026</strong></label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li><p>Maintenance Release V1.6.0 of <span
style="font-weight: bold;">STM32CubeH5</span> Firmware Package, to
support <strong>STM32H503xx, STM32H523xx, STM32H533xx, STM32H562xx,
STM32H563xx</strong> and <strong>STM32H573xx</strong> devices.</p></li>
<li><p><strong>Official Release</strong> V1.6.0 of <span
style="font-weight: bold;">STM32CubeH5</span> Firmware Package, to
support <strong>STM32H5E4xx, STM32H5E5xx, STM32H5F4xx</strong> and
<strong>STM32H5F5xx</strong> devices.</p></li>
<li><p>The HAL and LL drivers provided within this package are
<strong>MISRA-C:2012 and Coverity compliant</strong></p></li>
<li><p>New HAL IP drivers for <strong>DMA2D</strong>,
<strong>PLAY</strong>, <strong>JPEG</strong>, <strong>CCB</strong> and
<strong>LTDC</strong>.</p></li>
<li><p>General updates to fix known defects and implementation
enhancements</p></li>
<li><p><strong>HAL Drivers</strong> updates:</p>
<ul>
<li><strong>HAL ADC</strong> driver
<ul>
<li>Resolved issue where OPAMP internal channel was not connected on ADC
for H5 4M devices.</li>
<li>Fixed configuration mismatch between ChannelVddcore and
Channel0_GPIO registers.</li>
<li>Added support for ADF/MDF modules in the ADC driver for H5 4M
devices.</li>
<li>Added const qualifier to calibrated values stored in system flash to
ensure read-only access.</li>
<li>Updated ADC driver to fully support H5 4M devices.</li>
<li>Fixed ADC-HAL DMA multi-mode start function to correctly use the
length parameter as the number of transfers.</li>
</ul></li>
<li><strong>HAL CCB</strong> driver
<ul>
<li><strong>Added support for CCB HAL driver</strong>.</li>
<li>High level operation
<ul>
<li>Input structure requires buffers as uint8_t array.</li>
<li>Output structure requires buffers as uint8_t array.</li>
<li>Proteted ECDSA Sign
<ul>
<li>HAL_CCB_ECDSA_WrapPrivateKey() for protected ECDSA blob creation
when using user key.</li>
<li>HAL_CCB_ECDSA_GenerateWrapPrivateKey() for protected ECDSA blob
creation when using internal key.</li>
<li>HAL_CCB_ECDSA_Sign() for protected ECDSA Signing message usage.</li>
<li>HAL_CCB_ECDSA_ComputePublicKey() for protected ECDSA computing
public key usage.</li>
</ul></li>
<li>Proteted ECC Scalar Multiplication
<ul>
<li>HAL_CCB_ECC_WrapPrivateKey() for protected ECC blob creation when
using user key.</li>
<li>HAL_CCB_ECC_GenerateWrapPrivateKey() for protected ECC blob creation
when using internal key.</li>
<li>HAL_CCB_ECC_ComputeScalarMul() for protected ECC scalar
multiplication usage.</li>
</ul></li>
<li>Proteted RSA Modular Exponentiation
<ul>
<li>HAL_CCB_RSA_WrapPrivateKey() for protected RSA blob creation when
using user key.</li>
<li>HAL_CCB_RSA_ComputeModularExp() for protected RSA computing modular
exponetiation usage.</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL CRYP</strong> driver
<ul>
<li>Updated code to correct typo in size of mask.</li>
<li>Prevented reading outside the boundaries of local array for all data
types.</li>
</ul></li>
<li><strong>HAL DAC</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
<li>Added play trigger feature for H5 4M.</li>
</ul></li>
<li><strong>HAL DELAYBLOCK</strong> driver
<ul>
<li>Fixed inconsistency between code, comments, and reference
manual.</li>
</ul></li>
<li><strong>HAL DMA</strong> driver
<ul>
<li>Added check modes for HAL DMA APIs.</li>
</ul></li>
<li><strong>HAL DMA2D</strong> driver
<ul>
<li><strong>DMA2D HAL driver support added</strong></li>
<li>Alpha Position Configuration for output, foreground (FG), and
background (BG) layers.</li>
<li>Advanced Graphics Configurations: Support downscaling, rotation, and
stencil buffer setup for output blender, foreground (FG), and background
(BG) layers.</li>
<li>Command List Mode Configuration :
<ul>
<li>This update enhances DMA2D capabilities by enabling efficient
offloading of graphic operations through command lists managed in a ring
buffer.</li>
</ul></li>
<li>Ring Buffer Configuration and linear command lists (LDMs)
build.</li>
<li>Data transfer support including register-to-memory,
memory-to-memory, blending, and CLUT loading.</li>
<li>Command list insertion and execution control with optional interrupt
handling.</li>
<li>Ability to suspend, resume, or abort command list execution.</li>
<li>General Purpose Flags (GPFLAGs) configuration for synchronization
and behavior control during execution.</li>
</ul></li>
<li><strong>HAL DTS</strong> driver
<ul>
<li>Fixed missing ‘input trigger selection’ list for PLAY1 in H5
4M.</li>
</ul></li>
<li><strong>HAL ETH</strong> driver
<ul>
<li>Corrected macDefaultConf structure to include JabberTimeout
field.</li>
<li>Fixed Ethernet Bus Fault error for Rx Context Descriptor and removed
CSC MACTSCR config.</li>
<li>Made HAL_ETH_PTP_AddendUpdate call static.</li>
<li>Fixed CHM generation.</li>
<li>Resolved Coverity issues on H5 4M.</li>
<li>Updated Ethernet driver for H5 4M.</li>
</ul></li>
<li><strong>HAL EXTI</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
<li>Fixed Doxygen documentation issues.</li>
</ul></li>
<li><strong>HAL FDCAN</strong> driver
<ul>
<li>Added support for FDCAN3 instance (H5 4M).</li>
</ul></li>
<li><strong>HAL FLASH</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings for H5.</li>
<li>Corrected descriptions in FLASH_EraseInitTypeDef struct.</li>
<li>Fixed ADDRESS_OFFSET_EDATA & EDATA_BANK_SIZE for H5 4M.</li>
<li>Fixed HAL_FLASHEx_GetEccInfo API.</li>
</ul></li>
<li><strong>HAL FMC</strong> driver
<ul>
<li>Added missing 32-bit data size for SDRAM in ll_fmc.h.</li>
<li>Fixed MISRA-C:2012 Rule 12.2 violations and related warnings.</li>
<li>Fixed HAL_NAND_Read_Page_8b and HAL_NAND_Read_SpareArea_8b
APIs.</li>
<li>Set FMC NAND/NOR/SRAM under bank compilation switch as not supported
by all devices.</li>
</ul></li>
<li><strong>HAL GENERIC</strong> driver
<ul>
<li>Resolved MISRA-C:2012 issues in ll_system.h and hal.c.</li>
<li>Added compilation flag for DMA2D Command List Mode.</li>
<li>Added MDF driver and ism330dhcx BSP component.</li>
<li>Added SBS_ETH_10BT1S macro.</li>
<li>Added BSP drivers and CCB includes to stm32h5xx_hal_conf.h.</li>
<li>Fixed Doxygen issues and typos.</li>
<li>Updated hal_conf_template to support SDIO driver.</li>
</ul></li>
<li><strong>HAL GPIO</strong> driver
<ul>
<li>Fixed Doxygen documentation issues.</li>
<li>Fixed missing pull-down capability in analog mode.</li>
</ul></li>
<li><strong>HAL HASH</strong> driver
<ul>
<li>Refactored DIGEST HR location after last reference manual update in
H5.</li>
<li>Refactored update related to undefined “DMA_CSR_FIFOL”.</li>
</ul></li>
<li><strong>HAL I3C</strong> driver
<ul>
<li>Removed deprecated register keyword from STM32H5 HAL for C++
compatibility.</li>
</ul></li>
<li><strong>HAL ICACHE</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings for H5.</li>
</ul></li>
<li><strong>HAL IRDA</strong> driver
<ul>
<li>Added management of H5 4M devices in IRDA clock source
computation.</li>
</ul></li>
<li><strong>HAL JPEG</strong> driver
<ul>
<li><strong>Added new HAL driver support for H5 4M</strong>.</li>
<li>Following functionality is supported by the driver
<ul>
<li>Initialization and de-initialization functions</li>
<li>JPEG processing functions encoding and decoding</li>
<li>JPEG decoding Getting Info and encoding configuration setting</li>
<li>JPEG enable/disable header parsing functions (for decoding)</li>
<li>JPEG Input/Output Buffer configuration.</li>
<li>JPEG callback functions</li>
<li>JPEG Abort/Pause/Resume functions</li>
<li>JPEG custom quantization tables setting functions</li>
<li>IRQ handler management</li>
<li>Peripheral State and Error functions</li>
</ul></li>
</ul></li>
<li><strong>HAL LPTIM</strong> driver
<ul>
<li>Reworked interconnect-related definitions for H5 4M.</li>
<li>Fixed LL_LPTIM_CC_SetChannelMode function to allow correct channel
mode configuration.</li>
</ul></li>
<li><strong>HAL LTDC</strong> driver
<ul>
<li><strong>Added new HAL driver support for H5 4M</strong>.</li>
<li>This driver can support: Layer Management, Color Formats config,
Memory Integration and Interrupts.</li>
</ul></li>
<li><strong>HAL MDF</strong> driver
<ul>
<li><strong>Added new HAL driver support for H5 4M</strong>.</li>
<li>Multi-function Digital Filter: Provides APIs to configure the
digital filters, manage serial interface communication, and handle data
processing.</li>
</ul></li>
<li><strong>HAL PSSI</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings for H5.</li>
</ul></li>
<li><strong>HAL RCC</strong> driver
<ul>
<li>Fixed missing ETH PTP and PLAY1 clock dividers in rcc_ex.h for H5
4M.</li>
<li>Fixed RCC_PERIPHCLOCK_ALL macro for H5 4M.</li>
</ul></li>
<li><strong>HAL RTC</strong> driver
<ul>
<li>Fixed register bitfield overwriting issues.</li>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
</ul></li>
<li><strong>HAL SAI</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
</ul></li>
<li><strong>HAL SDMMC</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> driver
<ul>
<li>Added management of H5 4M devices in SMARTCARD clock source
computation.</li>
</ul></li>
<li><strong>HAL TIM</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
<li>Fixed H5-128K and H5-512K after CMSIS device update.</li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Fixed transfer count and underflow issues.</li>
<li>Added management of H5 4M devices in UART clock source
computation.</li>
</ul></li>
<li><strong>HAL USART</strong> driver
<ul>
<li>Added management of H5 4M devices in USART clock source
computation.</li>
</ul></li>
<li><strong>HAL USB</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings and compilation issues.</li>
<li>Added data toggle support for control endpoint.</li>
</ul></li>
<li><strong>HAL XSPI</strong> driver
<ul>
<li>Removed SIOO bit usage from HAL drivers when not supported.</li>
<li>Added IsMemoryMapped() API.</li>
<li>Removed DHQC bit references when feature not present.</li>
<li>Fixed SIOO mode issues on H5 devices supporting SIOO.</li>
<li>Added H5 4M support in XSPI driver and XSPIM IO Manager, including
support for STM32H5F5J-DK board.</li>
</ul></li>
</ul></li>
<li><p><strong>LL drivers</strong> :</p>
<ul>
<li><strong>LL ADC</strong> driver
<ul>
<li>Fixed MISRA-C:2012 Rule 20.6_b violations.</li>
</ul></li>
<li><strong>LL COMP</strong> driver
<ul>
<li>Integrated COMP LL driver for H5 4M platform.</li>
</ul></li>
<li><strong>LL CORTEX</strong> driver
<ul>
<li>Corrected bug related to LL_MPU_ATTRIBUTES_NUMBERx in
ll_cortex.h.</li>
<li>Resolved MISRA-C:2012 compliance warnings for the H5-4M version of
the Cortex code.</li>
</ul></li>
<li><strong>LL DLYB</strong> driver
<ul>
<li>Added constant for LL_DLYB_SetDelay.</li>
<li>Addressed Rule-8.13 MISRA-C:2012 warnings.</li>
<li>Fixed inconsistency between code, comments, and reference
manual.</li>
</ul></li>
<li><strong>LL DMA</strong> driver
<ul>
<li>Fixed GPDMA HAL issue allowing LL Nodes addition causing
overflow.</li>
<li>Fixed MISRA-C compliance warnings.</li>
<li>Updated macros for H5 4M.</li>
<li>Added check modes for HAL DMA APIs.</li>
</ul></li>
<li><strong>LL FDCAN</strong> driver
<ul>
<li>Added support for FDCAN3 instance (H5 4M).</li>
</ul></li>
<li><strong>LL FLASH</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
<li>Corrected descriptions in FLASH_EraseInitTypeDef struct.</li>
<li>Fixed ADDRESS_OFFSET_EDATA & EDATA_BANK_SIZE for H5 4M.</li>
<li>Fixed HAL_FLASHEx_GetEccInfo API.</li>
</ul></li>
<li><strong>LL FMC</strong> driver
<ul>
<li>Added missing 32-bit data size for SDRAM in ll_fmc.h.</li>
<li>Fixed MISRA-C:2012 Rule 12.2 violations and related warnings.</li>
<li>Fixed HAL_NAND_Read_Page_8b and HAL_NAND_Read_SpareArea_8b
APIs.</li>
<li>Set FMC NAND/NOR/SRAM under bank compilation switch as not supported
by all devices.</li>
</ul></li>
<li><strong>LL HASH</strong> driver
<ul>
<li>Refactored DIGEST HR location after last reference manual update in
H5.</li>
<li>Refactored update related to undefined “DMA_CSR_FIFOL”.</li>
</ul></li>
<li><strong>LL ICACHE</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
</ul></li>
<li><strong>LL PSSI</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
</ul></li>
<li><strong>LL RCC</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings for H5.</li>
<li>Fixed missing ETH PTP and PLAY1 clock dividers in rcc_ex.h for H5
4M.</li>
<li>Fixed RCC_PERIPHCLOCK_ALL macro for H5 4M.</li>
<li>Fixed coverity and Doxygen issues.</li>
</ul></li>
<li><strong>LL RTC</strong> driver
<ul>
<li>Fixed register bitfield overwriting issues.</li>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
</ul></li>
<li><strong>LL SAI</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
</ul></li>
<li><strong>LL SDMMC</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
</ul></li>
<li><strong>LL TIM</strong> driver
<ul>
<li>Fixed MISRA-C:2012 compliance warnings.</li>
<li>Fixed H5-128K and H5-512K after CMSIS device update.</li>
</ul></li>
<li><strong>LL UART</strong> driver
<ul>
<li>Fixed transfer count and underflow issues.</li>
</ul></li>
</ul></li>
</ul>
<p>Note: HAL/LL Backward compatibility ensured by legacy defines.</p>
<h2 id="known-limitations-1">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="backward-compatibility-1">Backward compatibility</h2>
<ul>
<li>No compatibility break</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true">
<label for="collapse-section6" aria-hidden="true"><strong>V1.5.0 /
05-February-2025</strong></label>
<div>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li><p>Maintenance Release V1.5.0 of <strong>HAL and LL drivers</strong>
for <strong>STM32H573xx / STM32H563xx / STM32H562xx / STM32H503xx /
STM32H523xx/ STM32H533xx</strong> devices</p></li>
<li><p><strong>Add SDIO HAL driver compliant with SDIO
3.0</strong></p></li>
<li><p>The HAL and LL drivers provided within this package are
<strong>MISRA-C, MCU ASTYLE and Coverity compliant</strong>, and have
been reviewed with a static analysis tool to eliminate possible run-time
errors</p></li>
<li><p>General updates to fix known defects and implementation
enhancements</p>
<ul>
<li><strong>HAL drivers</strong> :
<ul>
<li><strong>HAL</strong> driver
<ul>
<li>Add HAL_SDIO_MODULE_ENABLED, USE_HAL_SDIO_REGISTER_CALLBACKS,
SDIO_MAX_IO_NUMBER and USE_SDIO_TRANSCEIVER defines in
“hal_conf_template.h” file</li>
</ul></li>
<li><strong>HAL ETH</strong> driver
<ul>
<li>Add HAL_ETH_GetTxBuffersNumber define to get buffers in use
number</li>
<li>Fix context descriptor not handled properly when timestamping is
enabled</li>
</ul></li>
<li><strong>HAL SDMMC</strong> driver
<ul>
<li>Add SDIO HAL driver compliant with SDIO 3.0</li>
<li>Add defines of response results after operating with RPMB partition:
<ul>
<li>HAL_MMC_ERROR_RPMB_OPERATION_OK<br />
</li>
<li>HAL_MMC_ERROR_RPMB_GENERAL_FAILURE<br />
</li>
<li>HAL_MMC_ERROR_RPMB_AUTHENTICATION_FAILURE<br />
</li>
<li>HAL_MMC_ERROR_RPMB_COUNTER_FAILURE<br />
</li>
<li>HAL_MMC_ERROR_RPMB_ADDRESS_FAILURE<br />
</li>
<li>HAL_MMC_ERROR_RPMB_WRITE_FAILURE<br />
</li>
<li>HAL_MMC_ERROR_RPMB_READ_FAILURE<br />
</li>
<li>HAL_MMC_ERROR_RPMB_KEY_NOT_YET_PROG<br />
</li>
<li>HAL_MMC_ERROR_RPMB_COUNTER_EXPIRED<br />
</li>
<li>HAL_MMC_USER_AREA_PARTITION</li>
<li>HAL_MMC_BOOT_PARTITION1<br />
</li>
<li>HAL_MMC_BOOT_PARTITION2<br />
</li>
<li>HAL_MMC_RPMB_PARTITION<br />
</li>
<li>HAL_MMC_SwitchPartition<br />
</li>
<li>HAL_MMC_GetRPMBError<br />
</li>
</ul></li>
<li>Add Replay Protected Memory Block management defines:
<ul>
<li>HAL_MMC_RPMB_ProgramAuthenticationKey</li>
<li>HAL_MMC_RPMB_ProgramAuthenticationKey_IT<br />
</li>
<li>HAL_MMC_RPMB_GetWriteCounter</li>
<li>HAL_MMC_RPMB_GetWriteCounter_IT</li>
<li>HAL_MMC_RPMB_WriteBlocks<br />
</li>
<li>HAL_MMC_RPMB_WriteBlocks_IT</li>
<li>HAL_MMC_RPMB_ReadBlocks<br />
</li>
<li>HAL_MMC_RPMB_ReadBlocks_IT</li>
</ul></li>
</ul></li>
<li><strong>HAL USB</strong> driver
<ul>
<li>SA0035 fixed</li>
</ul></li>
</ul></li>
<li><strong>LL drivers</strong> :
<ul>
<li><strong>LL SDMMC</strong> driver
<ul>
<li>Add SDIO defines:
<ul>
<li>SDMMC_SDIO_R5_ERROR<br />
</li>
<li>SDMMC_SDIO_R5_OUT_OF_RANGE<br />
</li>
<li>SDMMC_SDIO_R5_INVALID_FUNCTION_NUMBER<br />
</li>
<li>SDMMC_SDIO_R5_GENERAL_UNKNOWN_ERROR<br />
</li>
<li>SDMMC_SDIO_R5_IO_CURRENT_STATE<br />
</li>
<li>SDMMC_SDIO_R5_ILLEGAL_CMD<br />
</li>
<li>SDMMC_SDIO_R5_COM_CRC_FAILED<br />
</li>
<li>SDMMC_SDIO_R5_ERRORBITS<br />
</li>
<li>SDMMC_SDIO_MODE_BYTE<br />
</li>
<li>SDMMC_SDIO_MODE_BLOCK<br />
</li>
<li>SDMMC_SDIO_NO_INC<br />
</li>
<li>SDMMC_SDIO_AUTO_INC<br />
</li>
<li>SDMMC_SDIO_WO<br />
</li>
<li>SDMMC_SDIO_RAW<br />
</li>
</ul></li>
<li>Add SDIO SDMMC_SDIO_CCCR defines</li>
</ul></li>
</ul></li>
</ul></li>
</ul>
<p>Note: HAL/LL Backward compatibility ensured by legacy defines.</p>
<h2 id="known-limitations-2">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="backward-compatibility-2">Backward compatibility</h2>
<ul>
<li>No compatibility break</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true">
<label for="collapse-section5" checked aria-hidden="true"><strong>V1.4.0
/ 30-October-2024</strong></label>
<div>
<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li><p>Maintenance Release V1.4.0 of <strong>HAL and LL drivers</strong>
for <strong>STM32H573xx / STM32H563xx / STM32H562xx / STM32H503xx /
STM32H523xx/ STM32H533xx</strong> devices</p></li>
<li><p>The HAL and LL drivers provided within this package are
<strong>MISRA-C, MCU ASTYLE and Coverity compliant</strong>, and have
been reviewed with a static analysis tool to eliminate possible run-time
errors</p></li>
<li><p>General updates to fix known defects and implementation
enhancements</p>
<ul>
<li><strong>HAL drivers</strong> :
<ul>
<li><strong>HAL CRYP</strong> driver
<ul>
<li>Code quality enhancement MISRAC 2012 Rule-10.4</li>
</ul></li>
<li><strong>HAL DAC</strong> driver
<ul>
<li>HAL DAC calibration procedure (function HAL_DACEx_SelfCalibrate() )
fix to manage case of calibration factor equal to range maximum value
(previously, in this case calibration factor was reset, leading to
voltage accuracy not optimal)</li>
</ul></li>
<li><strong>HAL DMA_EX</strong> driver
<ul>
<li>Update CLLR register value</li>
<li>Remove duplicated assert checking</li>
</ul></li>
<li><strong>HAL FLASH</strong> driver
<ul>
<li>Update Flash driver to support 32 bits write operation in the EDATA
area</li>
</ul></li>
<li><strong>HAL FLASH_EX</strong> driver
<ul>
<li>Add of HAL_FLASHEx_OBK_Swap_IT() function</li>
</ul></li>
<li><strong>HAL FMAC</strong> driver
<ul>
<li>Add action to abort, if configured, the DMAIn and/or the DMAOut in
HAL_FMAC_FilterStop. This allows to reset the DMA State to READY</li>
</ul></li>
<li><strong>HAL GTZC</strong> driver
<ul>
<li>Updated HAL_GTZC_TZSC_MPCWM_ConfigMemAttributes() and
HAL_GTZC_TZSC_MPCWM_GetConfigMemAttributes() for MPCWM3 and MPCWM4 to be
aligned with the hardware specification</li>
</ul></li>
<li><strong>HAL LPTIM</strong> driver
<ul>
<li>Remove redundant IS_LPTIM_AUTORELOAD macro</li>
</ul></li>
<li><strong>HAL PKA</strong> driver
<ul>
<li>add check for MontgomeryParam not equal to null</li>
</ul></li>
<li><strong>HAL PWR</strong> driver
<ul>
<li>Add guidance for HAL_PWR_ConfigAttributes() API calls</li>
</ul></li>
<li><strong>HAL RCC driver</strong>
<ul>
<li>Fix incorrect HAL_RCCEx_GetPLLxClockFreq() when fractional part is
enabled</li>
<li>Add g for HAL_RCC_ConfigAttributes() API calls</li>
</ul></li>
<li><strong>HAL RNG driver</strong>
<ul>
<li>Add HAL_RNG_ERROR_RECOVERSEED define</li>
</ul></li>
<li><strong>HAL RTC_EX driver</strong>
<ul>
<li>Add HAL_RTCEx_EnableRemapRtcOut2 and HAL_RTCEx_DisableRemapRtcOut2
defines<br />
</li>
</ul></li>
<li><strong>HAL SPI</strong> driver
<ul>
<li>Fix issue with HAL_SPI_Abort_IT in DMA mode to ensure DMA RX aborts
after DMA TX</li>
<li>HAL code quality enhancement for MISRA-C2012 Rule-8.13</li>
</ul></li>
<li><strong>HAL UART</strong> driver
<ul>
<li>Fix DMA Rx abort procedure impact on ongoing Tx transfer in
polling</li>
</ul></li>
<li><strong>HAL XSPI</strong> driver
<ul>
<li>Check BUSY flag instead of TC flag in indirect mode to be sure that
command is well completed (FIFO flush)</li>
</ul></li>
</ul></li>
<li><strong>LL drivers</strong> :
<ul>
<li><strong>LL DMA</strong> driver
<ul>
<li>Fix in linked list node initialization</li>
<li>Add missing assert checking in some LL linked-list case</li>
</ul></li>
<li><strong>LL RCC</strong> driver
<ul>
<li>Add missing definition and processing of
LL_RCC_USB_CLKSOURCE_PLL2Q</li>
</ul></li>
<li><strong>LL RTC</strong> driver
<ul>
<li>Add LL_RTC_EnableRemapRtcOut2 define</li>
</ul></li>
<li><strong>LL USB</strong> driver
<ul>
<li>Fix added to support bulk transfer in double buffer mode</li>
</ul></li>
</ul></li>
</ul></li>
</ul>
<p>Note: HAL/LL Backward compatibility ensured by legacy defines.</p>
<h2 id="known-limitations-3">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="backward-compatibility-3">Backward compatibility</h2>
<ul>
<li>No compatibility break</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true">
<label for="collapse-section4" checked aria-hidden="true"><strong>V1.3.0
/ 05-June-2024</strong></label>
<div>
<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li><p>Maintenance release V1.3.0 of <strong>HAL and LL drivers</strong>
for <strong>STM32H573xx / STM32H563xx / STM32H562xx / STM32H503xx /
STM32H523xx/ STM32H533xx</strong> devices</p></li>
<li><p>The HAL and LL drivers provided within this package are
<strong>MISRA-C, MCU ASTYLE and Coverity compliant</strong>, and have
been reviewed with a static analysis tool to eliminate possible run-time
errors</p></li>
<li><p>General updates to fix known defects and implementation
enhancements</p>
<ul>
<li><strong>HAL drivers</strong> :
<ul>
<li>HAL I3C driver:
<ul>
<li>Add HAL_I3C_TARGET_RESET_PATTERN, HAL_I3C_HDR_EXIT_PATTERN,
HAL_I3C_RESET_PATTERN_DISABLE, HAL_I3C_RESET_PATTERN_ENABLE and
IS_I3C_RESET_PATTERN defines</li>
<li>Add HAL_I3C_Ctrl_SetConfigResetPattern,
HAL_I3C_Ctrl_GetConfigResetPattern and HAL_I3C_Ctrl_GenerateArbitration
functions</li>
</ul></li>
</ul></li>
<li><strong>LL drivers</strong> :
<ul>
<li>LL RNG driver:
<ul>
<li>Add LL_RNG_SetNoiseConfig and LL_RNG_GetNoiseConfig functions</li>
</ul></li>
<li>LL SYSTEM driver:
<ul>
<li>Remove LL_SBS_SMPS_SEC and LL_SBS_SMPS_NSEC defines</li>
</ul></li>
<li>LL TIM driver:
<ul>
<li>Remove irrelevant LL_TIM_OCREF_CLR_INT_OCREF_CLR and
TIM_CLEARINPUTSOURCE_OCREFCLR constants</li>
</ul></li>
</ul></li>
</ul></li>
</ul>
<p>Note: HAL/LL Backward compatibility ensured by legacy defines.</p>
<h2 id="known-limitations-4">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="backward-compatibility-4">Backward compatibility</h2>
<ul>
<li>No compatibility break</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true">
<label for="collapse-section3" checked aria-hidden="true"><strong>V1.2.0
/ 07-February-2024</strong></label>
<div>
<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li><p>First offiicial release of HAL and LL drivers to support
<strong>STM32H533xx and STM32H523xx</strong> devices</p>
<ul>
<li>HAL drivers :
<ul>
<li>HAL GENERIC driver:
<ul>
<li>Update HAL_InitTick() API to manage multiple SysTick clock source
(Ticket 167747).</li>
</ul></li>
<li>HAL CORTEX driver:
<ul>
<li>Add new API HAL_SYSTICK_GetCLKSourceConfig() to get SysTick clock
source.</li>
<li>Update HAL_SYSTICK_Config() API to manage multiple SysTick clock
source (Ticket 167747).</li>
</ul></li>
<li>HAL RCC driver:
<ul>
<li>Update HAL_RCC_NMI_IRQHandler() to clear flag before callback
(Ticket 158329).</li>
<li>Correct RCC_PERIPHCLOCK_ALL define value for H5-512K.</li>
</ul></li>
<li>HAL GPIO driver:
<ul>
<li>Add missing AFs in H5-512K : GPIO_AF2_TIM8, GPIO_AF4_SPI3 and
GPIO_AF6_USART6.</li>
</ul></li>
<li>HAL EXTI driver:
<ul>
<li>Correct EXTI_LINE_NB define for all H5 derivatives.</li>
</ul></li>
<li>HAL ADC driver:
<ul>
<li>Add new Helper macro (__HAL_ADC_CALC_DIFF_DATA_TO_VOLTAGE()) for
differential mode raw data to voltage conversion (Ticket 155612).</li>
</ul></li>
<li>HAL DMA driver:
<ul>
<li>Add peripheral flow control check PFREQ (early termination) in
HAL_DMA_Init() API.</li>
</ul></li>
<li>HAL ETH driver:
<ul>
<li>Rename ETH_TxPacketConfig to ETH_TxPacketConfigTypeDef</li>
<li>Update ETH_Start_IT sequence (Ticket 154251)</li>
<li>Fix PTP APIs (Ticket 137427)</li>
<li>Add condition to get the TimeStamp only when it was captured (Ticket
157128)</li>
<li>Update ReadData() API to use real latest buffer length received
instead of predefined ethernet frame length (Tickets 152028 &
157139)</li>
<li>Update HAL_ETH_SetMDIOClockRange API (Ticket 159046 &
157253)</li>
<li>Update HAL_ETH_IRQHandler API : Remove multiple volatile reads or
writes (Ticket 111542)</li>
<li>Update HAL_ETH_Init() API : Disable of unwanted interrupts section
moved from HAL_ETH_Start_IT() to HAL_ETH_Init() (Ticket 159576)</li>
<li>Update ETH_Prepare_Tx_Descriptors() API to avoid enabling unwanted
global interrupts (Ticket 125056)</li>
<li>Update ETH_UpdateDescriptor() to avoid that ETH DMA peripheral reads
incorrect Rx buffer address (Ticket 159272)</li>
<li>Update on MAC L4/L3 Set/Get Filter config functions to avoid code
coverage issues</li>
<li>Update on HAL_ETH_ReleaseTxPacket() to use the right way to
increment descriptors (Ticket 155726)</li>
<li>Rename PTP configuration state defines :
<ul>
<li>HAL_ETH_PTP_NOT_CONFIGURATED to HAL_ETH_PTP_NOT_CONFIGURED</li>
<li>HAL_ETH_PTP_CONFIGURATED to HAL_ETH_PTP_CONFIGURED</li>