Hi all,
I'm working on an RFC about making address 0x0 valid for raw pointer operations and putting a "zeroable reference" alongside the non-zero one, motivated by bare-metal targets where hardware places valid object at that RAM address.
Latest RFC here: https://universet-uendelege.notion.site/Dereferenceable-Zero-322fb761f47480a5a825f12bc081bbf8
A couple of things I'd particularly appreciate perspectives on:
- Does the problem described match real barriers you've encountered or foreseen?
- In your experience, would reliance on inline assembly or volatile workarounds to access address 0x0 pose issues during certification review (e.g. under DO-178C, ISO 26262, ECSS, etc.)?
- Any technical concerns or supporting evidence I may have missed?
No rush - just looking for informed perspective. Thank you.
Hi all,
I'm working on an RFC about making address 0x0 valid for raw pointer operations and putting a "zeroable reference" alongside the non-zero one, motivated by bare-metal targets where hardware places valid object at that RAM address.
Latest RFC here: https://universet-uendelege.notion.site/Dereferenceable-Zero-322fb761f47480a5a825f12bc081bbf8
A couple of things I'd particularly appreciate perspectives on:
No rush - just looking for informed perspective. Thank you.