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Merge pull request #369 from matthew-kapp/Tdep-thermal
Fixes issue #234 using same inputs
2 parents a17e8ea + cf61717 commit 8f9ab6a

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src/Thermal/HeatTransfer/sources.jl

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@@ -28,7 +28,9 @@ the component FixedHeatFlow is connected, if parameter `Q_flow` is positive.
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end
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@equations begin
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port.Q_flow ~ -Q_flow * (1 + alpha * (port.T - T_ref))
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port.Q_flow ~ ifelse(alpha == 0.0,
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-Q_flow, # Simplified equation when alpha is 0
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-Q_flow * (1 + alpha * (port.T - T_ref)))
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end
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end
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test/Thermal/thermal.jl

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@@ -155,3 +155,30 @@ end
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zeros(length(sol[collector.port_b.Q_flow]))
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@test sol[collector.port_b.T] == sol[collector.port_a1.T] == sol[collector.port_a2.T]
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end
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@testset "FixedHeatFlow with alpha=0.0 test" begin
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@mtkmodel TestModel begin
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@components begin
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temp = FixedTemperature(T=300)
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heatflow = FixedHeatFlow(Q_flow=-1.0)
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wall = ThermalResistor(R=1)
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end
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@equations begin
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connect(temp.port, wall.port_a)
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connect(wall.port_b, heatflow.port)
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end
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end
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@info "Building a FixedHeatFlow with alpha=0.0"
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@mtkbuild test_model = TestModel()
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prob = ODEProblem(test_model, Pair[], (0, 10.0))
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sol = solve(prob)
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heat_flow = sol[test_model.heatflow.port.Q_flow]
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@test SciMLBase.successful_retcode(sol) # Ensure the simulation is successful
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@test all(isapprox.(heat_flow, 1.0, rtol=1e-6)) # Heat flow value should be equal to the fixed value defined
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end

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