Raspberry Pi 5 uses PCIe hat/dual hat | Seeed Studio Wiki

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Raspberry Pi 5 uses PCIe hat/dual hat | Seeed Studio Wiki

This tutorial mainly introduces the hardware connection configuration of M.2 Hat and dual Hat and how to make the Raspberry Pi boot from the SSD.

https://wiki.seeedstudio.com/raspberry_pi_5_uses_pcie_hat_dual_hat/

[pop-aruaru]

Why size of screws are not noted?
I want to know when attach more expansion board.
M3 , M2.5 or inch pitch.

[LJ-Hao]

Here is the size of screws.

[pop-aruaru]

I wanted to know about the screws used to stack HAT. This is because the nut is fixed to the board and cannot be replaced. I already bought it and know that it can be fixed with M2.6. M2.5 might also be good. However, this is information that should be provided by the supplier.

[pop-aruaru]

I forgot to thank you. However, your information is about the screws that fix the SSD, which is not what I was looking for. Also, it is provided by the manufacturer, so there is no need for me to prepare it.

[LJ-Hao]

Here you are:

[pop-aruaru]

You understand that you need to include the screw information, and I don't use plastic screws that can break off. If so, please include it in the HAT documentation so I can remove my comment.

[panyajan]

After boot error pcie unable to charge power state from D3cold to D0 device inaccessible

[LJ-Hao]

Please make sure Hat's pogo pin connect with Pi5 GPIO pad.

[pop-aruaru]

I think that the 5V is taken from the pogo pins to create the voltage used by the SSD board so that this board does not become unstable even if the 3V current that the Pi5 can supply is insufficient. Therefore, I think that it will not work unless the pogo pins are firmly in contact with the Pi5. It is better to tighten the screws firmly. However, since it is a plastic screw, it is moderate.

[inguyenanh]

Hi ,
I am error on boot pcie unable to charge power state from D3cold to D0 device inaccessible.
My NVME is CRUCIAL PCIe 3.0 2T

[nfs0619]

Hello @inguyenanh ,

Please make sure that the HAT's pogo pins are properly connected to the Pi5 GPIO pads. If the issue persists, I recommend reaching out to our technical support team at [email protected] for further assistance.

Let us know if you need any more help!

[inguyenanh]

Hello nfs0619,
Thank you for answering me, how can I find Hat's pogo pin? and how do I connect them ?
Best regards

[LJ-Hao]

Please follow this link:https://wiki.seeedstudio.com/raspberry_pi_5_uses_pcie_hat_dual_hat/

[inguyenanh]

I think your wiki is for PCIE2.0 Dual HAT. I recently bought a PCIE3.0 Dual HAT. I used this wiki, but it doesn't work.
I discovered by chance that if I boot with an old SD card with RPI OS date 2024-10-08, it works. If I type lsblk, I see the PCIE3.0 card with the NVME disk.
If I updated my SD card with sudo apt update && sudo apt upgrade, I rebooted Raspberry Pi, and then I typed lsblk again. I lost the NMVE disk. At this point, I checked that the OS version of my SD card is RPI OS date 2025-03-19. After several days of searching, I found a compromise:

• I copied a new SD card with RPI Imager (in this case, my RPI OS version is 2024-10-08) and booted my RPI with PCIE3.0 Dual HAT from this SD card. During boot, RPI OS asks you to update, click SKIP, and RPI OS boots with version 2024-10-08.
• Under RPI OS, open a terminal, update the bootloader with: sudo rpi-eeprom-update, and without rebooting, modify the eeprom configuration: sudo rpi-eeprom-config --edit, add PCIE_PROBE=1 at the end, and save the file. - Still under RPI OS, type: sudo nano /boot/firmware/config.txt
  Add these lines to the end of the file:
  dtparam=pciex1
  dtparam=pciex1_gen=3
  dtoverlay=pciex1-compat-pi5,no-mip,mmio-hi
  and save this file (mmio-hi is very, very, very important).
• Now you can update RPI OS with:
  sudo apt update && sudo apt upgrade. After the update, you can reboot your RPI, still with an SD card.
• After booting, under terminal, type: sudo uname -a to check if the RPI OS version has been changed and lsblk if your NVME is still there. - If everything is OK, copy the SD card to the NVME drive using the SD CARD COPIER utility (if you use this method, the SD card's config.txt file will be copied to the NVME drive).
  Remove the SD card, and reboot will be on the PCIE3.0 dual HAT card's NVME drive.
  The benchmark I ran is twice as fast as the benchmark on your wiki, because it's the real PCIE3.0 dual HAT benchmark.
  I hope this helps.

[nfs0619]

Thank you very much for sharing your experience and the detailed steps! We'll refer to your method for testing and verification. This information is very valuable for us and other users as well. Thanks again for your feedback!

[inguyenanh]

Hi,
The reason why iIset this mmio-hi parameter to workaround the problem of lost NVME drive on boot behind the brigde ASM2806, this is the explain:
raspberrypi/linux#6278 (comment)
I hope this help.

[Henry-Hyunkyu-Lee]

I’m trying to configure the Raspberry Pi 5 with the following setup:
– GS camera (MIPI CSI)
– Official Raspberry Pi Touch Display (MIPI DSI)
– Seeed Studio M.2 Dual HAT with SSD and HALIO8

I understand that enabling PCIe using the overlay dtoverlay=pciex1-compat-pi5,no-mip,mmio-hi disables the MIPI CSI and DSI ports due to the no-mip parameter.

Is there any way to use PCIe devices (SSD and HALIO8) and keep MIPI CSI/DSI enabled at the same time on Raspberry Pi 5?

[inguyenanh]

Hi,
You can remove no-mip, keep dtoverlay=pci1-compat-pi5,mmio-hi, that boot on PCI3 with NVME +HALI08 no problem.

[rtheobald]

I've installed an Aquantia/Marvell AQC107 10GE M.2 network adapter along with a Fanxiang 500GB NVME with this and it seems to be working fine.

-[0001:00]---00.0-[01-06]----00.0-[02-06]--+-00.0-[03]----00.0  MAXIO Technology (Hangzhou) Ltd. NVMe SSD Controller MAP1202 (DRAM-less)
                                           +-02.0-[04]--
                                           +-06.0-[05]--
                                           \-0e.0-[06]----00.0  Aquantia Corp. AQtion AQC113 NBase-T/IEEE 802.3an Ethernet Controller [Antigua 10G]

Iperf3 shows it transmits/receives at around 5.5-6 Gbps

I did have to update the Pi5 firmware and am running Ubuntu 25.04.

It runs really toasty, though that is no fault of the dual hat. Thinking of replacing the passive cooler on the network M.2 adapter with an active one.

[naturalv8]

does this dual hat support dual hailo8? not installing any ssd.

[nfs0619]

Hi, theoretically it should support dual Hailo-8, but we haven’t tested this setup yet.

[SalemSabrehagen]

Hi,
i purchsed 2x PCI3.0 to dual M.2 hats for Raspberry Pi 5 and mounted original Raspberry Pi SSD 256GB NVMe on each.
I power the RasPi5 with the original 5amp power supply.
I followed your instructions closely.
Hat controller and SSD get brurning hot after a few seconds and stop working.
What's wrong ?

Greetings,
Ralf.

[ReKST-117]

Hi, please contact us at [email protected]

[SalemSabrehagen]

Thank you,
[##328663##] ticket has been created
Ralf.

[jthompson666a-bot]

Hello, can I ask some questions about this board?

I need to mount it in a location other than under the raspberry pi 5. I have another UPS board under there. How can I remotely power this seeed studio board? Where are the 5V positive and negative terminals? I'm thinking if I can de-solder the pogo pins I could connect leads there? Would that work? I want to give it full power not just rely on the 5V|1A from the PCIE connector.

Also what type of connector cable do I need to go from the raspberry pi 5 to this seeed studio board? Is a 16-pin, 0.5mm pitch cable? Can I get a 100mm or 150mm?

[LJ-Hao]

It can be mounted on the front side, but you will need to use a soldering iron and solder to connect the pogo pin leads to the corresponding pads. If you want to provide the HAT with full voltage, please refer to our hardware schematic for your design.
hat.pdf

[nocanstillbb]

Can it be used on a Raspberry Pi CM5? I am using it on a CM5 and cannot see the NVMe device in lsblk, but can only see it in lspci

My configuration is as follows：

dv@cm5:~ $ lspci
0001:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 30)
0001:01:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0001:02:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0001:02:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0001:02:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0001:02:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0001:03:00.0 Co-processor: Hailo Technologies Ltd. Hailo-8 AI Processor (rev 01)
0001:05:00.0 Non-Volatile memory controller: MAXIO Technology (Hangzhou) Ltd. NVMe SSD Controller MAP1202 (rev 01)
0002:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 30)
0002:01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 PCIe 2.0 South Bridge

dv@rsap5:~ $ lsblk
NAME         MAJ:MIN RM  SIZE RO TYPE MOUNTPOINTS
mmcblk0      179:0    0 29.1G  0 disk
├─mmcblk0p1  179:1    0  512M  0 part /boot/firmware
└─mmcblk0p2  179:2    0 28.6G  0 part /
mmcblk0boot0 179:32   0    4M  1 disk
mmcblk0boot1 179:64   0    4M  1 disk

/boot/firmware/config.txt

dv@rsap5:~ $ cat /boot/firmware/config.txt
# For more options and information see
# http://rptl.io/configtxt
# Some settings may impact device functionality. See link above for details

# Uncomment some or all of these to enable the optional hardware interfaces
dtparam=i2c_arm=on
dtparam=i2c_vc=on
dtoverlay=at24
force_eeprom_read=0
disable_poe_fan=1

#dtparam=i2s=on
#dtparam=spi=on

# Enable audio (loads snd_bcm2835)
dtparam=audio=on

# Additional overlays and parameters are documented
# /boot/firmware/overlays/README

# Automatically load overlays for detected cameras
camera_auto_detect=0

# Automatically load overlays for detected DSI displays
display_auto_detect=1

# Automatically load initramfs files, if found
auto_initramfs=1

# Enable DRM VC4 V3D driver
dtoverlay=vc4-kms-v3d
#dtoverlay=vc4-fkms-v3d
#dtoverlay=vc4-kms-v3d,cam-512
max_framebuffers=2

# Don't have the firmware create an initial video= setting in cmdline.txt.
# Use the kernel's default instead.
disable_fw_kms_setup=1

# Run in 64-bit mode
arm_64bit=1

# Disable compensation for displays with overscan
disable_overscan=1

# Run as fast as firmware / board allows
arm_boost=1

[cm4]
# Enable host mode on the 2711 built-in XHCI USB controller.
# This line should be removed if the legacy DWC2 controller is required
# (e.g. for USB device mode) or if USB support is not required.
otg_mode=1

[cm5]
dtoverlay=dwc2,dr_mode=host
gpio=10=op,dh


[all]
usb_max_current_enable=1

dtoverlay=uart0
dtoverlay=uart2

#dtoverlay=pwm-2chan
dtoverlay=pwm

dtparam=pciex1
dtparam=pciex1_gen=3
dtoverlay=pciex1-compat-pi5,no-mip,mmio-hi

sudo EDITOR=vim rpi-eeprom-config --edit

[all]
BOOT_UART=1
# Switch off PMIC outputs on HALT
POWER_OFF_ON_HALT=0

# Default BOOT_ORDER for provisioning
# SD -> NVMe -> USB -> Network
BOOT_ORDER=0xf146
PCIE_PROBE=1

[ReKST-117]

Hi, please contact us at [email protected] for help. Thanks!

[BareMetalTinker]

Hi,
regarding item 7, outer casing, I opened the stl file I get two parts, which I guess you can define those as outer case but what about the inner frame? Where do I get this stl file/part? I might be missing a link or something I don't understand.

Thank you

[xinjiechen727]

Please visit the link and download it to confirm whether it is the file you need:
https://files.seeedstudio.com/wiki/AI-Box/PCIe_to_dual_M.2_hat_for_Raspberry_Pi_5_v1.stp

[ocean1]

Hi,
two questions: does this support two downstream pcie busses on the same slot? (m+b?)
If so, are there any adapters that would work to use both cores on a coral dual tpu a+e card?

I'm aware there are some M key adapters that will use an asmedia chip as a pcie bridge (two downstream bus to coral tpu, one upstream on the m key lanes), but if this hat supports two busses on the same slot it would be a waste to only make use of a single pcie bus with an additional bridge in the middle.