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Update print adapter for recompilation and add recompilation to type specialize
1 parent 414aa62 commit a0e5729

1 file changed

Lines changed: 9 additions & 2 deletions

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zjit/src/hir.rs

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2097,7 +2097,13 @@ impl<'a> std::fmt::Display for InsnPrinter<'a> {
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Insn::IntOr { left, right } => { write!(f, "IntOr {left}, {right}") },
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Insn::FixnumLShift { left, right, .. } => { write!(f, "FixnumLShift {left}, {right}") },
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Insn::FixnumRShift { left, right, .. } => { write!(f, "FixnumRShift {left}, {right}") },
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Insn::GuardType { val, guard_type, .. } => { write!(f, "GuardType {val}, {}", guard_type.print(self.ptr_map)) },
2100+
Insn::GuardType { val, guard_type, recompile, .. } => {
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write!(f, "GuardType {val}, {}", guard_type.print(self.ptr_map))?;
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if recompile.is_some() {
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write!(f, " recompile")?;
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}
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return Ok(())
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},
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Insn::RefineType { val, new_type, .. } => { write!(f, "RefineType {val}, {}", new_type.print(self.ptr_map)) },
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Insn::HasType { val, expected, .. } => { write!(f, "HasType {val}, {}", expected.print(self.ptr_map)) },
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Insn::GuardBitEquals { val, expected, recompile, .. } => {
@@ -3671,7 +3677,8 @@ impl Function {
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// Add GuardType for profiled receiver
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if let Some(profiled_type) = profiled_type {
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recv = self.push_insn(block, Insn::GuardType { val: recv, guard_type: Type::from_profiled_type(profiled_type), state, recompile: None });
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let argc = unsafe { vm_ci_argc(ci) } as i32;
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recv = self.push_insn(block, Insn::GuardType { val: recv, guard_type: Type::from_profiled_type(profiled_type), state, recompile: Some(Recompile::ProfileSend { argc }) });
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}
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let send_direct = self.push_insn(block, Insn::SendDirect { recv, cd, cme, iseq, args: processed_args, kw_bits, state: send_state, block: send_block });

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