fsl-imx8mq-hummingboard-pulse.dts

/*
 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;

#include "fsl-imx8mq.dtsi"
#include "fsl-imx8mq-sr-som.dtsi"

/ {
	model = "SolidRun i.MX8MQ HummingBoard Pulse";
	compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";

	chosen {
		bootargs = "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200";
		stdout-path = &uart1;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usdhc2_vmmc: usdhc2_vmmc {
			compatible = "regulator-fixed";
			regulator-name = "VSD_3V3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		v_5v0: regulator-v-5v0 {
			compatible = "regulator-fixed";
			regulator-always-on;
			regulator-max-microvolt = <5000000>;
			regulator-min-microvolt = <5000000>;
			regulator-name = "v_5v0";
		};
	};

	sound-wm8524 {
		compatible = "fsl,imx-audio-wm8524";
		model = "wm8524-audio";
		audio-cpu = <&sai2>;
		audio-codec = <&wm8524>;
		audio-routing =
			"Line Out Jack", "LINEVOUTL",
			"Line Out Jack", "LINEVOUTR";
	};

	sound-hdmi {
		compatible = "fsl,imx-audio-cdnhdmi";
		model = "imx-audio-hdmi";
		audio-cpu = <&sai4>;
		protocol = <1>;
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-spdif";
		spdif-controller = <&spdif1>;
		spdif-out;
		spdif-in;
	};

	sound-hdmi-arc {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-hdmi-arc";
		spdif-controller = <&spdif2>;
		spdif-in;
	};

	wm8524: wm8524 {
		compatible = "wlf,wm8524";
		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
		clock-names = "mclk";
		wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_leds>;

		red {
			gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		greed {
			gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};
};

&clk {
	assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL2>;
	assigned-clock-rates = <786432000>, <722534400>;
};

&csi2_bridge {
	fsl,mipi-mode;
	fsl,two-8bit-sensor-mode;
	status = "disabled";

	port {
		csi2_ep: endpoint {
			remote-endpoint = <&csi2_mipi_ep>;
		};
	};
};

&dcss {
	status = "okay";

	disp-dev = "hdmi_disp";
};

&gpu {
	status = "okay";
};

&gpu_pd {
	power-supply = <&sw1a_reg>;
};

&hdmi {
	status = "okay";
};

&hdmi_cec {
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	imx8mq-evk {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX8MQ_IOMUXC_NAND_READY_B_GPIO3_IO16		0x19
				MX8MQ_IOMUXC_NAND_WE_B_GPIO3_IO17		0x19
				MX8MQ_IOMUXC_NAND_WP_B_GPIO3_IO18		0x19
			>;
		};

		pinctrl_csi2: csi2grp {
			fsl,pins = <
/* Place holder until PowerDown and Reset GPIOs are finalized.
				MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5		0x19
				MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6		0x19
*/
				MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2	0x59
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL			0x4000007f
				MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA			0x4000007f
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL			0x4000007f
				MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA			0x4000007f
			>;
		};

		pinctrl_pcie1: pcie1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_I2C4_SDA_GPIO5_IO21	0x16
				MX8MQ_IOMUXC_ECSPI2_SCLK_GPIO5_IO10	0x16
				MX8MQ_IOMUXC_ECSPI2_MISO_GPIO5_IO12	0x16
			>;
		};

		pinctrl_sai1: sai1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI1_MCLK_SAI1_MCLK		0xd6
				MX8MQ_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC		0xd6
				MX8MQ_IOMUXC_SAI1_RXD7_SAI1_TX_SYNC		0xd6
				MX8MQ_IOMUXC_SAI1_TXC_SAI1_TX_BCLK		0xd6
				MX8MQ_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0		0xd6
				MX8MQ_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1		0xd6
				MX8MQ_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2		0xd6
				MX8MQ_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3		0xd6
				MX8MQ_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4		0xd6
				MX8MQ_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5		0xd6
				MX8MQ_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6		0xd6
				MX8MQ_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7		0xd6
			>;
		};

		pinctrl_sai2: sai2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
				MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
				MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
				MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
				MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8	0xd6
			>;
		};

		pinctrl_sai5: sai5grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI5_MCLK_SAI5_MCLK	0xd6
				MX8MQ_IOMUXC_SAI5_RXC_SAI5_RX_BCLK	0xd6
				MX8MQ_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC	0xd6
				MX8MQ_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0	0xd6
				MX8MQ_IOMUXC_SAI5_RXD1_SAI5_RX_DATA1    0xd6
				MX8MQ_IOMUXC_SAI5_RXD2_SAI5_RX_DATA2    0xd6
				MX8MQ_IOMUXC_SAI5_RXD3_SAI5_RX_DATA3    0xd6
			>;
		};

		pinctrl_spdif1: spdif1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SPDIF_TX_SPDIF1_OUT	0xd6
				MX8MQ_IOMUXC_SPDIF_RX_SPDIF1_IN		0xd6
			>;
		};


		pinctrl_typec: typecgrp {
			fsl,pins = <
				MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15	0x16
				MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6	0x17059
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
				MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
				MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
				MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
				MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
			>;
		};

		pinctrl_usbh1_vbus: usbh1-vbus {
			fsl,pins = <MX8MQ_IOMUXC_NAND_CE1_B_GPIO3_IO2	0x19>;
		};

		pinctrl_usdhc2_gpio: usdhc2grpgpio {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x41
				MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x83
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc3
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc3
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc3
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc3
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc3
				MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
			>;
		};

		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x85
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc5
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc5
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc5
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc5
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc5
				MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
			>;
		};

		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x87
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc7
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc7
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc7
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc7
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc7
				MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
			>;
		};

		pinctrl_leds: ledsgrp {
			fsl,pins = <
				MX8MQ_IOMUXC_ECSPI1_MISO_GPIO5_IO8		0x19
				MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x19
			>;
		};
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	ov5640_mipi2: ov5640_mipi2@3c {
		compatible = "ovti,ov5640_mipi";
		reg = <0x3c>;
		status = "disabled";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_csi2>;
		clocks = <&clk IMX8MQ_CLK_CLKO2_DIV>;
		clock-names = "csi_mclk";
		assigned-clocks = <&clk IMX8MQ_CLK_CLKO2_SRC>,
				  <&clk IMX8MQ_CLK_CLKO2_DIV>;
		assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_200M>;
		assigned-clock-rates = <0>, <20000000>;
		csi_id = <0>;
/*
		pwn-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		rst-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
*/
		mclk = <20000000>;
		mclk_source = <0>;
		port {
			ov5640_mipi2_ep: endpoint {
				remote-endpoint = <&mipi2_sensor_ep>;
			};
		};
	};

	typec_ptn5100: ptn5110@50 {
		compatible = "usb,tcpci";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_typec>;
		reg = <0x50>;
		interrupt-parent = <&gpio1>;
		interrupts = <6 8>;
		ss-sel-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
		src-pdos = <0x380190c8>;
		snk-pdos = <0x380190c8 0x3802d0c8>;
		max-snk-mv = <9000>;
		max-snk-ma = <2000>;
		op-snk-mw = <9000>;
		max-snk-mw = <18000>;
		port-type = "drp";
		default-role = "sink";
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	rtc@69 {
		compatible = "abracon,ab1805";
		reg = <0x69>;
	};
};

&mipi_csi_2 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "disabled";
	port {
		mipi2_sensor_ep: endpoint1 {
			remote-endpoint = <&ov5640_mipi2_ep>;
			data-lanes = <1 2>;
		};

		csi2_mipi_ep: endpoint2 {
			remote-endpoint = <&csi2_ep>;
		};
	};
};

&pcie1{
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie1>;
	ext_osc = <1>;
	status = "okay";
};

&sai1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	assigned-clocks = <&clk IMX8MQ_CLK_SAI1_SRC>,
			<&clk IMX8MQ_CLK_SAI1_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <49152000>;
	status = "okay";
};

&sai2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai2>;
	assigned-clocks = <&clk IMX8MQ_CLK_SAI2_SRC>,
			<&clk IMX8MQ_CLK_SAI2_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;
	status = "okay";
};

&sai4 {
	assigned-clocks = <&clk IMX8MQ_CLK_SAI4_SRC>,
			<&clk IMX8MQ_CLK_SAI4_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;
	status = "okay";
};

&sai5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai5>;
	assigned-clocks = <&clk IMX8MQ_CLK_SAI5_SRC>,
			<&clk IMX8MQ_CLK_SAI5_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <49152000>;
	fsl,sai-asynchronous;
	status = "okay";
};

&spdif1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif1>;
	assigned-clocks = <&clk IMX8MQ_CLK_SPDIF1_SRC>,
			<&clk IMX8MQ_CLK_SPDIF1_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;
	status = "okay";
};

&spdif2 {
	assigned-clocks = <&clk IMX8MQ_CLK_SPDIF2_SRC>,
			<&clk IMX8MQ_CLK_SPDIF2_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;
	status = "okay";
};

&uart2 { /* J-Header */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	assigned-clocks = <&clk IMX8MQ_CLK_UART2_SRC>;
	assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clk IMX8MQ_CLK_UART3_SRC>;
	assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
	fsl,uart-has-rtscts;
	status = "okay";
};

&usdhc2 {
	compatible = "fsl,imx8qm-usdhc";
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_usdhc2_vmmc>;
	status = "okay";
};

&usb_dwc3_0 {
	status = "okay";
	extcon = <&typec_ptn5100>;
	dr_mode = "otg";
};

&usb_dwc3_1 {
	status = "okay";
	dr_mode = "host";
};

&usb3_0 {
	status = "okay";
};

&usb3_1 {
	status = "okay";
};

&usb3_phy0 {
	status = "okay";
};

&usb3_phy1 {
	status = "okay";
};

&vpu {
	status = "okay";
};

&vpu_pd {
	power-supply = <&sw1c_reg>;
};