debug(pal): gate info table dumps behind debug print level

Update PAL info table creation routines to conditionally dump
internal tables only when debug verbosity is enabled. This avoids
unnecessary exuctung the dump functions saving execution cycles
while preserving debug visibility when required.

Applied consistently across multiple PAL modules.

Signed-off-by: Gowtham Siddarth <gowtham.siddarth@arm.com>
Change-Id: I76c41130041de4cbee1ee34bb7289a535493b2e4

Author: gowthamsiddarthd

pal/baremetal/base/src/pal_hmat.c

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2024-2025, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2024-2026, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -96,5 +96,6 @@ void pal_hmat_create_info_table(HMAT_INFO_TABLE *HmatTable)
       }
   }
 
-  pal_hmat_dump_info_table(HmatTable);
+  if (g_print_level <= ACS_PRINT_DEBUG)
+      pal_hmat_dump_info_table(HmatTable);
 }

pal/baremetal/base/src/pal_iovirt.c

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2023-2025, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2023-2026, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -289,9 +289,12 @@ pal_iovirt_create_info_table(IOVIRT_INFO_TABLE *IoVirtTable)
 
   block = &(IoVirtTable->blocks[0]);
   print(ACS_PRINT_DEBUG, " Number of IOVIRT blocks = %d\n", IoVirtTable->num_blocks);
-  for(i = 0; i < IoVirtTable->num_blocks; i++, block = IOVIRT_NEXT_BLOCK(block))
-  {
-    dump_block(block);
+
+  if (g_print_level <= ACS_PRINT_DEBUG) {
+      for (i = 0; i < IoVirtTable->num_blocks; i++, block = IOVIRT_NEXT_BLOCK(block))
+      {
+        dump_block(block);
+      }
   }
 
 }

pal/baremetal/base/src/pal_mpam.c

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2024-2025, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2024-2026, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -153,7 +153,9 @@ pal_mpam_create_info_table(MPAM_INFO_TABLE *MpamTable)
       MpamTable->msc_count++;
       curr_entry = MPAM_NEXT_MSC(curr_entry);
   }
-  pal_mpam_dump_table(MpamTable);
+
+  if (g_print_level <= ACS_PRINT_DEBUG)
+      pal_mpam_dump_table(MpamTable);
 }
 
 /**
@@ -207,5 +209,6 @@ pal_srat_create_info_table(SRAT_INFO_TABLE *SratTable)
       Ptr++;
   }
 
-  pal_srat_dump_table(SratTable);
+  if (g_print_level <= ACS_PRINT_DEBUG)
+      pal_srat_dump_table(SratTable);
 }

pal/baremetal/base/src/pal_pcc.c

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2024-2025, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2024-2026, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -36,6 +36,7 @@ pal_pcc_dump_info_table(PCC_INFO_TABLE *PccInfoTable)
 
   if (PccInfoTable == NULL) {
       print(ACS_PRINT_ERR, "\nUnable to dump PCC info table, input pointer is NULL\n");
+      return;
   }
 
   print(ACS_PRINT_INFO, "\n*** PCC Information ***");
@@ -127,7 +128,10 @@ pal_pcc_create_info_table(PCC_INFO_TABLE *PccInfoTable)
           = platform_pcc_cfg.pcc_info[i].type_spec_info.pcc_ss_type_3.min_req_turnaround_usec;
     }
     curr_entry++;
-   }
-  pal_pcc_dump_info_table(PccInfoTable);
+  }
+
+  if (g_print_level <= ACS_PRINT_DEBUG)
+      pal_pcc_dump_info_table(PccInfoTable);
+
   return;
 }

pal/baremetal/base/src/pal_pmu.c

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2024-2025, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2024-2026, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -93,7 +93,8 @@ pal_pmu_create_info_table(PMU_INFO_TABLE *PmuTable)
       }
 
       /* Dump PMU info table */
-      pal_pmu_dump_info_table(PmuTable);
+      if (g_print_level <= ACS_PRINT_DEBUG)
+          pal_pmu_dump_info_table(PmuTable);
   }
 }
 

pal/baremetal/base/src/pal_pptt.c

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2024-2025, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2024-2026, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -135,5 +135,7 @@ pal_cache_create_info_table(CACHE_INFO_TABLE *CacheTable, PE_INFO_TABLE *PeTable
    }
 
   pal_cache_store_pe_res(CacheTable, PeTable);
-  pal_cache_dump_info_table(CacheTable, PeTable);
+
+  if (g_print_level <= ACS_PRINT_DEBUG)
+      pal_cache_dump_info_table(CacheTable, PeTable);
 }

pal/baremetal/base/src/pal_ras.c

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2024-2025, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2024-2026, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -236,7 +236,8 @@ pal_ras_create_info_table(RAS_INFO_TABLE *RasInfoTable)
       curr_node++;
   }
 
-  pal_ras_dump_info_table(RasInfoTable);
+  if (g_print_level <= ACS_PRINT_DEBUG)
+      pal_ras_dump_info_table(RasInfoTable);
 }
 
 /**
@@ -331,5 +332,7 @@ pal_ras2_create_info_table(RAS2_INFO_TABLE *RasFeatInfoTable)
 
       RasFeatInfoTable->num_all_block++;
   }
-  pal_ras2_dump_info_table(RasFeatInfoTable);
+
+  if (g_print_level <= ACS_PRINT_DEBUG)
+      pal_ras2_dump_info_table(RasFeatInfoTable);
 }

val/driver/smmu_v3/smmu_v3.c

@@ -1023,7 +1023,9 @@ static int smmu_cdtab_write_ctx_desc(smmu_master_t *master,
         CDTAB_CD_0_V;
 
     cdptr[0] = val;
-    dump_cdtab(cdptr);
+
+    if (g_print_level <= ACS_PRINT_DEBUG)
+        dump_cdtab(cdptr);
 
     return 1;
 }
@@ -1209,7 +1211,9 @@ uint64_t val_smmu_map(smmu_master_attributes_t master_attr, pgt_descriptor_t pgt
 
     ste = smmu_strtab_get_ste_for_sid(smmu, master->sid);
     smmu_strtab_write_ste(master, ste);
-    dump_strtab(ste);
+
+    if (g_print_level <= ACS_PRINT_DEBUG)
+        dump_strtab(ste);
 
     smmu_tlbi_cfgi(smmu);
 
@@ -1236,8 +1240,11 @@ uint32_t val_smmu_config_ste_dcp(smmu_master_attributes_t master_attr, uint32_t
     else
         ste[1] = ste[1] & BITFIELD_SET(STRTAB_STE_1_DCP, value);
 
-    val_print(ACS_PRINT_INFO, "\n       Dump STE values", 0);
-    dump_strtab(ste);
+    if (g_print_level <= ACS_PRINT_DEBUG)
+    {
+        val_print(ACS_PRINT_INFO, "\n       Dump STE values", 0);
+        dump_strtab(ste);
+    }
 
     dcp_value = (ste[1] >> STRTAB_STE_1_DCP_SHIFT) & 0x1;
 

val/src/acs_peripherals.c

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2016-2018, 2021-2025, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2016-2018, 2021-2026, Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -299,7 +299,9 @@ val_peripheral_create_info_table(uint64_t *peripheral_info_table)
     val_peripheral_get_info(NUM_SATA, 0));
   val_print(ACS_PRINT_TEST, " Peripheral: Num of UART controllers  :    %d\n",
     val_peripheral_get_info(NUM_UART, 0));
-  val_peripheral_dump_info();
+
+  if (g_print_level <= ACS_PRINT_DEBUG)
+    val_peripheral_dump_info();
 
 }