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Commit 18cf2aa

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darsoramykyta3
authored andcommitted
don't emit write/read-buffer logic for external components
1 parent 087b1f8 commit 18cf2aa

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5 files changed

+8
-6
lines changed

5 files changed

+8
-6
lines changed

src/peakrdl_regblock/read_buffering/implementation_generator.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ def enter_Reg(self, node: RegNode) -> None:
2222
super().enter_Reg(node)
2323
assert isinstance(node.inst, Reg)
2424

25-
if not node.get_property('buffer_reads'):
25+
if not node.get_property('buffer_reads') or node.external:
2626
return
2727

2828
context = {

src/peakrdl_regblock/read_buffering/storage_generator.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ def enter_Field(self, node: FieldNode) -> None:
1111
def enter_Reg(self, node: RegNode) -> None:
1212
super().enter_Reg(node)
1313

14-
if not node.get_property('buffer_reads'):
14+
if not node.get_property('buffer_reads') or node.external:
1515
return
1616

1717
regwidth = node.get_property('regwidth')

src/peakrdl_regblock/scan_design.py

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -95,8 +95,10 @@ def enter_Reg(self, node: 'RegNode') -> None:
9595
accesswidth = node.get_property('accesswidth')
9696
self.ds.cpuif_data_width = max(self.ds.cpuif_data_width, accesswidth)
9797

98-
self.ds.has_buffered_write_regs = self.ds.has_buffered_write_regs or bool(node.get_property('buffer_writes'))
99-
self.ds.has_buffered_read_regs = self.ds.has_buffered_read_regs or bool(node.get_property('buffer_reads'))
98+
if node.get_property('buffer_writes') and not node.external:
99+
self.ds.has_buffered_write_regs = True
100+
if node.get_property('buffer_reads') and not node.external:
101+
self.ds.has_buffered_read_regs = True
100102

101103
def enter_Signal(self, node: 'SignalNode') -> None:
102104
if node.get_property('field_reset'):

src/peakrdl_regblock/write_buffering/implementation_generator.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ def enter_Reg(self, node: 'RegNode') -> None:
2323
super().enter_Reg(node)
2424
assert isinstance(node.inst, Reg)
2525

26-
if not node.get_property('buffer_writes'):
26+
if not node.get_property('buffer_writes') or node.external:
2727
return
2828

2929
regwidth = node.get_property('regwidth')

src/peakrdl_regblock/write_buffering/storage_generator.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ def enter_Field(self, node: FieldNode) -> None:
1919
def enter_Reg(self, node: RegNode) -> None:
2020
super().enter_Reg(node)
2121

22-
if not node.get_property('buffer_writes'):
22+
if not node.get_property('buffer_writes') or node.external:
2323
return
2424

2525
regwidth = node.get_property('regwidth')

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