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OBI: Add testcase support. #157 
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‎tests/lib/cpuifs/__init__.py‎

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from .apb4 import APB4, FlatAPB4
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from .axi4lite import AXI4Lite, FlatAXI4Lite
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from .avalon import Avalon, FlatAvalon
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from .obi import OBI, FlatOBI
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ALL_CPUIF = [
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Passthrough(),
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FlatAXI4Lite(),
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Avalon(),
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FlatAvalon(),
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OBI(),
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FlatOBI(),
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]

‎tests/lib/cpuifs/obi/__init__.py‎

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from ..base import CpuifTestMode
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from peakrdl_regblock.cpuif.obi import OBI_Cpuif, OBI_Cpuif_flattened
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class OBI(CpuifTestMode):
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cpuif_cls = OBI_Cpuif
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rtl_files = [
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"../../../../hdl-src/obi_intf.sv",
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]
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tb_files = [
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"../../../../hdl-src/obi_intf.sv",
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"obi_intf_driver.sv",
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]
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tb_template = "tb_inst.sv"
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class FlatOBI(OBI):
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cpuif_cls = OBI_Cpuif_flattened
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rtl_files = []

‎tests/lib/cpuifs/obi/obi_intf_driver.sv‎

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interface obi_intf_driver #(
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parameter DATA_WIDTH = 32,
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parameter ADDR_WIDTH = 32,
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parameter ID_WIDTH = 1
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)(
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input wire clk,
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input wire rst,
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obi_intf.manager m_obi
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);
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timeunit 1ps;
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timeprecision 1ps;
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logic req;
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logic gnt;
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logic [ADDR_WIDTH-1:0] addr;
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logic we;
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logic [DATA_WIDTH/8-1:0] be;
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logic [DATA_WIDTH-1:0] wdata;
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logic [ID_WIDTH-1:0] aid;
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logic rvalid;
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logic rready;
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logic [DATA_WIDTH-1:0] rdata;
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logic err;
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logic [ID_WIDTH-1:0] rid;
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assign m_obi.req = req;
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assign gnt = m_obi.gnt;
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assign m_obi.addr = addr;
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assign m_obi.we = we;
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assign m_obi.be = be;
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assign m_obi.wdata = wdata;
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assign m_obi.aid = aid;
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assign rvalid = m_obi.rvalid;
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assign m_obi.rready = rready;
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assign rdata = m_obi.rdata;
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assign err = m_obi.err;
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assign rid = m_obi.rid;
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default clocking cb @(posedge clk);
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default input #1step output #1;
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output req;
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input gnt;
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output addr;
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output we;
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output be;
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output wdata;
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output aid;
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input rvalid;
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inout rready;
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input rdata;
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input err;
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input rid;
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endclocking
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task automatic reset();
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cb.req <= '0;
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cb.addr <= '0;
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cb.we <= '0;
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cb.be <= '0;
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cb.wdata <= '0;
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cb.aid <= '0;
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endtask
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initial forever begin
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cb.rready <= $urandom_range(1, 0);
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@cb;
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end
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//--------------------------------------------------------------------------
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typedef struct {
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logic [DATA_WIDTH-1:0] rdata;
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logic err;
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logic [ID_WIDTH-1:0] rid;
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} response_t;
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class request_t;
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mailbox #(response_t) response_mbx;
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logic [ID_WIDTH-1:0] aid;
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function new();
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this.response_mbx = new();
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endfunction
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endclass
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semaphore txn_req_mutex = new(1);
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request_t request_queue[$];
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// Listen for responses
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initial forever begin
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@cb;
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while(rst || !(cb.rready === 1'b1 && cb.rvalid === 1'b1)) @cb;
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if(request_queue.size() != 0) begin
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// Can match this response with an existing request.
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// Send response to requestor
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request_t req;
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response_t resp;
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req = request_queue.pop_front();
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resp.rdata = cb.rdata;
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resp.err = cb.err;
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resp.rid = cb.rid;
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assert(resp.rid == req.aid) else $error("Got incorrect RID! %0d != %0d", resp.rid, req.aid);
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req.response_mbx.put(resp);
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end else begin
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$error("Got unexpected response");
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end
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end
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//--------------------------------------------------------------------------
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task automatic read(logic [ADDR_WIDTH-1:0] addr, output logic [DATA_WIDTH-1:0] data);
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request_t req;
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response_t resp;
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logic [ID_WIDTH-1:0] id;
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txn_req_mutex.get();
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// Issue read request
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id = $urandom();
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##0;
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cb.req <= '1;
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cb.we <= '0;
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cb.addr <= addr;
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cb.aid <= id;
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@(cb);
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while(cb.gnt !== 1'b1) @(cb);
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cb.req <= '0;
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// Push new request into queue
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req = new();
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req.aid = id;
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request_queue.push_back(req);
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txn_req_mutex.put();
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// Wait for response
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req.response_mbx.get(resp);
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assert(!$isunknown(resp.rdata)) else $error("Read from 0x%0x returned X's on rdata", addr);
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assert(!$isunknown(resp.err)) else $error("Read from 0x%0x returned X's on err", addr);
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assert(!$isunknown(resp.rid)) else $error("Read from 0x%0x returned X's on rid", addr);
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data = resp.rdata;
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endtask
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task automatic assert_read(logic [ADDR_WIDTH-1:0] addr, logic [DATA_WIDTH-1:0] expected_data, logic [DATA_WIDTH-1:0] mask = '1);
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logic [DATA_WIDTH-1:0] data;
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read(addr, data);
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data &= mask;
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assert(data == expected_data) else $error("Read from 0x%x returned 0x%x. Expected 0x%x", addr, data, expected_data);
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endtask
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//--------------------------------------------------------------------------
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task automatic write(logic [ADDR_WIDTH-1:0] addr, logic [DATA_WIDTH-1:0] data, logic [DATA_WIDTH/8-1:0] strb = '1);
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request_t req;
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response_t resp;
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logic [ID_WIDTH-1:0] id;
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txn_req_mutex.get();
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// Issue write request
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id = $urandom();
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##0;
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cb.req <= '1;
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cb.we <= '1;
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cb.be <= strb;
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cb.wdata <= data;
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cb.addr <= addr;
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cb.aid <= id;
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@(cb);
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while(cb.gnt !== 1'b1) @(cb);
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cb.req <= '0;
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// Push new request into queue
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req = new();
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req.aid = id;
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request_queue.push_back(req);
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txn_req_mutex.put();
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// Wait for response
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req.response_mbx.get(resp);
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assert(!$isunknown(resp.err)) else $error("Read from 0x%0x returned X's on err", addr);
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assert(!$isunknown(resp.rid)) else $error("Read from 0x%0x returned X's on rid", addr);
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endtask
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//--------------------------------------------------------------------------
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initial begin
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reset();
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end
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initial forever begin
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@cb;
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if(!rst) assert(!$isunknown(cb.gnt)) else $error("Saw X on gnt!");
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if(!rst) assert(!$isunknown(cb.rvalid)) else $error("Saw X on rvalid!");
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end
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endinterface

‎tests/lib/cpuifs/obi/tb_inst.sv‎

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{% sv_line_anchor %}
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obi_intf #(
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.DATA_WIDTH({{exporter.cpuif.data_width}}),
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.ADDR_WIDTH({{exporter.cpuif.addr_width}})
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) obi();
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obi_intf_driver #(
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.DATA_WIDTH({{exporter.cpuif.data_width}}),
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.ADDR_WIDTH({{exporter.cpuif.addr_width}})
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) cpuif (
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.clk(clk),
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.rst(rst),
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.m_obi(obi)
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);
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{% if type(cpuif).__name__.startswith("Flat") %}
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{% sv_line_anchor %}
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wire obi_req;
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wire obi_gnt;
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wire [{{exporter.cpuif.addr_width - 1}}:0] obi_addr;
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wire obi_we;
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wire [{{exporter.cpuif.data_width_bytes - 1}}:0] obi_be;
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wire [{{exporter.cpuif.data_width - 1}}:0] obi_wdata;
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wire [0:0] obi_aid;
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wire obi_rvalid;
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wire obi_rready;
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wire [{{exporter.cpuif.data_width - 1}}:0] obi_rdata;
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wire obi_err;
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wire [0:0] obi_rid;
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assign obi_req = obi.req;
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assign obi.gnt = obi_gnt;
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assign obi_addr = obi.addr;
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assign obi_we = obi.we;
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assign obi_be = obi.be;
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assign obi_wdata = obi.wdata;
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assign obi_aid = obi.aid;
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assign obi.rvalid = obi_rvalid;
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assign obi_rready = obi.rready;
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assign obi.rdata = obi_rdata;
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assign obi.err = obi_err;
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assign obi.rid = obi_rid;
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{% endif %}

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