[v3.0] Add better support for vertical re-use of UVM register models

[amykyta3]

Add a mechanism that allows users to split a system's UVM register model into multiple files. Goal is to allow top-level verification environments to re-use the register model components from block-level TBs. Specifically, this shall allow for uvm reg model class re-use in a way that facilitates portability better, rather than always generating a monolithic register model.

Mechanism should allow the following:

• Omit definitions of a specific sub-block in a top-level reg model
• Graft reg models from other blocks into a top-level environment
• User can specify all instances based on type name, or limit to specific instances based on hierarchy path.