uart_msp.c

/*
 * Copyright (c) 2025 Texas Instruments
 * Copyright (c) 2025 Linumiz
 * Copyright (c) 2025 Bang & Olufsen A/S, Denmark
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#define DT_DRV_COMPAT ti_msp_uart

/* Zephyr includes */
#include <zephyr/kernel.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/msp_clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/irq.h>

/* Driverlib includes */
#ifdef CONFIG_HAS_MSP_UNICOMM
#include <ti/driverlib/dl_unicommuart.h>
#else
#include <ti/driverlib/dl_uart_main.h>
#endif

struct uart_msp_config {
#ifdef CONFIG_HAS_MSP_UNICOMM
	UNICOMM_Inst_Regs *regs;
#else
	UART_Regs *regs;
#endif
	uint32_t current_speed;
	const struct msp_sys_clock *clock_subsys;
	const struct pinctrl_dev_config *pinctrl;
	DL_UART_OVERSAMPLING_RATE oversampling_rate;
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
	void (*irq_config_func)(const struct device *dev);
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};

struct uart_msp_data {
	/* UART clock structure */
	DL_UART_Main_ClockConfig uart_clockconfig;
	/* UART config structure */
	DL_UART_Main_Config uart_config;
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
	/* Callback function pointer */
	uart_irq_callback_user_data_t cb;
	/* Callback function arg */
	void *cb_data;
	/* Pending interrupt backup */
	DL_UART_IIDX pending_interrupt;
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};

static int uart_msp_init(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;
	struct uart_msp_data *data = dev->data;
	const struct device *clk_dev = DEVICE_DT_GET(DT_NODELABEL(ckm));
	uint32_t clock_rate;
	int ret;

	/* Reset power */
	DL_UART_Main_reset(config->regs);
	DL_UART_Main_enablePower(config->regs);

	delay_cycles(CONFIG_MSP_PERIPH_STARTUP_DELAY);
	/* Init UART pins */
	ret = pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_DEFAULT);
	if (ret < 0) {
		return ret;
	}

	/* Set UART configs */
	DL_UART_Main_setClockConfig(config->regs, &data->uart_clockconfig);
	DL_UART_Main_init(config->regs, &data->uart_config);

	/*
	 * Configure baud rate by setting oversampling and baud rate divisor
	 * from the device tree data current-speed
	 */
	ret = clock_control_get_rate(clk_dev, (struct msp_sys_clock *)config->clock_subsys,
				     &clock_rate);
	if (ret < 0) {
		return ret;
	}

	DL_UART_setOversampling(config->regs, config->oversampling_rate);
	DL_UART_Main_configBaudRate(config->regs, clock_rate, config->current_speed);

#ifdef CONFIG_UART_INTERRUPT_DRIVEN
	config->irq_config_func(dev);
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */

	/* Enable UART */
	DL_UART_Main_enable(config->regs);

	return 0;
}

static int uart_msp_poll_in(const struct device *dev, unsigned char *c)
{
	const struct uart_msp_config *config = dev->config;

	if (DL_UART_Main_receiveDataCheck(config->regs, c) == false) {
		return -1;
	}

	return 0;
}

static void uart_msp_poll_out(const struct device *dev, unsigned char c)
{
	const struct uart_msp_config *config = dev->config;

	DL_UART_Main_transmitDataBlocking(config->regs, c);
}

#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static int uart_msp_err_check(const struct device *dev)
{
	struct uart_msp_data *data = dev->data;

	switch (data->pending_interrupt) {
	case DL_UART_MAIN_IIDX_BREAK_ERROR:
		return UART_BREAK;
	case DL_UART_MAIN_IIDX_FRAMING_ERROR:
		return UART_ERROR_FRAMING;
	default:
		return 0;
	}
}

#define UART_MSP_TX_INTERRUPTS (DL_UART_MAIN_INTERRUPT_TX | DL_UART_MAIN_INTERRUPT_EOT_DONE)
#define UART_MSP_RX_INTERRUPTS (DL_UART_MAIN_INTERRUPT_RX)

static int uart_msp_fifo_fill(const struct device *dev, const uint8_t *tx_data, int size)
{
	const struct uart_msp_config *config = dev->config;

	return (int)DL_UART_Main_fillTXFIFO(config->regs, (uint8_t *)tx_data, size);
}

static int uart_msp_fifo_read(const struct device *dev, uint8_t *rx_data, const int size)
{
	const struct uart_msp_config *config = dev->config;

	return (int)DL_UART_Main_drainRXFIFO(config->regs, rx_data, size);
}

static void uart_msp_irq_tx_enable(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;

	DL_UART_Main_enableInterrupt(config->regs, UART_MSP_TX_INTERRUPTS);
}

static void uart_msp_irq_tx_disable(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;

	DL_UART_Main_disableInterrupt(config->regs, UART_MSP_TX_INTERRUPTS);
}

static int uart_msp_irq_tx_ready(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;
	struct uart_msp_data *data = dev->data;

	return (data->pending_interrupt & (DL_UART_MAIN_IIDX_TX | DL_UART_MAIN_IIDX_EOT_DONE)) &&
			       !DL_UART_Main_isTXFIFOFull(config->regs)
		       ? 1
		       : 0;
}

static void uart_msp_irq_rx_enable(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;

	DL_UART_Main_enableInterrupt(config->regs, UART_MSP_RX_INTERRUPTS);
}

static void uart_msp_irq_rx_disable(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;

	DL_UART_Main_disableInterrupt(config->regs, UART_MSP_RX_INTERRUPTS);
}

static int uart_msp_irq_tx_complete(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;

	return (DL_UART_Main_isTXFIFOEmpty(config->regs)) ? 1 : 0;
}

static int uart_msp_irq_rx_ready(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;
	struct uart_msp_data *data = dev->data;

	return (data->pending_interrupt & DL_UART_MAIN_IIDX_RX) &&
			       !DL_UART_Main_isRXFIFOEmpty(config->regs)
		       ? 1
		       : 0;
}

static int uart_msp_irq_is_pending(const struct device *dev)
{
	return uart_msp_irq_tx_ready(dev) || uart_msp_irq_rx_ready(dev);
}

static int uart_msp_irq_update(const struct device *dev)
{
	struct uart_msp_data *data = dev->data;
	const struct uart_msp_config *config = dev->config;

	data->pending_interrupt = DL_UART_Main_getPendingInterrupt(config->regs);

	return 1;
}

static void uart_msp_irq_callback_set(const struct device *dev, uart_irq_callback_user_data_t cb,
				      void *cb_data)
{
	struct uart_msp_data *const dev_data = dev->data;

	/* Set callback function and data */
	dev_data->cb = cb;
	dev_data->cb_data = cb_data;
}

#define UART_MSP_ERROR_INTERRUPTS                                                                  \
	(DL_UART_MAIN_INTERRUPT_BREAK_ERROR | DL_UART_MAIN_INTERRUPT_FRAMING_ERROR)

static void uart_msp_irq_error_enable(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;

	DL_UART_Main_enableInterrupt(config->regs, UART_MSP_ERROR_INTERRUPTS);
}

static void uart_msp_irq_error_disable(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;

	DL_UART_Main_disableInterrupt(config->regs, UART_MSP_ERROR_INTERRUPTS);
}

static void uart_msp_isr(const struct device *dev)
{
	const struct uart_msp_config *config = dev->config;
	struct uart_msp_data *const dev_data = dev->data;
	uint32_t int_status;

	/* Perform callback if defined */
	if (dev_data->cb) {
		dev_data->cb(dev, dev_data->cb_data);
	}

	/* Unilaterally clearing the interrupt status */
	int_status = DL_UART_Main_getEnabledInterruptStatus(
		config->regs, UART_MSP_TX_INTERRUPTS | UART_MSP_RX_INTERRUPTS);
	DL_UART_Main_clearInterruptStatus(config->regs, int_status);

	dev_data->pending_interrupt = DL_UART_MAIN_IIDX_NO_INTERRUPT;
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */

static DEVICE_API(uart, uart_msp_driver_api) = {
	.poll_in = uart_msp_poll_in,
	.poll_out = uart_msp_poll_out,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
	.err_check = uart_msp_err_check,
	.fifo_fill = uart_msp_fifo_fill,
	.fifo_read = uart_msp_fifo_read,
	.irq_tx_enable = uart_msp_irq_tx_enable,
	.irq_tx_disable = uart_msp_irq_tx_disable,
	.irq_tx_ready = uart_msp_irq_tx_ready,
	.irq_rx_enable = uart_msp_irq_rx_enable,
	.irq_rx_disable = uart_msp_irq_rx_disable,
	.irq_tx_complete = uart_msp_irq_tx_complete,
	.irq_rx_ready = uart_msp_irq_rx_ready,
	.irq_is_pending = uart_msp_irq_is_pending,
	.irq_update = uart_msp_irq_update,
	.irq_callback_set = uart_msp_irq_callback_set,
	.irq_err_enable = uart_msp_irq_error_enable,
	.irq_err_disable = uart_msp_irq_error_disable,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};

#ifdef CONFIG_UART_INTERRUPT_DRIVEN
#define MSP_UART_IRQ_DEFINE(inst)                                                                  \
	static void uart_msp_##inst##_irq_register(const struct device *dev)                       \
	{                                                                                          \
		IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), uart_msp_isr,         \
			    DEVICE_DT_INST_GET(inst), 0);                                          \
		irq_enable(DT_INST_IRQN(inst));                                                    \
	}
#else
#define MSP_UART_IRQ_DEFINE(inst)
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */

#define MSP_MAIN_CLK_DIV(n) CONCAT(DL_UART_MAIN_CLOCK_DIVIDE_RATIO_, DT_INST_PROP(n, clk_div))

#define MSP_UART_INIT_FN(index)                                                                    \
                                                                                                   \
	PINCTRL_DT_INST_DEFINE(index);                                                             \
                                                                                                   \
	static const struct msp_sys_clock msp_uart_sys_clock##index = MSP_CLOCK_SUBSYS_FN(index);  \
                                                                                                   \
	MSP_UART_IRQ_DEFINE(index);                                                                \
                                                                                                   \
	IF_ENABLED(CONFIG_HAS_MSP_UNICOMM, 							   \
	(static UNICOMM_Inst_Regs uart_msp_uc_regs_##index = {				   \
		.inst =  (UNICOMM_Regs *)DT_INST_REG_ADDR(index), 				   \
		.uart = (UNICOMMUART_Regs *)UC_UART_BASE(DT_INST_REG_ADDR(index)),		   \
		.fixedMode = DT_CHILD_NUM(DT_PARENT(DT_DRV_INST(index))) == 1,								   \
	};) 											   \
	)                                             \
                                                                                                   \
	static const struct uart_msp_config uart_msp_cfg_##index = {                               \
		.regs = COND_CODE_1(CONFIG_HAS_MSP_UNICOMM, 					   \
			(&uart_msp_uc_regs_##index), ((UART_Regs *)DT_INST_REG_ADDR(index))),        \
			 .current_speed = DT_INST_PROP(index, current_speed),                      \
			 .pinctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(index),                         \
			 .clock_subsys = &msp_uart_sys_clock##index,                               \
			 .oversampling_rate = (DT_INST_PROP(index, oversampling_rate) == 3) ?      \
				DL_UART_OVERSAMPLING_RATE_3X :                                      \
				(DT_INST_PROP(index, oversampling_rate) == 8) ?                     \
				DL_UART_OVERSAMPLING_RATE_8X : DL_UART_OVERSAMPLING_RATE_16X,       \
			 IF_ENABLED(CONFIG_UART_INTERRUPT_DRIVEN,			   	   \
			   (.irq_config_func = uart_msp_##index##_irq_register,)) };        \
                                                                                                   \
	static struct uart_msp_data uart_msp_data_##index = {                                      \
		.uart_clockconfig =                                                                \
			{                                                                          \
				.clockSel = MSP_CLOCK_PERIPH_REG_MASK(                             \
					DT_INST_CLOCKS_CELL(index, clk)),                          \
				.divideRatio = MSP_MAIN_CLK_DIV(index),                            \
			},                                                                         \
		.uart_config =                                                                     \
			{                                                                          \
				.mode = DL_UART_MAIN_MODE_NORMAL,                                  \
				.direction = DL_UART_MAIN_DIRECTION_TX_RX,                         \
				.flowControl = (DT_INST_PROP(index, hw_flow_control)               \
							? DL_UART_MAIN_FLOW_CONTROL_RTS_CTS        \
							: DL_UART_MAIN_FLOW_CONTROL_NONE),         \
				.parity = DL_UART_MAIN_PARITY_NONE,                                \
				.wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS,                     \
				.stopBits = DL_UART_MAIN_STOP_BITS_ONE,                            \
			},                                                                         \
	};                                                                                         \
                                                                                                   \
	DEVICE_DT_INST_DEFINE(index, &uart_msp_init, NULL, &uart_msp_data_##index,                 \
			      &uart_msp_cfg_##index, PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY,    \
			      &uart_msp_driver_api);

DT_INST_FOREACH_STATUS_OKAY(MSP_UART_INIT_FN)