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-1
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2 files changed +13
-1
lines changed Original file line number Diff line number Diff line change 18
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import ttboard .util .time as time
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from ttboard .globals import Globals
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from ttboard .mode import RPMode
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+ from ttboard .pins .gpio_map import GPIOMapTT06
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from ttboard .pins .pins import Pins
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from ttboard .project_mux import Design
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from ttboard .config .user_config import UserConfig
@@ -139,6 +140,10 @@ def __init__(self,
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setattr (self , p , getattr (self .pins , p ))
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self .shuttle = Globals .project_mux (self .user_config .force_shuttle )
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+ if self .shuttle .run == 'tt07' :
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+ pins_mode = self .pins .mode
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+ GPIOMapTT06 .tt07_cb_fix = True
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+ self .pins .mode = pins_mode # force re-init of pins to apply new pin map
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# config
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self .apply_configs = apply_user_config
Original file line number Diff line number Diff line change @@ -272,6 +272,9 @@ class GPIOMapTT06(GPIOMapBase):
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UIO6 = 27
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UIO7 = 28
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RPIO29 = 29
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+
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+ # Enable a workaround for a PCB error in TT07 carrier board, which swapped the ctrl_sel_inc and ctrl_sel_nrst lines:
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+ tt07_cb_fix = False
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@classmethod
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def project_clock (cls ):
@@ -304,7 +307,7 @@ def always_outputs(cls):
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@classmethod
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def all (cls ):
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retDict = cls .all_common ()
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- #retDict = GPIOMapBase.all(cls)
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+
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retDict .update ({
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'nprojectrst' : cls .PROJECT_nRST ,
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'cinc' : cls .CTRL_SEL_INC ,
@@ -315,6 +318,10 @@ def all(cls):
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'uo_out2' : cls .UO_OUT2 ,
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'uo_out3' : cls .UO_OUT3
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})
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+
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+ if cls .tt07_cb_fix :
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+ retDict ['cinc' ], retDict ['ncrst' ] = retDict ['ncrst' ], retDict ['cinc' ]
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+
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return retDict
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GPIOMap = GPIOMapTT04
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