DMA behaviour with overlapping source and destination / Using DMA to memset

[lxylxy123456]

I am thinking of making memset faster using DMA. Assuming I have already implemented memcpy, then my memset is:

void memset(void *s, uint8_t c, uint32_t n) {
	(*(uint8_t *)s) = c; // initialize the first byte
	memcpy(s + 1, s, n - 1); // copy to the remaining bytes
}

However, this does not work well in the simulator.
So the question is, does the DMA has a defined behaviour when the source address is overlapping with the destination address? Is it possible to implement memset in a similar way? The docs says "Once intiated the DMA channel will transfer up to 32-bits per CPU cycle until the transfer has been completed.", so will this work if I initialize 4 bytes instead of only 1 byte?

[cjnitta]

It isn't just 4 bytes, but also 4 bytes that are 32-bit aligned. The transfer tries to align to 32-bit and then copy 32-bit at a time until it hits the end (or last 1 - 3 bytes).

[lxylxy123456]

What is the behavior when the source and destination addresses are not aligned? For example source = 0x70003333 and dest = 0x70000000

[cjnitta]

The alignment is focused on the destination being 32-bit aligned. So this should transfer 32-bits at a time from the beginning. If the dest were 0x70000001, then it should write 3 bytes first, then 32-bit transfers after.

[lxylxy123456]

Thanks for answering this (#17) and #16. I would still recommend documentation improvement at https://github.com/UCDClassNitta/riscv-console/blob/main/docs/chipset.md#dma-channel . But please feel free two close these two issues.