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Revert "flail"
This reverts commit 1765045.
1 parent 1765045 commit 4ba88e6

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2 files changed

+6
-18
lines changed

2 files changed

+6
-18
lines changed

src/main/scala/translating/GTIRBLoader.scala

Lines changed: 3 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,6 @@ class GTIRBLoader(parserMap: immutable.Map[String, List[InsnSemantics]]) {
2828

2929
private val opcodeSize = 4
3030

31-
private val branchTakenVar = LocalVar("__BranchTaken", BoolType)
32-
3331
def visitBlock(blockUUID: ByteString, blockCountIn: Int, blockAddress: Option[BigInt]): ArrayBuffer[Statement] = {
3432
blockCount = blockCountIn
3533
instructionCount = 0
@@ -56,14 +54,7 @@ class GTIRBLoader(parserMap: immutable.Map[String, List[InsnSemantics]]) {
5654
}
5755

5856
statements.appendAll(try {
59-
val basilStmts = visitStmt(s, label)
60-
println(basilStmts)
61-
val assignedVars = basilStmts.flatMap(ir.allVarsPos)
62-
if (assignedVars.contains(branchTakenVar)) {
63-
println(assignedVars)
64-
} else {
65-
}
66-
basilStmts
57+
visitStmt(s, label)
6758
} catch {
6859
case e => {
6960
Logger.error(s"Failed to load insn: $e\n${e.getStackTrace.mkString("\n")}")
@@ -307,7 +298,7 @@ class GTIRBLoader(parserMap: immutable.Map[String, List[InsnSemantics]]) {
307298
case "FALSE" => Some(FalseLiteral)
308299
case "FPCR" => Some(Register("FPCR", 32))
309300
// ignore the following
310-
// case "__BranchTaken" => None
301+
case "__BranchTaken" => None
311302
case "BTypeNext" => None
312303
case "BTypeCompatible" => None
313304
case "TPIDR_EL0" => Some(Register(name, 64))
@@ -691,7 +682,7 @@ class GTIRBLoader(parserMap: immutable.Map[String, List[InsnSemantics]]) {
691682
// ignore the following
692683
case "TRUE" => throw Exception(s"Boolean literal $name in LExpr ${ctx.getText}")
693684
case "FALSE" => throw Exception(s"Boolean literal $name in LExpr ${ctx.getText}")
694-
case "__BranchTaken" => Some(branchTakenVar)
685+
case "__BranchTaken" => None
695686
case "BTypeNext" => None
696687
case "BTypeCompatible" => None
697688
case "TPIDR_EL0" => Some(Register(name, 64))

src/main/scala/translating/GTIRBToIR.scala

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -41,9 +41,7 @@ class TempIf(
4141
val thenStmts: mutable.Buffer[Statement],
4242
val elseStmts: mutable.Buffer[Statement],
4343
override val label: Option[String] = None
44-
) extends NOP(label) {
45-
override def toString = s"TempIf(${cond}, ${thenStmts}, ${elseStmts}, ${label})"
46-
}
44+
) extends NOP(label)
4745

4846
/** GTIRBToIR class. Forms an IR as close as possible to the one produced by BAP by using GTIRB instead
4947
*
@@ -242,7 +240,7 @@ class GTIRBToIR(
242240
block.statements.last match {
243241
case last @ LocalAssign(lhs: Register, _, _) if lhs.name == "_PC" =>
244242
val label = last.label
245-
// block.statements.remove(last)
243+
block.statements.remove(last)
246244
label
247245
case _ => throw Exception(s"expected block ${block.label} to have a program counter assignment at its end")
248246
}
@@ -783,8 +781,7 @@ class GTIRBToIR(
783781

784782
val newBlocks = ArrayBuffer(trueBlock, falseBlock)
785783
procedure.addBlocks(newBlocks)
786-
// block.statements.remove(tempIf)
787-
println(tempIf)
784+
block.statements.remove(tempIf)
788785

789786
GoTo(newBlocks)
790787
}

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