|
11 | 11 | #define CHIP_READY 0 |
12 | 12 | #define CHIP_STATE 0b1110000 |
13 | 13 |
|
| 14 | +#define CC1120_RND_CONFIG 0x80 |
| 15 | + |
14 | 16 | static const register_setting_t cc1120SettingsStd[] = { |
15 | 17 | // Set GPIO 0 to RXFIFO_THR_PKT |
16 | 18 | {CC1120_REGS_IOCFG0, 0x01U}, |
@@ -52,14 +54,27 @@ static const register_setting_t cc1120SettingsStd[] = { |
52 | 54 | {CC1120_REGS_PA_CFG0, 0x7DU}, |
53 | 55 | {CC1120_REGS_PKT_LEN, 0x0CU}}; |
54 | 56 |
|
55 | | -static const register_setting_t cc1120SettingsExt[] = { |
56 | | - {CC1120_REGS_EXT_IF_MIX_CFG, 0x00U}, {CC1120_REGS_EXT_FREQOFF_CFG, 0x34U}, {CC1120_REGS_EXT_FREQ2, 0x6CU}, |
57 | | - {CC1120_REGS_EXT_FREQ1, 0x7AU}, {CC1120_REGS_EXT_FREQ0, 0xE1U}, {CC1120_REGS_EXT_FS_DIG1, 0x00U}, |
58 | | - {CC1120_REGS_EXT_FS_DIG0, 0x5FU}, {CC1120_REGS_EXT_FS_CAL1, 0x40U}, {CC1120_REGS_EXT_FS_CAL0, 0x0EU}, |
59 | | - {CC1120_REGS_EXT_FS_DIVTWO, 0x03U}, {CC1120_REGS_EXT_FS_DSM0, 0x33U}, {CC1120_REGS_EXT_FS_DVC0, 0x17U}, |
60 | | - {CC1120_REGS_EXT_FS_PFD, 0x50U}, {CC1120_REGS_EXT_FS_PRE, 0x6EU}, {CC1120_REGS_EXT_FS_REG_DIV_CML, 0x14U}, |
61 | | - {CC1120_REGS_EXT_FS_SPARE, 0xACU}, {CC1120_REGS_EXT_FS_VCO0, 0xB4U}, {CC1120_REGS_EXT_XOSC5, 0x0EU}, |
62 | | - {CC1120_REGS_EXT_XOSC1, 0x03U}, {CC1120_REGS_EXT_TOC_CFG, 0x89U}}; |
| 57 | +static const register_setting_t cc1120SettingsExt[] = {{CC1120_REGS_EXT_IF_MIX_CFG, 0x00U}, |
| 58 | + {CC1120_REGS_EXT_FREQOFF_CFG, 0x34U}, |
| 59 | + {CC1120_REGS_EXT_FREQ2, 0x6CU}, |
| 60 | + {CC1120_REGS_EXT_FREQ1, 0x7AU}, |
| 61 | + {CC1120_REGS_EXT_FREQ0, 0xE1U}, |
| 62 | + {CC1120_REGS_EXT_FS_DIG1, 0x00U}, |
| 63 | + {CC1120_REGS_EXT_FS_DIG0, 0x5FU}, |
| 64 | + {CC1120_REGS_EXT_FS_CAL1, 0x40U}, |
| 65 | + {CC1120_REGS_EXT_FS_CAL0, 0x0EU}, |
| 66 | + {CC1120_REGS_EXT_FS_DIVTWO, 0x03U}, |
| 67 | + {CC1120_REGS_EXT_FS_DSM0, 0x33U}, |
| 68 | + {CC1120_REGS_EXT_FS_DVC0, 0x17U}, |
| 69 | + {CC1120_REGS_EXT_FS_PFD, 0x50U}, |
| 70 | + {CC1120_REGS_EXT_FS_PRE, 0x6EU}, |
| 71 | + {CC1120_REGS_EXT_FS_REG_DIV_CML, 0x14U}, |
| 72 | + {CC1120_REGS_EXT_FS_SPARE, 0xACU}, |
| 73 | + {CC1120_REGS_EXT_FS_VCO0, 0xB4U}, |
| 74 | + {CC1120_REGS_EXT_XOSC5, 0x0EU}, |
| 75 | + {CC1120_REGS_EXT_XOSC1, 0x03U}, |
| 76 | + {CC1120_REGS_EXT_TOC_CFG, 0x89U}, |
| 77 | + {CC1120_REGS_EXT_RNDGEN, CC1120_RND_CONFIG}}; |
63 | 78 |
|
64 | 79 | /** |
65 | 80 | * @brief - Reads from consecutive registers from the CC1120. |
@@ -445,3 +460,17 @@ obc_error_code_t cc1120GetBytesInRxFifo(uint8_t *numBytes) { |
445 | 460 | RETURN_IF_ERROR_CODE(cc1120ReadExtAddrSpi(CC1120_REGS_EXT_NUM_RXBYTES, numBytes, 1)); |
446 | 461 | return OBC_ERR_CODE_SUCCESS; |
447 | 462 | } |
| 463 | + |
| 464 | +obc_error_code_t cc1120Rng(uint8_t *randomValue) { |
| 465 | + obc_error_code_t errCode; |
| 466 | + uint8_t receivedData; |
| 467 | + if (randomValue == NULL) { |
| 468 | + return OBC_ERR_CODE_INVALID_ARG; |
| 469 | + } |
| 470 | + RETURN_IF_ERROR_CODE(cc1120StrobeSpi(CC1120_STROBE_SRX)); |
| 471 | + RETURN_IF_ERROR_CODE(cc1120ReadExtAddrSpi(CC1120_REGS_EXT_RNDGEN, randomValue, 1)); |
| 472 | + RETURN_IF_ERROR_CODE(cc1120ReadFifo(&receivedData, 1)); |
| 473 | + (*randomValue) &= ~(1 << 7); |
| 474 | + (*randomValue) ^= receivedData; |
| 475 | + return OBC_ERR_CODE_SUCCESS; |
| 476 | +} |
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