Add VHDL 2019 parsing for components

Author: Schottkyc137

vhdl_syntax/src/parser/mod.rs

@@ -88,3 +88,16 @@ pub(crate) fn parse_syntax(
     let (green, diagnostics) = parser.end();
     (SyntaxNode::new_root(green), diagnostics)
 }
+
+#[cfg(test)]
+pub(crate) fn parse_syntax_with_standard(
+    standard: VHDLStandard,
+    input: impl IntoIterator<Item = u8>,
+    parser_fn: impl FnOnce(&mut Parser),
+) -> (SyntaxNode, Vec<diagnostics::ParserDiagnostic>) {
+    let token_stream: TokenStream = Tokenizer::with_standard(standard, input.into_iter()).collect();
+    let mut parser = Parser::new(token_stream.into(), standard);
+    parser_fn(&mut parser);
+    let (green, diagnostics) = parser.end();
+    (SyntaxNode::new_root(green), diagnostics)
+}

vhdl_syntax/src/parser/productions/component_declaration.rs

@@ -5,6 +5,7 @@
 // Copyright (c)  2025, Lukas Scheller lukasscheller@icloud.com
 
 use crate::parser::Parser;
+use crate::standard::VHDLStandard;
 use crate::syntax::node_kind::NodeKind::*;
 use crate::tokens::token_kind::Keyword as Kw;
 use crate::tokens::TokenKind::*;
@@ -31,7 +32,12 @@ impl Parser {
 
     pub fn component_declaration_epilogue(&mut self) {
         self.start_node(ComponentDeclarationEpilogue);
-        self.expect_tokens([Keyword(Kw::End), Keyword(Kw::Component)]);
+        self.expect_token(Keyword(Kw::End));
+        if self.standard().is_at_least(VHDLStandard::VHDL2019) {
+            self.opt_token(Keyword(Kw::Component));
+        } else {
+            self.expect_token(Keyword(Kw::Component));
+        }
         self.opt_identifier();
         self.expect_token(SemiColon);
         self.end_node();
@@ -40,8 +46,9 @@ impl Parser {
 
 #[cfg(test)]
 mod tests {
-    use crate::parser::test_utils::to_test_text;
-    use crate::parser::Parser;
+    use crate::parser::test_utils::{to_test_text, to_test_text_with_standard};
+    use crate::parser::{parse_syntax_with_standard, Parser};
+    use crate::standard::VHDLStandard;
 
     #[test]
     fn simple_components() {
@@ -95,4 +102,40 @@ end component;
 ",
         ));
     }
+
+    #[test]
+    fn component_end_without_keyword_vhdl2019() {
+        // `end;` without the trailing `component` keyword is valid from VHDL-2019 onwards.
+        insta::assert_snapshot!(to_test_text_with_standard(
+            VHDLStandard::VHDL2019,
+            Parser::component_declaration,
+            "\
+component foo is
+end;
+"
+        ));
+        // Optional identifier after `end` is also accepted.
+        insta::assert_snapshot!(to_test_text_with_standard(
+            VHDLStandard::VHDL2019,
+            Parser::component_declaration,
+            "\
+component foo is
+end foo;
+"
+        ));
+    }
+
+    #[test]
+    fn component_end_without_keyword_is_error_before_vhdl2019() {
+        // Omitting the trailing `component` keyword must produce a diagnostic under VHDL-2008.
+        let (_, diagnostics) = parse_syntax_with_standard(
+            VHDLStandard::VHDL2008,
+            "component foo is\nend;\n".bytes(),
+            Parser::component_declaration,
+        );
+        assert!(
+            !diagnostics.is_empty(),
+            "expected a diagnostic for missing 'component' keyword under VHDL-2008"
+        );
+    }
 }

vhdl_syntax/src/parser/productions/snapshots/vhdl_syntax__parser__productions__component_declaration__tests__component_end_without_keyword_vhdl2019-2.snap

@@ -0,0 +1,13 @@
+---
+source: vhdl_syntax/src/parser/productions/component_declaration.rs
+expression: "to_test_text_with_standard(VHDLStandard::VHDL2019,\nParser::component_declaration, \"\\\ncomponent foo is\nend foo;\n\")"
+---
+ComponentDeclaration
+  ComponentDeclarationPreamble
+    Keyword(Component)
+    Identifier 'foo'
+    Keyword(Is)
+  ComponentDeclarationEpilogue
+    Keyword(End)
+    Identifier 'foo'
+    SemiColon

vhdl_syntax/src/parser/productions/snapshots/vhdl_syntax__parser__productions__component_declaration__tests__component_end_without_keyword_vhdl2019.snap

@@ -0,0 +1,12 @@
+---
+source: vhdl_syntax/src/parser/productions/component_declaration.rs
+expression: "to_test_text_with_standard(VHDLStandard::VHDL2019,\nParser::component_declaration, \"\\\ncomponent foo is\nend;\n\")"
+---
+ComponentDeclaration
+  ComponentDeclarationPreamble
+    Keyword(Component)
+    Identifier 'foo'
+    Keyword(Is)
+  ComponentDeclarationEpilogue
+    Keyword(End)
+    SemiColon

vhdl_syntax/src/parser/test_utils.rs

@@ -4,11 +4,23 @@
 //
 // Copyright (c)  2025, Lukas Scheller lukasscheller@icloud.com
 
-use crate::parser::{parse_syntax, Parser};
+use crate::parser::{parse_syntax, parse_syntax_with_standard, Parser};
+use crate::standard::VHDLStandard;
 
 /// Returns the AST text for snapshot assertions.
 pub fn to_test_text(func: impl FnOnce(&mut Parser), input: &str) -> String {
     let (entity, diagnostics) = parse_syntax(input, func);
     assert!(diagnostics.is_empty(), "got diagnostics: {:?}", diagnostics);
     entity.test_text()
 }
+
+/// Returns the AST text for snapshot assertions, tokenizing and parsing under `standard`.
+pub fn to_test_text_with_standard(
+    standard: VHDLStandard,
+    func: impl FnOnce(&mut Parser),
+    input: &str,
+) -> String {
+    let (entity, diagnostics) = parse_syntax_with_standard(standard, input.bytes(), func);
+    assert!(diagnostics.is_empty(), "got diagnostics: {:?}", diagnostics);
+    entity.test_text()
+}