Add AXI4 Infrastructure Components

Author: Paebbels

.gitignore

@@ -29,10 +29,7 @@ docs/_build/
 .pyIPCMI/Wrapper/Hooks/*
 !.pyIPCMI/Wrapper/Hooks/README.md
 temp/*
-!temp/.*
-!temp/*.*
-temp/precompiled/*
-!temp/precompiled/.*
+!temp/README.md
 
 # ignore private files from pyIPCMI
 .pyIPCMI/config.private.ini
@@ -61,44 +58,6 @@ tb/common/my_project.vhdl
 /prj/QuestaSim/**/*.*
 !/prj/QuestaSim/PoC.mpf
 
-# ignore Lattice Diamond files
-other/diamond/._Real_._Math_.vhd
-other/diamond/.spread_sheet.ini
-other/diamond/.spreadsheet_view.ini
-/other/diamond/*/**/*
-/other/diamond/*.xml
-/other/diamond/*.html
-!/other/diamond/*/**/*.lpf
-!/other/diamond/*/**/*.ldc
-!/other/diamond/*/**/*.vhdl
-
-# ignore Xilinx ISE files
-/other/ise/**/*.*
-/other/ise/**/ise
-!/other/ise/**/*.xise
-!/other/ise/**/*.xpr
-!/other/ise/**/iseconfig/filter.filter
-!/other/ise/**/*.qpf
-!/other/ise/**/*.qsf
-
-# ignore Quartus files
-/other/quartus/**/*.*
-/other/quartus/**/db/
-/other/quartus/**/incremental_db/
-/other/quartus/**/output_files/
-/other/quartus/**/simulation/
-/other/quartus/**/greybox_tmp/
-!/other/quartus/**/*.qpf
-!/other/quartus/**/*.qsf
-!/other/quartus/**/*.vhdl
-
-#ignore Vivado files
-/other/vivado/**/*.cache
-/other/vivado/**/*.hw
-/other/vivado/**/*.runs
-/other/vivado/**/*.sim
-/other/vivado/**/*.ip_user_files
-
 # general whitelist
 !.git*
 !.publish

docs/IPCores/bus/stream/stream_Buffer.rst docs/IPCores/bus/stream/stream_FIFO.rstdocs/IPCores/bus/stream/stream_Buffer.rst renamed to docs/IPCores/bus/stream/stream_FIFO.rst

@@ -13,7 +13,7 @@
 #
 # License:
 # ==============================================================================
-# Copryright 2017-2025 The PoC-Library Authors
+# Copyright 2025-2025 The PoC-Library Authors
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.

docs/IPCores/fifo/fifo_glue.rst docs/IPCores/fifo/fifo_stage.rstdocs/IPCores/fifo/fifo_glue.rst renamed to docs/IPCores/fifo/fifo_stage.rst

@@ -40,9 +40,9 @@
 include ./osvvm/osvvm.pro
 include ./OSVVM-Common/Common.pro
 
-if {[DirectoryExists UART]} {
+if {[DirectoryExists OSVVM-UART]} {
   include ./OSVVM-UART/UART.pro
 }
-if {[DirectoryExists AXI4]} {
+if {[DirectoryExists OSVVM-AXI4]} {
   include ./OSVVM-AXI4/AXI4.pro
 }

docs/_extensions/DocumentMember.py

@@ -15,7 +15,7 @@
 #
 # License:
 # ==============================================================================
-# Copryright 2017-2025 The PoC-Library Authors
+# Copyright 2025-2025 The PoC-Library Authors
 # Copyright 2007-2016 Technische Universitaet Dresden - Germany
 #											Chair of VLSI-Design, Diagnostics and Architecture
 #

lib/OsvvmLibraries.pro

@@ -19,7 +19,7 @@
 #
 # License:
 # ==============================================================================
-# Copryright 2017-2025 The PoC-Library Authors
+# Copyright 2025-2025 The PoC-Library Authors
 # Copyright 2007-2016 Technische Universitaet Dresden - Germany
 #											Chair of VLSI-Design, Diagnostics and Architecture
 #