Problem
The current sensitivity analysis is analytical. ADC, DAC, control, calibration, interconnect, and memory parameters are explicit, but they are not calibrated against a physical implementation.
Acceptance criteria
- Ingest measured FPGA latency and wall-power samples with workload metadata.
- Fit or select cost-model parameters without modifying benchmark outputs by hand.
- Publish prediction-versus-measurement error for at least three matrix shapes.
- Preserve optimistic, nominal, and conservative scenarios.
- Document where the analytical model remains structurally wrong.
Problem
The current sensitivity analysis is analytical. ADC, DAC, control, calibration, interconnect, and memory parameters are explicit, but they are not calibrated against a physical implementation.
Acceptance criteria