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Renumber SIMD opcodes (#1403)
* Fix typo in I8X16AvgrU * Update tests * Skip simd_const test till it is updated
1 parent 5c48f3b commit 49cdabb

24 files changed

+990
-989
lines changed

‎src/opcode.def‎

Lines changed: 174 additions & 174 deletions
Large diffs are not rendered by default.

‎test/dump/simd-basic.txt‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ simd-basic.wasm: file format wasm 0x1
1212
Code Disassembly:
1313

1414
000021 func[0] <main>:
15-
000022: fd 02 01 00 00 00 02 00 00 | v128.const 0x00000001 0x00000002 0x00000003 0x00000004
15+
000022: fd 0c 01 00 00 00 02 00 00 | v128.const 0x00000001 0x00000002 0x00000003 0x00000004
1616
00002b: 00 03 00 00 00 04 00 00 00 |
1717
000034: 0f | return
1818
000035: 0b | end

‎test/dump/simd-binary.txt‎

Lines changed: 320 additions & 320 deletions
Large diffs are not rendered by default.

‎test/dump/simd-bitselect.txt‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -17,12 +17,12 @@ simd-bitselect.wasm: file format wasm 0x1
1717
Code Disassembly:
1818

1919
000032 func[0] <func_v128_bitselect_0>:
20-
000033: fd 02 01 00 ff 00 02 00 04 | v128.const 0x00ff0001 0x00040002 0x55555555 0x00000004
20+
000033: fd 0c 01 00 ff 00 02 00 04 | v128.const 0x00ff0001 0x00040002 0x55555555 0x00000004
2121
00003c: 00 55 55 55 55 04 00 00 00 |
22-
000045: fd 02 01 00 02 00 02 00 fe | v128.const 0x00020001 0x00fe0002 0xaaaaaaaa 0x55000004
22+
000045: fd 0c 01 00 02 00 02 00 fe | v128.const 0x00020001 0x00fe0002 0xaaaaaaaa 0x55000004
2323
00004e: 00 aa aa aa aa 04 00 00 55 |
24-
000057: fd 02 ff ff ff ff 00 00 00 | v128.const 0xffffffff 0x00000000 0x55555555 0x55000004
24+
000057: fd 0c ff ff ff ff 00 00 00 | v128.const 0xffffffff 0x00000000 0x55555555 0x55000004
2525
000060: 00 55 55 55 55 04 00 00 55 |
26-
000069: fd 50 | v128.bitselect
26+
000069: fd 52 | v128.bitselect
2727
00006b: 0b | end
2828
;;; STDOUT ;;)

‎test/dump/simd-compare.txt‎

Lines changed: 126 additions & 126 deletions
Large diffs are not rendered by default.

‎test/dump/simd-lane.txt‎

Lines changed: 40 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -97,94 +97,94 @@ simd-lane.wasm: file format wasm 0x1
9797
Code Disassembly:
9898

9999
0001f9 func[0] <func_i8x16_extract_lane_s_0>:
100-
0001fa: fd 02 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x000000ff 0x0000017f
100+
0001fa: fd 0c 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x000000ff 0x0000017f
101101
000203: 00 ff 00 00 00 7f 01 00 00 |
102-
00020c: fd 05 08 | i8x16.extract_lane_s 8
102+
00020c: fd 15 08 | i8x16.extract_lane_s 8
103103
00020f: 0b | end
104104
000211 func[1] <func_i8x16_extract_lane_u_0>:
105-
000212: fd 02 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x000000ff 0x0000017f
105+
000212: fd 0c 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x000000ff 0x0000017f
106106
00021b: 00 ff 00 00 00 7f 01 00 00 |
107-
000224: fd 06 08 | i8x16.extract_lane_u 8
107+
000224: fd 16 08 | i8x16.extract_lane_u 8
108108
000227: 0b | end
109109
000229 func[2] <func_i16x8_extract_lane_s_0>:
110-
00022a: fd 02 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
110+
00022a: fd 0c 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
111111
000233: 00 ff ff 00 00 7f 01 00 00 |
112-
00023c: fd 09 04 | i16x8.extract_lane_s 4
112+
00023c: fd 18 04 | i16x8.extract_lane_s 4
113113
00023f: 0b | end
114114
000241 func[3] <func_i16x8_extract_lane_u_0>:
115-
000242: fd 02 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
115+
000242: fd 0c 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
116116
00024b: 00 ff ff 00 00 7f 01 00 00 |
117-
000254: fd 0a 04 | i16x8.extract_lane_u 4
117+
000254: fd 19 04 | i16x8.extract_lane_u 4
118118
000257: 0b | end
119119
000259 func[4] <func_i32x4_extract_lane_0>:
120-
00025a: fd 02 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
120+
00025a: fd 0c 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
121121
000263: 00 ff ff 00 00 7f 01 00 00 |
122-
00026c: fd 0d 02 | i32x4.extract_lane 2
122+
00026c: fd 1b 02 | i32x4.extract_lane 2
123123
00026f: 0b | end
124124
000271 func[5] <func_i64x2_extract_lane_0>:
125-
000272: fd 02 0f 00 00 00 00 00 00 | v128.const 0x0000000f 0x00000000 0x0000ffff 0x0000017f
125+
000272: fd 0c 0f 00 00 00 00 00 00 | v128.const 0x0000000f 0x00000000 0x0000ffff 0x0000017f
126126
00027b: 00 ff ff 00 00 7f 01 00 00 |
127-
000284: fd 10 00 | i64x2.extract_lane 0
127+
000284: fd 1d 00 | i64x2.extract_lane 0
128128
000287: 0b | end
129129
000289 func[6] <func_f32x4_extract_lane_0>:
130-
00028a: fd 02 01 00 00 00 00 00 c0 | v128.const 0x00000001 0x3fc00000 0x0000ffff 0x0000017f
130+
00028a: fd 0c 01 00 00 00 00 00 c0 | v128.const 0x00000001 0x3fc00000 0x0000ffff 0x0000017f
131131
000293: 3f ff ff 00 00 7f 01 00 00 |
132-
00029c: fd 13 01 | f32x4.extract_lane 1
132+
00029c: fd 1f 01 | f32x4.extract_lane 1
133133
00029f: 0b | end
134134
0002a1 func[7] <func_f64x2_extract_lane_0>:
135-
0002a2: fd 02 00 00 00 00 00 00 12 | v128.const 0x00000000 0x40120000 0x0000ffff 0x0000017f
135+
0002a2: fd 0c 00 00 00 00 00 00 12 | v128.const 0x00000000 0x40120000 0x0000ffff 0x0000017f
136136
0002ab: 40 ff ff 00 00 7f 01 00 00 |
137-
0002b4: fd 16 00 | f64x2.extract_lane 0
137+
0002b4: fd 21 00 | f64x2.extract_lane 0
138138
0002b7: 0b | end
139139
0002b9 func[8] <func_i8x16_replace_lane_0>:
140-
0002ba: fd 02 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x000000ff 0x0000017f
140+
0002ba: fd 0c 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x000000ff 0x0000017f
141141
0002c3: 00 ff 00 00 00 7f 01 00 00 |
142142
0002cc: 41 e5 01 | i32.const 229
143-
0002cf: fd 07 08 | i8x16.replace_lane 8
143+
0002cf: fd 17 08 | i8x16.replace_lane 8
144144
0002d2: 0b | end
145145
0002d4 func[9] <func_i16x8_replace_lane_0>:
146-
0002d5: fd 02 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
146+
0002d5: fd 0c 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
147147
0002de: 00 ff ff 00 00 7f 01 00 00 |
148148
0002e7: 41 e6 cb 03 | i32.const 58854
149-
0002eb: fd 0b 04 | i16x8.replace_lane 4
149+
0002eb: fd 1a 04 | i16x8.replace_lane 4
150150
0002ee: 0b | end
151151
0002f0 func[10] <func_i32x4_replace_lane_0>:
152-
0002f1: fd 02 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
152+
0002f1: fd 0c 01 00 00 00 0f 00 00 | v128.const 0x00000001 0x0000000f 0x0000ffff 0x0000017f
153153
0002fa: 00 ff ff 00 00 7f 01 00 00 |
154154
000303: 41 f8 ac d1 91 01 | i32.const 305419896
155-
000309: fd 0e 02 | i32x4.replace_lane 2
155+
000309: fd 1c 02 | i32x4.replace_lane 2
156156
00030c: 0b | end
157157
00030e func[11] <func_i64x2_replace_lane_0>:
158-
00030f: fd 02 0f 00 00 00 00 00 00 | v128.const 0x0000000f 0x00000000 0x0000ffff 0x0000017f
158+
00030f: fd 0c 0f 00 00 00 00 00 00 | v128.const 0x0000000f 0x00000000 0x0000ffff 0x0000017f
159159
000318: 00 ff ff 00 00 7f 01 00 00 |
160160
000321: 42 f8 ac 81 80 c0 c6 04 | i64.const 20014547621496
161-
000329: fd 11 00 | i64x2.replace_lane 0
161+
000329: fd 1e 00 | i64x2.replace_lane 0
162162
00032c: 0b | end
163163
00032e func[12] <func_f32x4_replace_lane_0>:
164-
00032f: fd 02 01 00 00 00 00 00 00 | v128.const 0x00000001 0x00000000 0x0000ffff 0x0000017f
164+
00032f: fd 0c 01 00 00 00 00 00 00 | v128.const 0x00000001 0x00000000 0x0000ffff 0x0000017f
165165
000338: 00 ff ff 00 00 7f 01 00 00 |
166166
000341: 43 00 00 c0 3f | f32.const 0x1.8p+0
167-
000346: fd 14 01 | f32x4.replace_lane 1
167+
000346: fd 20 01 | f32x4.replace_lane 1
168168
000349: 0b | end
169169
00034b func[13] <func_f64x2_replace_lane_0>:
170-
00034c: fd 02 9a 78 00 00 30 03 88 | v128.const 0x0000789a 0xff880330 0x0000ffff 0x0000017f
170+
00034c: fd 0c 9a 78 00 00 30 03 88 | v128.const 0x0000789a 0xff880330 0x0000ffff 0x0000017f
171171
000355: ff ff ff 00 00 7f 01 00 00 |
172172
00035e: 44 00 00 00 00 00 00 12 40 | f64.const 0x1.2p+2
173-
000367: fd 17 00 | f64x2.replace_lane 0
173+
000367: fd 22 00 | f64x2.replace_lane 0
174174
00036a: 0b | end
175175
00036c func[14] <func_v8x16_swizzle_0>:
176-
00036d: fd 02 44 33 22 11 88 77 66 | v128.const 0x11223344 0x55667788 0x99aabbcc 0xddeeff00
176+
00036d: fd 0c 44 33 22 11 88 77 66 | v128.const 0x11223344 0x55667788 0x99aabbcc 0xddeeff00
177177
000376: 55 cc bb aa 99 00 ff ee dd |
178-
00037f: fd 02 0c 0d 0e 0f 08 09 0a | v128.const 0x0f0e0d0c 0x0b0a0908 0x07060504 0x03020100
178+
00037f: fd 0c 0c 0d 0e 0f 08 09 0a | v128.const 0x0f0e0d0c 0x0b0a0908 0x07060504 0x03020100
179179
000388: 0b 04 05 06 07 00 01 02 03 |
180-
000391: fd c0 01 | v8x16.swizzle
181-
000394: 0b | end
182-
000396 func[15] <func_v8x16_shuffle_0>:
183-
000397: fd 02 01 ff 00 ff 0f ff 00 | v128.const 0xff00ff01 0xff00ff0f 0xff00ffff 0xff00ff7f
184-
0003a0: ff ff ff 00 ff 7f ff 00 ff |
185-
0003a9: fd 02 55 00 55 00 55 00 55 | v128.const 0x00550055 0x00550055 0x00550055 0x00550155
186-
0003b2: 00 55 00 55 00 55 01 55 00 |
187-
0003bb: fd 03 10 01 12 03 14 05 16 | v8x16.shuffle 0x03120110 0x07160514 0x0b1a0918 0x0f1e0d1c
188-
0003c4: 07 18 09 1a 0b 1c 0d 1e 0f |
189-
0003cd: 0b | end
180+
000391: fd 0e | v8x16.swizzle
181+
000393: 0b | end
182+
000395 func[15] <func_v8x16_shuffle_0>:
183+
000396: fd 0c 01 ff 00 ff 0f ff 00 | v128.const 0xff00ff01 0xff00ff0f 0xff00ffff 0xff00ff7f
184+
00039f: ff ff ff 00 ff 7f ff 00 ff |
185+
0003a8: fd 0c 55 00 55 00 55 00 55 | v128.const 0x00550055 0x00550055 0x00550055 0x00550155
186+
0003b1: 00 55 00 55 00 55 01 55 00 |
187+
0003ba: fd 0d 10 01 12 03 14 05 16 | v8x16.shuffle 0x03120110 0x07160514 0x0b1a0918 0x0f1e0d1c
188+
0003c3: 07 18 09 1a 0b 1c 0d 1e 0f |
189+
0003cc: 0b | end
190190
;;; STDOUT ;;)

‎test/dump/simd-load-store.txt‎

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -63,34 +63,34 @@ Code Disassembly:
6363
0000bb: 0b | end
6464
0000bd func[1] <v128_store_0>:
6565
0000be: 41 04 | i32.const 4
66-
0000c0: fd 02 44 33 22 11 88 77 66 | v128.const 0x11223344 0x55667788 0x99aabbcc 0xddeeff00
66+
0000c0: fd 0c 44 33 22 11 88 77 66 | v128.const 0x11223344 0x55667788 0x99aabbcc 0xddeeff00
6767
0000c9: 55 cc bb aa 99 00 ff ee dd |
68-
0000d2: fd 01 04 00 | v128.store 4 0
68+
0000d2: fd 0b 04 00 | v128.store 4 0
6969
0000d6: 41 04 | i32.const 4
7070
0000d8: fd 00 04 00 | v128.load 4 0
7171
0000dc: 0b | end
7272
0000de func[2] <i16x8.load8x8_s>:
7373
0000df: 41 00 | i32.const 0
74-
0000e1: fd d2 01 03 00 | i16x8.load8x8_s 3 0
75-
0000e6: 0b | end
76-
0000e8 func[3] <i16x8.load8x8_u>:
77-
0000e9: 41 00 | i32.const 0
78-
0000eb: fd d3 01 03 00 | i16x8.load8x8_u 3 0
79-
0000f0: 0b | end
80-
0000f2 func[4] <i32x4.load16x4_s>:
81-
0000f3: 41 00 | i32.const 0
82-
0000f5: fd d4 01 03 00 | i32x4.load16x4_s 3 0
83-
0000fa: 0b | end
84-
0000fc func[5] <i32x4.load16x4_u>:
85-
0000fd: 41 00 | i32.const 0
86-
0000ff: fd d5 01 03 00 | i32x4.load16x4_u 3 0
87-
000104: 0b | end
88-
000106 func[6] <i64x2.load32x2_s>:
89-
000107: 41 00 | i32.const 0
90-
000109: fd d6 01 03 00 | i64x2.load32x2_s 3 0
91-
00010e: 0b | end
92-
000110 func[7] <i64x2.load32x2_u>:
93-
000111: 41 00 | i32.const 0
94-
000113: fd d7 01 03 00 | i64x2.load32x2_u 3 0
95-
000118: 0b | end
74+
0000e1: fd 01 03 00 | i16x8.load8x8_s 3 0
75+
0000e5: 0b | end
76+
0000e7 func[3] <i16x8.load8x8_u>:
77+
0000e8: 41 00 | i32.const 0
78+
0000ea: fd 02 03 00 | i16x8.load8x8_u 3 0
79+
0000ee: 0b | end
80+
0000f0 func[4] <i32x4.load16x4_s>:
81+
0000f1: 41 00 | i32.const 0
82+
0000f3: fd 03 03 00 | i32x4.load16x4_s 3 0
83+
0000f7: 0b | end
84+
0000f9 func[5] <i32x4.load16x4_u>:
85+
0000fa: 41 00 | i32.const 0
86+
0000fc: fd 04 03 00 | i32x4.load16x4_u 3 0
87+
000100: 0b | end
88+
000102 func[6] <i64x2.load32x2_s>:
89+
000103: 41 00 | i32.const 0
90+
000105: fd 05 03 00 | i64x2.load32x2_s 3 0
91+
000109: 0b | end
92+
00010b func[7] <i64x2.load32x2_u>:
93+
00010c: 41 00 | i32.const 0
94+
00010e: fd 06 03 00 | i64x2.load32x2_u 3 0
95+
000112: 0b | end
9696
;;; STDOUT ;;)

‎test/dump/simd-shift.txt‎

Lines changed: 65 additions & 65 deletions
Original file line numberDiff line numberDiff line change
@@ -73,75 +73,75 @@ simd-shift.wasm: file format wasm 0x1
7373
Code Disassembly:
7474

7575
0000df func[0] <i8x16_shl_0>:
76-
0000e0: fd 02 01 00 00 ff 02 00 00 | v128.const 0xff000001 0xe0000002 0x00000003 0x00000004
76+
0000e0: fd 0c 01 00 00 ff 02 00 00 | v128.const 0xff000001 0xe0000002 0x00000003 0x00000004
7777
0000e9: e0 03 00 00 00 04 00 00 00 |
7878
0000f2: 41 03 | i32.const 3
79-
0000f4: fd 54 | i8x16.shl
79+
0000f4: fd 6b | i8x16.shl
8080
0000f6: 0b | end
8181
0000f8 func[1] <i16x8_shl_0>:
82-
0000f9: fd 02 71 00 00 ff 02 07 00 | v128.const 0xff000071 0xe0000702 0x00000003 0x00000004
82+
0000f9: fd 0c 71 00 00 ff 02 07 00 | v128.const 0xff000071 0xe0000702 0x00000003 0x00000004
8383
000102: e0 03 00 00 00 04 00 00 00 |
8484
00010b: 41 03 | i32.const 3
85-
00010d: fd 65 | i16x8.shl
86-
00010f: 0b | end
87-
000111 func[2] <i32x4_shl_0>:
88-
000112: fd 02 71 f0 0f ff 02 77 07 | v128.const 0xff0ff071 0xe0077702 0xe0004003 0x00002004
89-
00011b: e0 03 40 00 e0 04 20 00 00 |
90-
000124: 41 03 | i32.const 3
91-
000126: fd 76 | i32x4.shl
92-
000128: 0b | end
93-
00012a func[3] <i64x2_shl_0>:
94-
00012b: fd 02 55 00 00 ff 02 07 00 | v128.const 0xff000055 0xe0000702 0xe0004003 0x00002004
95-
000134: e0 03 40 00 e0 04 20 00 00 |
96-
00013d: 41 03 | i32.const 3
97-
00013f: fd 87 01 | i64x2.shl
98-
000142: 0b | end
99-
000144 func[4] <i8x16_shr_s_0>:
100-
000145: fd 02 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
101-
00014e: e0 03 00 00 0f 04 f0 0f 00 |
102-
000157: 41 03 | i32.const 3
103-
000159: fd 55 | i8x16.shr_s
104-
00015b: 0b | end
105-
00015d func[5] <i8x16_shr_u_0>:
106-
00015e: fd 02 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
107-
000167: e0 03 00 00 0f 04 f0 0f 00 |
108-
000170: 41 03 | i32.const 3
109-
000172: fd 56 | i8x16.shr_u
110-
000174: 0b | end
111-
000176 func[6] <i16x8_shr_s_0>:
112-
000177: fd 02 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
113-
000180: e0 03 00 00 0f 04 f0 0f 00 |
114-
000189: 41 03 | i32.const 3
115-
00018b: fd 66 | i16x8.shr_s
116-
00018d: 0b | end
117-
00018f func[7] <i16x8_shr_u_0>:
118-
000190: fd 02 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
119-
000199: e0 03 00 00 0f 04 f0 0f 00 |
120-
0001a2: 41 03 | i32.const 3
121-
0001a4: fd 67 | i16x8.shr_u
122-
0001a6: 0b | end
123-
0001a8 func[8] <i32x4_shr_s_0>:
124-
0001a9: fd 02 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
125-
0001b2: e0 03 00 00 0f 04 f0 0f 00 |
126-
0001bb: 41 03 | i32.const 3
127-
0001bd: fd 77 | i32x4.shr_s
128-
0001bf: 0b | end
129-
0001c1 func[9] <i32x4_shr_u_0>:
130-
0001c2: fd 02 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
131-
0001cb: e0 03 00 00 0f 04 f0 0f 00 |
132-
0001d4: 41 03 | i32.const 3
133-
0001d6: fd 78 | i32x4.shr_u
134-
0001d8: 0b | end
135-
0001da func[10] <i64x2_shr_s_0>:
136-
0001db: fd 02 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
137-
0001e4: e0 03 00 00 0f 04 f0 0f 00 |
138-
0001ed: 41 03 | i32.const 3
139-
0001ef: fd 88 01 | i64x2.shr_s
140-
0001f2: 0b | end
141-
0001f4 func[11] <i64x2_shr_u_0>:
142-
0001f5: fd 02 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
143-
0001fe: e0 03 00 00 0f 04 f0 0f 00 |
144-
000207: 41 03 | i32.const 3
145-
000209: fd 89 01 | i64x2.shr_u
146-
00020c: 0b | end
85+
00010d: fd 8b 01 | i16x8.shl
86+
000110: 0b | end
87+
000112 func[2] <i32x4_shl_0>:
88+
000113: fd 0c 71 f0 0f ff 02 77 07 | v128.const 0xff0ff071 0xe0077702 0xe0004003 0x00002004
89+
00011c: e0 03 40 00 e0 04 20 00 00 |
90+
000125: 41 03 | i32.const 3
91+
000127: fd ab 01 | i32x4.shl
92+
00012a: 0b | end
93+
00012c func[3] <i64x2_shl_0>:
94+
00012d: fd 0c 55 00 00 ff 02 07 00 | v128.const 0xff000055 0xe0000702 0xe0004003 0x00002004
95+
000136: e0 03 40 00 e0 04 20 00 00 |
96+
00013f: 41 03 | i32.const 3
97+
000141: fd cb 01 | i64x2.shl
98+
000144: 0b | end
99+
000146 func[4] <i8x16_shr_s_0>:
100+
000147: fd 0c 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
101+
000150: e0 03 00 00 0f 04 f0 0f 00 |
102+
000159: 41 03 | i32.const 3
103+
00015b: fd 6c | i8x16.shr_s
104+
00015d: 0b | end
105+
00015f func[5] <i8x16_shr_u_0>:
106+
000160: fd 0c 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
107+
000169: e0 03 00 00 0f 04 f0 0f 00 |
108+
000172: 41 03 | i32.const 3
109+
000174: fd 6d | i8x16.shr_u
110+
000176: 0b | end
111+
000178 func[6] <i16x8_shr_s_0>:
112+
000179: fd 0c 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
113+
000182: e0 03 00 00 0f 04 f0 0f 00 |
114+
00018b: 41 03 | i32.const 3
115+
00018d: fd 8c 01 | i16x8.shr_s
116+
000190: 0b | end
117+
000192 func[7] <i16x8_shr_u_0>:
118+
000193: fd 0c 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
119+
00019c: e0 03 00 00 0f 04 f0 0f 00 |
120+
0001a5: 41 03 | i32.const 3
121+
0001a7: fd 8d 01 | i16x8.shr_u
122+
0001aa: 0b | end
123+
0001ac func[8] <i32x4_shr_s_0>:
124+
0001ad: fd 0c 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
125+
0001b6: e0 03 00 00 0f 04 f0 0f 00 |
126+
0001bf: 41 03 | i32.const 3
127+
0001c1: fd ac 01 | i32x4.shr_s
128+
0001c4: 0b | end
129+
0001c6 func[9] <i32x4_shr_u_0>:
130+
0001c7: fd 0c 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
131+
0001d0: e0 03 00 00 0f 04 f0 0f 00 |
132+
0001d9: 41 03 | i32.const 3
133+
0001db: fd ad 01 | i32x4.shr_u
134+
0001de: 0b | end
135+
0001e0 func[10] <i64x2_shr_s_0>:
136+
0001e1: fd 0c 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
137+
0001ea: e0 03 00 00 0f 04 f0 0f 00 |
138+
0001f3: 41 03 | i32.const 3
139+
0001f5: fd cc 01 | i64x2.shr_s
140+
0001f8: 0b | end
141+
0001fa func[11] <i64x2_shr_u_0>:
142+
0001fb: fd 0c 0f 00 00 ff 02 70 0f | v128.const 0xff00000f 0xe00f7002 0x0f000003 0x000ff004
143+
000204: e0 03 00 00 0f 04 f0 0f 00 |
144+
00020d: 41 03 | i32.const 3
145+
00020f: fd cd 01 | i64x2.shr_u
146+
000212: 0b | end
147147
;;; STDOUT ;;)

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