reduce linter warns + add diagram

Author: WilliamZhang20

docs/Block_Diagram.jpg

@@ -11,6 +11,12 @@ You can also include images in this folder and reference them in the markdown. E
 
 The project is an AI chip inspired by Google's TPU. It multiply 8-bit floating-point valued matrices. It does so by tiling in 2x2 to fit on the chip's tiny area, so expect performance degradation compared to regular chips. However, the chip's I/O bandwidth will be fully utilized and saturated.
 
+## High Level Block Diagram
+
+Architecturally more simple than the [previous project](https://github.com/WilliamZhang20/ECE298A-TPU). The data moves through the blue, red, yellow, and green arrows.
+
+![alt](Block_Diagram.jpg)
+
 ## How to test
 
 Use cocotb and [pyuvm](https://github.com/pyuvm/pyuvm) to lean towards [IEEE-1800.2](https://blogs.sw.siemens.com/verificationhorizons/2015/07/30/uvm-the-next-ieee-standard-1800-2/).

docs/info.md

@@ -25,7 +25,7 @@ module control_unit (
 
     // Output interface
     output wire done,
-    output reg [7:0] host_outdata
+    output reg [7:0] data_out
 );
 
     // STATES - Simplified to just IDLE and ACTIVE
@@ -149,19 +149,19 @@ module control_unit (
         end
     end
 
-    // Combinational logic for host_outdata
+    // Combinational logic for data_out
     always @(*) begin
-        host_outdata = 8'b0;
+        data_out = 8'b0;
         if (data_valid) begin
             case (mem_addr)
-                3'b000: host_outdata = c00[15:8];
-                3'b001: host_outdata = c00[7:0];
-                3'b010: host_outdata = c01[15:8];
-                3'b011: host_outdata = c01[7:0];
-                3'b100: host_outdata = c10[15:8];
-                3'b101: host_outdata = c10[7:0];
-                3'b110: host_outdata = c11[15:8];
-                3'b111: host_outdata = tail_hold;
+                3'b000: data_out = c00[15:8];
+                3'b001: data_out = c00[7:0];
+                3'b010: data_out = c01[15:8];
+                3'b011: data_out = c01[7:0];
+                3'b100: data_out = c10[15:8];
+                3'b101: data_out = c10[7:0];
+                3'b110: data_out = c11[15:8];
+                3'b111: data_out = tail_hold;
             endcase
         end
     end

src/control_unit.v

@@ -4,7 +4,7 @@ module int18_to_bf16_lzd #(
     input  wire signed [17:0] acc,
     output reg  [15:0] bf16
 );
-    localparam BF16_BIAS = 127;
+    localparam BF16_BIAS = 8'd127;
 
     reg sign;
     reg [17:0] mag;
@@ -18,12 +18,15 @@ module int18_to_bf16_lzd #(
     function [4:0] lzd;
         input [17:0] x;
         integer i;
+        reg found;
         begin
-            lzd = 5'd18;  // Default: all zeros
-            for (i=17; i>=0; i=i-1) begin
-                if (x[i]==1'b1) begin
-                    lzd = 5'd17 - i;
-                    i = -1;  // Break
+            lzd   = 5'd18;
+            found = 1'b0;
+
+            for (i = 17; i >= 0; i = i - 1) begin
+                if (!found && x[i]) begin
+                    lzd   = 5'd17 - i[4:0];  // avoid width warnings
+                    found = 1'b1;            // emulate break
                 end
             end
         end
@@ -45,17 +48,17 @@ module int18_to_bf16_lzd #(
             lz = lzd(mag);
 
             // MSB position is (17 - lz), binary point at FRAC_BITS
-            exp_unbiased = (17 - lz) - FRAC_BITS;
+            exp_unbiased = $signed({1'b0, (9'd17 - {4'd0,lz})}) - FRAC_BITS;
 
-            if (exp_unbiased + BF16_BIAS < 0) begin
+            if ($signed(exp_unbiased) + $signed(BF16_BIAS) < 0) begin
                 bf16 = {sign, 15'd0}; // underflow
-            end else if (exp_unbiased + BF16_BIAS > 255) begin
+            end else if ($signed(exp_unbiased) + $signed(BF16_BIAS) > 9'd255) begin
                 bf16 = {sign, 8'hFF, 7'd0}; // overflow
             end else begin
-                exp = exp_unbiased + BF16_BIAS;
+                exp = exp_unbiased[7:0] + BF16_BIAS;
 
                 // normalize so MSB ends up at bit 17
-                normalized = mag << (lz + 1);
+                normalized = mag << (lz + 5'd1);
                 mant = normalized[17:11];
 
                 bf16 = {sign, exp, mant};

src/normalize_fp.v

@@ -56,7 +56,7 @@ module tt_um_tpu (
         .data_valid(data_valid),
         .a0_sel(a0_sel), .a1_sel(a1_sel), .b0_sel(b0_sel), .b1_sel(b1_sel),
         .done(done),
-        .host_outdata(out_data)
+        .data_out(out_data)
     );
 
     systolic_array_2x2 mmu (