fix latch inference

Author: WilliamZhang20

src/fp_add.v

@@ -3,40 +3,60 @@ module bf16_adder (
     input  logic [15:0] b,
     output logic [15:0] sum
 );
-    logic a_sign = a[15];
-    logic b_sign = b[15];
-    logic [7:0] a_exp = a[14:7];
-    logic [7:0] b_exp = b[14:7];
-    logic [6:0] a_frac = a[6:0];
-    logic [6:0] b_frac = b[6:0];
-
-    logic [8:0] exp_diff;
-    logic [8:0] big_exp, small_exp;
-    logic [7:0] big_frac, small_frac;
-    logic        swap;
-
-    logic [9:0] big_mant = {1'b1, big_frac};
-    logic [9:0] small_mant_aligned;
-    logic [10:0] sum_mant;
-    logic        sum_sign;
-
-    always@(*) begin
-        // Handle specials quickly
-        if (a_exp == '1) sum = a;
-        else if (b_exp == '1) sum = b;
-        else if (a_exp == 0 && a_frac == 0) sum = b;
-        else if (b_exp == 0 && b_frac == 0) sum = a;
-        else begin
-            swap = (a_exp < b_exp) || (a_exp == b_exp && a_frac < b_frac);
-            big_exp   = swap ? b_exp : a_exp;
-            small_exp = swap ? a_exp : b_exp;
-            big_frac  = swap ? b_frac : a_frac;
-            small_frac= swap ? a_frac : b_frac;
+
+    logic a_sign, b_sign;
+    logic [7:0] a_exp, b_exp;
+    logic [6:0] a_frac, b_frac;
+
+    // unpacked fields
+    always @(*) begin
+        a_sign = a[15];
+        b_sign = b[15];
+        a_exp  = a[14:7];
+        b_exp  = b[14:7];
+        a_frac = a[6:0];
+        b_frac = b[6:0];
+    end
+
+    always @(*) begin
+        // default to avoid latches
+        sum = a;  // safe default
+
+        // special cases
+        if (a_exp == 8'hFF) begin
+            sum = a;                                          // inf or NaN
+        end else if (b_exp == 8'hFF) begin
+            sum = b;
+        end else if (a_exp == 0 && a_frac == 0) begin
+            sum = b;
+        end else if (b_exp == 0 && b_frac == 0) begin
+            sum = a;
+        end else begin
+            // normal add
+            logic swap;
+            logic [7:0] big_exp, small_exp;
+            logic [6:0] big_frac, small_frac;
+            logic [8:0] exp_diff;
+            logic [9:0] big_mant;
+            logic [9:0] small_mant_aligned;
+            logic [10:0] sum_mant;
+            logic        sum_sign;
+
+            swap       = (a_exp < b_exp) || ((a_exp == b_exp) && (a_frac < b_frac));
+            big_exp    = swap ? b_exp  : a_exp;
+            small_exp  = swap ? a_exp  : b_exp;
+            big_frac   = swap ? b_frac : a_frac;
+            small_frac = swap ? a_frac : b_frac;
 
             exp_diff = big_exp - small_exp;
 
-            small_mant_aligned = (exp_diff >= 10) ? 0 :
-                                 {2'b1, small_frac, 1'b0} >> exp_diff;
+            big_mant = {1'b1, big_frac};  // hidden bit
+
+            if (exp_diff >= 10) begin
+                small_mant_aligned = 0;
+            end else begin
+                small_mant_aligned = {1'b1, small_frac, 2'b00} >> exp_diff;  // +2 bits for guard+round
+            end
 
             if (a_sign == b_sign) begin
                 sum_mant = {1'b0, big_mant} + small_mant_aligned;
@@ -47,12 +67,13 @@ module bf16_adder (
             end
 
             if (sum_mant[10]) begin
-                sum = {sum_sign, big_exp+1, sum_mant[9:3]};
+                sum = {sum_sign, big_exp + 1'd1, sum_mant[9:3]};
             end else if (sum_mant[9:0] == 0) begin
-                sum = 16'b0;
+                sum = 16'h0000;
             end else begin
                 sum = {sum_sign, big_exp, sum_mant[9:3]};
             end
         end
     end
+
 endmodule

src/normalize_fp.v

@@ -5,27 +5,31 @@ module bf16_normalizer (
     output logic [15:0] bf16_result
 );
 
-    logic [7:0]  mant_norm;
-    logic [7:0]  exp_final;
-
     always @(*) begin
+        // default assignment — crucial!
+        bf16_result = {sign, 15'b0};
+
         if (mant_raw == 0) begin
             bf16_result = {sign, 15'b0};
-        end else if (mant_raw[15]) begin // >= 2.0 → shift right
-            mant_norm = mant_raw[15:8] + mant_raw[7];      // round-to-nearest (add guard bit)
-            exp_final = exp_in + 1;
-        end else begin
-            mant_norm = mant_raw[14:7] + mant_raw[6];      // round-to-nearest
-            exp_final = exp_in;
         end
-
-        // Overflow → Inf
-        if (exp_final[8] || exp_final[7:0] == 8'hFF) begin
-            bf16_result = {sign, 8'hFF, 7'b0};
-        end else if (exp_final[7:0] == 0) begin
-            bf16_result = {sign, 15'b0};                   // underflow → zero
-        end else begin
-            bf16_result = {sign, exp_final[7:0], mant_norm[6:0]};
+        else if (mant_raw[15]) begin
+            // product >= 2.0 → shift right 1, round using bit[7]
+            logic [7:0] mant_rnd = mant_raw[15:8] + mant_raw[7];
+            logic [7:0] exp_adj  = exp_in + 1'b1;
+            if (exp_adj[8] || exp_adj[7:0] == 8'hFF)
+                bf16_result = {sign, 8'hFF, 7'b0};     // overflow → inf
+            else
+                bf16_result = {sign, exp_adj[7:0], mant_rnd[6:0]};
+        end
+        else begin
+            // normal case < 2.0
+            logic [7:0] mant_rnd = mant_raw[14:7] + mant_raw[6];
+            logic [7:0] exp_adj  = exp_in;
+            if (exp_adj == 0)
+                bf16_result = {sign, 15'b0};          // underflow → zero
+            else
+                bf16_result = {sign, exp_adj[7:0], mant_rnd[6:0]};
         end
     end
+
 endmodule