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Update Interrupt Controller
1 parent 72820b5 commit 3dfba0a

5 files changed

Lines changed: 50 additions & 82 deletions

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src/chips/ria816.c

Lines changed: 7 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -105,8 +105,8 @@ static uint8_t _ria816_read(ria816_t* c, uint8_t addr) {
105105
case RIA816_HW_RNG:
106106
case RIA816_HW_RNG + 1: data = (uint8_t)rand(); break;
107107

108-
case RIA816_IRQ_STATUS: data = c->irq.status; break;
109-
case RIA816_IRQ_ENABLE: data = c->irq.enable; break;
108+
case RIA816_IRQ_ENABLE: data = c->irq_enable; break;
109+
case RIA816_IRQ_STATUS: data = ~(c->int_status); break;
110110

111111
case RIA816_API_STACK: rb_get(&c->api_stack, &data); break;
112112

@@ -119,11 +119,8 @@ static void _ria816_write(ria816_t* c, uint8_t addr, uint8_t data) {
119119
switch (addr) {
120120
case RIA816_UART_TX_RX: rb_put(&c->uart_tx, data); break;
121121

122-
case RIA816_IRQ_STATUS:
123-
c->irq.interrupt = false;
124-
c->irq.status = 0;
125-
break;
126-
case RIA816_IRQ_ENABLE: c->irq.enable = data; break;
122+
case RIA816_IRQ_STATUS: break;
123+
case RIA816_IRQ_ENABLE: c->irq_enable = (data && 0x01); break;
127124

128125
case RIA816_API_STACK: rb_put(&c->api_stack, data); break;
129126
case RIA816_API_OP:
@@ -135,15 +132,11 @@ static void _ria816_write(ria816_t* c, uint8_t addr, uint8_t data) {
135132
}
136133

137134
static uint64_t _ria816_update_irq(ria816_t* c, uint64_t pins) {
138-
uint8_t ints = RIA816_GET_INTS(pins) & c->irq.enable;
135+
pins &= ~RIA816_IRQ;
139136

140-
if (c->irq.status != (ints | c->irq.status)) {
141-
c->irq.interrupt = true;
137+
if (c->cia.pins & M6526_IRQ && c->irq_enable & RIA816_INT_CIA_MASK) {
138+
pins |= RIA816_IRQ;
142139
}
143-
144-
c->irq.status = ints;
145-
146-
if (c->irq.interrupt) pins |= RIA816_IRQ;
147140
return pins;
148141
}
149142

@@ -174,7 +167,6 @@ uint64_t ria816_tick(ria816_t* c, uint64_t pins) {
174167
}
175168
}
176169

177-
if (c->cia.pins & M6526_IRQ) pins |= RIA816_INT0;
178170
pins = _ria816_update_irq(c, pins);
179171

180172
c->pins = pins;

src/chips/ria816.h

Lines changed: 7 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -89,15 +89,8 @@ extern "C" {
8989
#define RIA816_PIN_TIMERS_CS (41)
9090
#define RIA816_PIN_IRQ (42)
9191

92-
// interrupt controller sources
93-
#define RIA816_PIN_INT0 (48)
94-
#define RIA816_PIN_INT1 (49)
95-
#define RIA816_PIN_INT2 (50)
96-
#define RIA816_PIN_INT3 (51)
97-
#define RIA816_PIN_INT4 (51)
98-
#define RIA816_PIN_INT5 (53)
99-
#define RIA816_PIN_INT6 (54)
100-
#define RIA816_PIN_INT_ (55) // cannot be used with MCP23008
92+
// interrupt sources
93+
#define RIA816_INT_CIA_MASK (0x01) // CIA interrupt
10194

10295
// pin bit masks
10396
#define RIA816_RS0 (1ULL << RIA816_PIN_RS0)
@@ -121,13 +114,6 @@ extern "C" {
121114
#define RIA816_TIMERS_CS (1ULL << RIA816_PIN_TIMERS_CS)
122115
#define RIA816_TIMERS_RS (RIA816_RS4 | RIA816_RS3 | RIA816_RS2 | RIA816_RS1 | RIA816_RS0)
123116
#define RIA816_IRQ (1ULL << RIA816_PIN_IRQ)
124-
#define RIA816_INT0 (1ULL << RIA816_PIN_INT0)
125-
#define RIA816_INT1 (1ULL << RIA816_PIN_INT1)
126-
#define RIA816_INT2 (1ULL << RIA816_PIN_INT2)
127-
#define RIA816_INT3 (1ULL << RIA816_PIN_INT3)
128-
#define RIA816_INT4 (1ULL << RIA816_PIN_INT4)
129-
#define RIA816_INT5 (1ULL << RIA816_PIN_INT5)
130-
#define RIA816_INT6 (1ULL << RIA816_PIN_INT6)
131117

132118
// register indices
133119
#define RIA816_MATH_OPERA (0x00) // Operand A for multiplication and division.
@@ -152,8 +138,8 @@ extern "C" {
152138
#define RIA816_CPU_N_BRK (0x26) // 65816 vector.
153139
#define RIA816_CPU_N_ABORTB (0x28) // 65816 vector.
154140
#define RIA816_CPU_N_NMIB (0x2A) // 65816 vector.
155-
#define RIA816_IRQ_STATUS (0x2C) // Interrupt Controller Status
156-
#define RIA816_IRQ_ENABLE (0x2D) // Interrupt Controller Enable Mask
141+
#define RIA816_IRQ_ENABLE (0x2C) // RIA interrupts enable
142+
#define RIA816_IRQ_STATUS (0x2D) // Interrupt Controller status
157143
#define RIA816_CPU_N_IRQB (0x2E) // 65816 vector.
158144
#define RIA816_API_STACK (0x30) // 512 bytes for passing call parameters.
159145
#define RIA816_API_OP (0x31) // Write the API operation id here to begin a kernel call.
@@ -168,13 +154,6 @@ extern "C" {
168154
#define RIA816_CPU_E_IRQB_BRK (0x3E) // 6502 vector.
169155
#define RIA816_NUM_REGS (64)
170156

171-
typedef struct {
172-
uint8_t pins;
173-
uint8_t enable;
174-
uint8_t status;
175-
bool interrupt;
176-
} ria816_interrupt_t;
177-
178157
// a memory-fetch callback, used to read video memory bytes into the CGIA
179158
typedef void (*ria816_api_call_t)(uint8_t data, void* user_data);
180159

@@ -194,8 +173,9 @@ typedef struct {
194173
ring_buffer_t uart_rx;
195174
ring_buffer_t uart_tx;
196175
m6526_t cia;
197-
ria816_interrupt_t irq;
198-
uint64_t us; // monotonic clock
176+
uint8_t int_status; // interrupts "controller"
177+
uint8_t irq_enable; // RIA interrupts enable [. . . . . . . TIMERS]
178+
uint64_t us; // monotonic clock
199179
int ticks_per_ms;
200180
int ticks_counter;
201181
uint64_t pins;
@@ -212,9 +192,6 @@ typedef struct {
212192
#define RIA816_SET_DATA(p, d) \
213193
{ p = (((p) & ~0xFF0000ULL) | (((d) << 16) & 0xFF0000ULL)); }
214194

215-
// extract 8-bit of interrupt sources from 64-bit pins
216-
#define RIA816_GET_INTS(p) ((uint8_t)((p) >> 48))
217-
218195
#define RIA816_REG16(regs, ADDR) (uint16_t)((uint16_t)(regs[ADDR]) | ((uint16_t)(regs[ADDR + 1]) << 8))
219196

220197
// initialize a new RIA816 instance

src/systems/x65.c

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -183,7 +183,10 @@ static uint64_t _x65_tick(x65_t* sys, uint64_t pins) {
183183
TCA6416A_SET_P01(gpio_pins, p0, p1);
184184
gpio_pins = tca6416a_tick(&sys->gpio, gpio_pins);
185185
if (gpio_pins & TCA6416A_INT) {
186-
ria_pins |= RIA816_INT1;
186+
sys->ria.int_status |= X65_INT_GPIO;
187+
}
188+
else {
189+
sys->ria.int_status &= ~X65_INT_GPIO;
187190
}
188191
if ((gpio_pins & (TCA6416A_CS | TCA6416A_RW)) == (TCA6416A_CS | TCA6416A_RW)) {
189192
pins = W65816_COPY_DATA(pins, gpio_pins);
@@ -197,6 +200,12 @@ static uint64_t _x65_tick(x65_t* sys, uint64_t pins) {
197200
if ((ria_pins & (RIA816_CS | RIA816_RW)) == (RIA816_CS | RIA816_RW)) {
198201
pins = W65816_COPY_DATA(pins, ria_pins);
199202
}
203+
if (ria_pins & RIA816_IRQ) {
204+
sys->ria.int_status |= X65_INT_RIA;
205+
}
206+
else {
207+
sys->ria.int_status &= ~X65_INT_RIA;
208+
}
200209
}
201210

202211
/* tick the CGIA display chip:
@@ -234,13 +243,12 @@ static uint64_t _x65_tick(x65_t* sys, uint64_t pins) {
234243
}
235244
}
236245

237-
/* Merge interrupts
238-
FIXME: implement PCF8574A interrupts controller
239-
*/
246+
/* NAND gate in interrupt "controller"
247+
*/
240248
{
241-
if (ria_pins & RIA816_IRQ) pins |= W65816_IRQ;
242-
// if (sd1_pins & YMF825_IRQ) pins |= W65816_IRQ;
243-
if (opl3_pins & YMF262_IRQ) pins |= W65816_IRQ;
249+
if (sys->ria.int_status) {
250+
pins |= W65816_IRQ;
251+
}
244252
}
245253

246254
/* remaining CPU IO and memory accesses, those don't fit into the

src/ui/ui_ria816.cc

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -147,11 +147,9 @@ static void _ui_ria816_draw_state(ui_ria816_t* win) {
147147
ui_util_b8("UART : ", ria_status);
148148
ImGui::SameLine();
149149
ImGui::Text("%s%s", ria_status & 0b10000000 ? "CTS " : "", ria_status & 0b01000000 ? "DRD " : "");
150-
ImGui::SeparatorText("Interrupt Controller");
151-
ui_util_b8("Enable: ", ria->irq.enable);
152-
ui_util_b8("Status: ", ria->irq.status);
153-
ImGui::SameLine();
154-
ImGui::Text("%s", ria->irq.interrupt ? "Active" : "");
150+
ImGui::SeparatorText("Interrupts");
151+
ui_util_b8("RIA : ", ria->irq_enable);
152+
ui_util_b8("Status: ", ria->int_status);
155153
if (ImGui::BeginTable("##cpu_vectors", 3)) {
156154
ImGui::TableSetupColumn("", ImGuiTableColumnFlags_WidthFixed, 64);
157155
ImGui::TableSetupColumn("Emulated", ImGuiTableColumnFlags_WidthFixed, 72);

src/ui/ui_x65.cc

Lines changed: 18 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -332,30 +332,23 @@ static const ui_chip_pin_t _ui_x65_cpu65816_pins[] = {
332332
};
333333

334334
static const ui_chip_pin_t _ui_x65_ria_pins[] = {
335-
{ "D0", 0, RIA816_D0 },
336-
{ "D1", 1, RIA816_D1 },
337-
{ "D2", 2, RIA816_D2 },
338-
{ "D3", 3, RIA816_D3 },
339-
{ "D4", 4, RIA816_D4 },
340-
{ "D5", 5, RIA816_D5 },
341-
{ "D6", 6, RIA816_D6 },
342-
{ "D7", 7, RIA816_D7 },
343-
{ "RW", 10, RIA816_RW },
344-
{ "CS", 11, RIA816_CS },
345-
{ "IRQ", 12, RIA816_IRQ },
346-
{ "RS0", 14, RIA816_RS0 },
347-
{ "RS1", 15, RIA816_RS1 },
348-
{ "RS2", 16, RIA816_RS2 },
349-
{ "RS3", 17, RIA816_RS3 },
350-
{ "RS4", 18, RIA816_RS4 },
351-
{ "RS5", 19, RIA816_RS5 },
352-
{ "INT0", 21, RIA816_INT0 },
353-
{ "INT1", 22, RIA816_INT1 },
354-
{ "INT2", 23, RIA816_INT2 },
355-
{ "INT3", 24, RIA816_INT3 },
356-
{ "INT4", 25, RIA816_INT4 },
357-
{ "INT5", 26, RIA816_INT5 },
358-
{ "INT6", 27, RIA816_INT6 },
335+
{ "D0", 0, RIA816_D0 },
336+
{ "D1", 1, RIA816_D1 },
337+
{ "D2", 2, RIA816_D2 },
338+
{ "D3", 3, RIA816_D3 },
339+
{ "D4", 4, RIA816_D4 },
340+
{ "D5", 5, RIA816_D5 },
341+
{ "D6", 6, RIA816_D6 },
342+
{ "D7", 7, RIA816_D7 },
343+
{ "RW", 9, RIA816_RW },
344+
{ "CS", 10, RIA816_CS },
345+
{ "RS0", 11, RIA816_RS0 },
346+
{ "RS1", 12, RIA816_RS1 },
347+
{ "RS2", 13, RIA816_RS2 },
348+
{ "RS3", 14, RIA816_RS3 },
349+
{ "RS4", 15, RIA816_RS4 },
350+
{ "RS5", 16, RIA816_RS5 },
351+
{ "IRQ", 19, RIA816_IRQ },
359352
};
360353

361354
static const ui_chip_pin_t _ui_x65_gpio_pins[] = {
@@ -492,7 +485,7 @@ void ui_x65_init(ui_x65_t* ui, const ui_x65_desc_t* ui_desc) {
492485
desc.ria = &ui->x65->ria;
493486
desc.x = x;
494487
desc.y = y;
495-
UI_CHIP_INIT_DESC(&desc.chip_desc, "RIA816", 28, _ui_x65_ria_pins);
488+
UI_CHIP_INIT_DESC(&desc.chip_desc, "RIA816", 20, _ui_x65_ria_pins);
496489
ui_ria816_init(&ui->ria, &desc);
497490
}
498491
x += dx;

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