PR#269待进一步完善事项

[LeoLau94]

• feat(silu_mul): npu compiler with two patterns #269 (comment)_

• feat(silu_mul): npu compiler with two patterns #269 (comment)_

• feat(silu_mul): npu compiler with two patterns #269 (comment)_

• feat(silu_mul): npu compiler with two patterns #269 (comment)_

[wwens7]

补充：当前 triton kernel 写法并不亲和非 gpu 架构，正确写法为按照硬件的核心数量（在此例中，是 vec core 数量）设置 num_programs，在 triton kernel 内使用类似 grid 跨步的形式构造 for loop，使triton 编译器依赖此 loop 完成 prefetch 操作进行 overlap。

例证：简单对 add_rms_norm进行了 profile（optimized kernel latency为采用正确范式编写的 triton kernel）：
shape == [32, 768], current kernel latency == 17.7004, optimized kernel latency == 19.428
shape == [256, 1024], current kernel latency == 80.7439, optimized kernel latency == 76.40919999999997
shape == [2048, 3584], current kernel latency == 1584.432, optimized kernel latency == 1514.98777