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Importing the previously developed hardware CI pipeline
Signed-off-by: Jan-Oliver Opdenhövel <joo@mail.uni-paderborn.de>
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.github/workflows/import-pr.yml

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name: Import a PR branch into the repository
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on:
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workflow_dispatch:
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inputs:
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pr_number:
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description: The pull request ID to import
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required: true
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type: int
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jobs:
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import_pr:
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runs-on: ubuntu-latest
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env:
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GH_TOKEN: ${{ github.token }}
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steps:
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- uses: actions/checkout@v6
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- run: |
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git config user.name "github-actions[bot]"
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git config user.email "41898282+github-actions[bot]@users.noreply.github.com"
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gh pr checkout -b "pr/${{inputs.pr_number}}" ${{inputs.pr_number}}
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git push "${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}" "pr/${{inputs.pr_number}}"

.gitlab-ci.yml

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workflow:
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rules:
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- if: $CI_PIPELINE_SOURCE == "push" && ( $CI_COMMIT_BRANCH == "main" || $CI_COMMIT_BRANCH == "dev" || $CI_COMMIT_BRANCH == "feature/hardware_ci" || $CI_COMMIT_BRANCH =~ /^pr\// )
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variables:
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SLURM_ACCOUNT: hpc-prf-cifi
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GIT_SUBMODULE_STRATEGY: recursive
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default:
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id_tokens:
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CI_JOB_JWT:
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aud: https://git.uni-paderborn.de
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before_script:
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- module reset
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- ml fpga lang tools devel Python xilinx/vivado/25.1 UnZip gitlab-cli CMake
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- export LD_LIBRARY_PATH=$XILINX_VIVADO/lib/lnx64.o/:$LD_LIBRARY_PATH # Set the LD_LIBRARY_PATH for simulation
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- python3 -m venv .venv
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- source .venv/bin/activate
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- pip install --upgrade pip
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- pip install -r requirements.txt
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- glab auth login --job-token $CI_JOB_TOKEN --hostname $CI_SERVER_FQDN --api-protocol $CI_SERVER_PROTOCOL
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artifacts:
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access: 'developer'
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package_linker:
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tags:
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- otus
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when: manual
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allow_failure: false
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inputs:
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build_base_design:
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default: false
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description: Build the base design from scratch?
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type: boolean
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variables:
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SCHEDULER_PARAMETERS: "-A $SLURM_ACCOUNT -q fpgasynthesis -p normal -c 16 --mem 120G -t 12:00:00"
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BASE_DESIGN_REF: feature/hardware_ci
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needs:
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- project: $CI_PROJECT_PATH
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job: package_linker
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ref: $BASE_DESIGN_REF
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artifacts: true
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script:
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- cd linker
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# Unzipping the SMBus IP
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- glab -R $CI_PROJECT_PATH securefile download --name "smbus_v1_1-20240328.zip"
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- unzip smbus_v1_1-20240328.zip
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- mv smbus_v1_1-20240328 slashkit/resources/base/iprepo/
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# Building the other IP cores
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- make -C slashkit/resources/base/iprepo -j16
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# Building the base design
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- if [ ${{ job.inputs.build_base_design }} = "true" -a -e slashkit/resources/static_shell ]; then rm -r slashkit/resources/static_shell; fi
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- if [ ${{ job.inputs.build_base_design }} = "true" ]; then python3 -m slashkit install --jobs 16 --out-dir slashkit/resources/ > install.out.log 2> install.err.log; fi
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# Packaging the linker
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- pip wheel --no-deps .
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artifacts:
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public: false
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when: always
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paths:
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- linker/install.out.log
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- linker/install.err.log
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- linker/slashkit/resources/static_shell
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- linker/slashkit*.whl
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test emulation/simulation:
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tags:
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- otus
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needs:
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- job: package_linker
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artifacts: true
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variables:
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SCHEDULER_PARAMETERS: "-A $SLURM_ACCOUNT -p normal -c 8 --mem 80G -t 02:00:00"
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script:
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# Install the linker into the virtualenv
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- pip install linker/slashkit*.whl
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- mkdir -p build/vrt build/cmake
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# Build and install VRT, VRTD, and libslash
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- cd build/vrt
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- cmake -DVRT_INCLUDE_VRTD=1 -DVRTD_INCLUDE_LIBSLASH=1 -DCMAKE_INSTALL_PREFIX=$(realpath ../../.venv/) -DCMAKE_INSTALL_LIBDIR=lib ../../vrt/
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- make install -j8
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# Install the cmake tools
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- cd ../cmake
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- cmake -DCMAKE_INSTALL_PREFIX=$(realpath ../../.venv/) -DCMAKE_INSTALL_LIBDIR=lib ../../cmake/
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- make install -j8
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- cd ../..
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# Set all environment variables to point to the venv
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- export C_INCLUDE_PATH=$(realpath ./.venv/include):$C_INCLUDE_PATH
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- export CPLUS_INCLUDE_PATH=$(realpath ./.venv/include):$CPLUS_INCLUDE_PATH
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- export LD_LIBRARY_PATH=$(realpath ./.venv/lib):$LD_LIBRARY_PATH
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- export LIBRARY_PATH=$(realpath ./.venv/lib):$LIBRARY_PATH
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- export CMAKE_MODULE_PATH=$(realpath ./.venv/lib/cmake):$CMAKE_MODULE_PATH
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# Building and testing all working examples in emulatin and simulation
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- ./scripts/test-examples.sh emu
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- ./scripts/test-examples.sh sim
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# Build the 00_axilite example in hardware
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- cd examples/00_axilite/build && make axilite_hw > axilite_hw.out.log 2> axilite_hw.err.log
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artifacts:
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public: false
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when: always
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paths:
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- examples/00_axilite/build/00_axilite
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- examples/00_axilite/build/*.vbin/
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- examples/00_axilite/build/*.log

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