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laeachurBhawana Sahu
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dp14txss: zcu_pt_dp14_hdcp: Fix DP14 HDCP multi combination issues
Application is failing when HDCP2.2 only is enabled in both RX and TX. Some functions are enabled without any HDCP Macros by default. Now those are fixed. Signed-off-by: Lakshmi Prasanna Eachuri <lakshmi.prasanna.eachuri@amd.com>
1 parent 68878f2 commit 5594558

6 files changed

Lines changed: 40 additions & 4 deletions

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XilinxProcessorIPLib/drivers/dp14txss/examples/src/zcu_pt_dp14_hdcp/passthrough.c

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1338,7 +1338,19 @@ void DpPt_Main(void){
13381338

13391339
#if ENABLE_HDCP_IN_DESIGN
13401340
#if (ENABLE_HDCP22_IN_RX | ENABLE_HDCP22_IN_TX)
1341-
if (DpRxSsInst.HdcpIsReady || DpTxSsInst.HdcpIsReady) {
1341+
if (
1342+
#if (XPAR_XHDCP_NUM_INSTANCES > 0 || XPAR_XHDCP22_RX_DP_NUM_INSTANCES > 0)
1343+
DpRxSsInst.HdcpIsReady
1344+
#else
1345+
0
1346+
#endif
1347+
||
1348+
#if (XPAR_XHDCP_NUM_INSTANCES > 0 || XPAR_XHDCP22_TX_DP_NUM_INSTANCES > 0)
1349+
DpTxSsInst.HdcpIsReady
1350+
#else
1351+
0
1352+
#endif
1353+
) {
13421354
/* Poll HDCP22 */
13431355
XHdcp22_Poll(&Hdcp22Repeater);
13441356
}

XilinxProcessorIPLib/drivers/dp14txss/examples/src/zcu_pt_dp14_hdcp/rx.c

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/******************************************************************************
22
* Copyright (C) 2018 – 2022 Xilinx, Inc. All rights reserved.
3-
* Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
3+
* Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
44
* SPDX-License-Identifier: MIT
55
******************************************************************************/
66

@@ -466,7 +466,9 @@ void DpRxSs_TrainingDoneHandler(void *InstancePtr)
466466
DpRxSsInst.VBlankCount = 0;
467467
rx_unplugged = 0;
468468
#if ENABLE_HDCP_IN_DESIGN
469+
#if (ENABLE_HDCP1x_IN_RX > 0) || (XPAR_XHDCP22_RX_DP_NUM_INSTANCES > 0)
469470
XDpRxSs_SetLane(&DpRxSsInst, DpRxSsInst.UsrOpt.LaneCount);
471+
#endif
470472
#if (ENABLE_HDCP1x_IN_RX && (ENABLE_HDCP1x_IN_TX || ENABLE_HDCP22_IN_TX))
471473
XDpRxSs_SetPhysicalState(&DpRxSsInst, hdcp_capable_org); //TRUE);
472474
#else
@@ -1219,8 +1221,10 @@ void Print_ExtPkt()
12191221
void Dprx_HdcpAuthCallback(void *InstancePtr) {
12201222
XDpRxSs *XDpRxSsInst = (XDpRxSs *)InstancePtr;
12211223

1224+
#if (ENABLE_HDCP1x_IN_RX)
12221225
/* Set Timer Counter reset done */
12231226
XDpRxSsInst->TmrCtrResetDone = 1;
1227+
#endif
12241228
if (XDpTxSs_IsConnected(&DpTxSsInst)) {
12251229
#if (ENABLE_HDCP1x_IN_TX | ENABLE_HDCP22_IN_TX)
12261230
XDpTxSs_DisableEncryption(&DpTxSsInst,0x1);
@@ -1244,6 +1248,7 @@ void Dprx_HdcpAuthCallback(void *InstancePtr) {
12441248
}
12451249
}
12461250

1251+
#if ((ENABLE_HDCP1x_IN_RX > 0) || (ENABLE_HDCP22_IN_RX > 0))
12471252
static void Dppt_TimeOutCallback(void *InstancePtr, u8 TmrCtrNumber)
12481253
{
12491254
XDpRxSs *XDpRxSsPtr = (XDpRxSs *)InstancePtr;
@@ -1274,6 +1279,6 @@ void Dprx_HdcpUnAuthCallback(void *InstancePtr) {
12741279
InstancePtr);
12751280

12761281
}
1277-
1282+
#endif
12781283

12791284
#endif /* ENABLE_HDCP_IN_DESIGN */

XilinxProcessorIPLib/drivers/dp14txss/examples/src/zcu_pt_dp14_hdcp/tx.c

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -429,16 +429,20 @@ void DpPt_HpdEventHandler(void *InstancePtr)
429429
// usleep(50000);
430430
// This part has added to give HDCP a proper handle when hdp even happens
431431
// HDCP block will disable Tx side encryption when hpd detected
432-
#if ENABLE_HDCP_IN_DESIGN
432+
#if ENABLE_HDCP_IN_DESIGN
433+
#if (ENABLE_HDCP1x_IN_TX | ENABLE_HDCP22_IN_TX)
433434
XDpTxSs_DisableEncryption(&DpTxSsInst,0x1);
435+
#endif
434436
#if ENABLE_HDCP1x_IN_TX
435437
XDpTxSs_SetPhysicalState(&DpTxSsInst, TRUE);
436438
#endif
437439

438440
#if (ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX)
439441
XHdcp1xExample_Poll();
440442
#endif
443+
#if (ENABLE_HDCP1x_IN_TX | ENABLE_HDCP22_IN_TX)
441444
XDpTxSs_HdcpEnable(&DpTxSsInst);
445+
#endif
442446
#if (ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX)
443447
XHdcp1xExample_Poll();
444448
#endif
@@ -479,8 +483,10 @@ void DpPt_HpdEventHandler(void *InstancePtr)
479483
#if ENABLE_HDCP_IN_DESIGN
480484
{
481485
xdbg_printf(XDBG_DEBUG_GENERAL, ".~\r\n");
486+
#if (ENABLE_HDCP1x_IN_TX | ENABLE_HDCP22_IN_TX)
482487
XDpTxSs_DisableEncryption(&DpTxSsInst,0x1);
483488
XDpTxSs_HdcpDisable(&DpTxSsInst);
489+
#endif
484490
#if ENABLE_HDCP1x_IN_TX
485491
XDpTxSs_SetPhysicalState(&DpTxSsInst, hdcp_capable_org);
486492
#endif
@@ -1088,7 +1094,9 @@ u32 start_tx(u8 line_rate, u8 lane_count, user_config_struct user_config,
10881094
XDp_TxCfgSetColorEncode(DpTxSsInst.DpPtr, XDP_TX_STREAM_ID1, \
10891095
format, XVIDC_BT_601, XDP_DR_CEA);
10901096
#if ENABLE_HDCP_IN_DESIGN
1097+
#if (ENABLE_HDCP1x_IN_TX | ENABLE_HDCP22_IN_TX)
10911098
XDpTxSs_HdcpDisable(&DpTxSsInst);
1099+
#endif
10921100
#if (ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX)
10931101
XHdcp1xExample_Poll();
10941102
#endif

XilinxProcessorIPLib/drivers/dp14txss/examples/src/zcu_pt_dp14_hdcp/xdptxss_zcu102_dp14_pt_hdcp.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,8 @@ int gIsKeyWrittenInEeeprom = FALSE;
8888
#define INTRNAME_DPRX 0
8989
#if (ENABLE_HDCP_IN_DESIGN && ENABLE_HDCP22_IN_RX && ENABLE_HDCP1x_IN_RX)
9090
#define INTRNAME_DPRX_TIMER 4
91+
#elif (ENABLE_HDCP_IN_DESIGN && ENABLE_HDCP1x_IN_RX)
92+
#define INTRNAME_DPRX_TIMER 2
9193
#else
9294
#define INTRNAME_DPRX_TIMER 3
9395
#endif
@@ -737,6 +739,7 @@ u32 DpSs_Main(void)
737739

738740
#if (ENABLE_HDCP22_IN_RX | ENABLE_HDCP22_IN_TX)
739741
extern XHdcp22_Repeater Hdcp22Repeater;
742+
#if (ENABLE_HDCP1x_IN_TX | ENABLE_HDCP22_IN_TX)
740743
if (XDpTxSs_HdcpIsReady(&DpTxSsInst)) {
741744
/* Initialize the HDCP instance */
742745

@@ -745,6 +748,7 @@ u32 DpSs_Main(void)
745748
/* Set HDCP downstream interface(s) */
746749
XHdcp_SetDownstream(&Hdcp22Repeater, &DpTxSsInst);
747750
}
751+
#endif
748752
#endif
749753

750754
/* Set DP141 Tx driver here. */

XilinxProcessorIPLib/drivers/dp14txss/examples/src/zcu_pt_dp14_hdcp/xhdcp1x_example.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -150,7 +150,11 @@ extern XINTC IntcInst;
150150
#else
151151
#define INTRNAME_DPTX_1XCIPHER 1
152152
#endif
153+
#if (ENABLE_HDCP22_IN_RX)
153154
#define INTRNAME_DPRX_1XCIPHER 3
155+
#else
156+
#define INTRNAME_DPRX_1XCIPHER 1
157+
#endif
154158
#endif
155159
/***************** Macros (Inline Functions) Definitions *********************/
156160

XilinxProcessorIPLib/drivers/dp14txss/examples/src/zcu_pt_dp14_hdcp/xhdcp22_example.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
/*******************************************************************************
22
* Copyright (C) 2020-2021 Xilinx, Inc. All rights reserved.
3+
* Copyright 2023-2024 Advanced Micro Devices, Inc. All Rights Reserved.
34
* SPDX-License-Identifier: MIT
45
*******************************************************************************/
56

@@ -354,7 +355,9 @@ static void XHdcp22_DownstreamAuthenticatedCallback(void *HdcpInstancePtr)
354355
/* After authentication start encryption */
355356
for (int i = 0; (i < InstancePtr->DownstreamInstanceBinded); i++) {
356357
// xil_printf("HDCP 2.2 downstream authenticated\r\n");
358+
#if (ENABLE_HDCP1x_IN_TX | ENABLE_HDCP22_IN_TX)
357359
XDpTxSs_EnableEncryption((void *)InstancePtr->DownstreamInstancePtr[i], 1);
360+
#endif
358361
}
359362
//
360363
// /* Enforce blanking */

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