finn-examples/build/bnn-pynq/folding_config/cnv-w1a1_folding_config.json at a3402f4af409853e51d3fa496f20f098d0667e4a · Xilinx/finn-examples · GitHub

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
{
  "Defaults": {},
  "Thresholding_rtl_0": {
    "PE": 1
  },
  "ConvolutionInputGenerator_rtl_0": {
    "SIMD": 3,
    "ram_style": "distributed"
  },
  "MVAU_hls_0": {
    "PE": 16,
    "SIMD": 27,
    "ram_style": "auto",
    "resType": "lut"
  },
  "ConvolutionInputGenerator_rtl_1": {
    "SIMD": 64,
    "ram_style": "distributed"
  },
  "MVAU_hls_1": {
    "PE": 16,
    "SIMD": 576,
    "ram_style": "auto",
    "resType": "lut"
  },
  "ConvolutionInputGenerator_rtl_2": {
    "SIMD": 16,
    "ram_style": "distributed"
  },
  "Pool_hls_0": {
    "PE": 16
  },
  "ConvolutionInputGenerator_rtl_3": {
    "SIMD": 32,
    "ram_style": "distributed"
  },
  "MVAU_hls_2": {
    "PE": 4,
    "SIMD": 576,
    "ram_style": "auto",
    "resType": "lut"
  },
  "ConvolutionInputGenerator_rtl_4": {
    "SIMD": 32,
    "ram_style": "distributed"
  },
  "MVAU_hls_3": {
    "PE": 8,
    "SIMD": 576,
    "ram_style": "auto",
    "resType": "lut"
  },
  "ConvolutionInputGenerator_rtl_5": {
    "SIMD": 4,
    "ram_style": "distributed"
  },
  "Pool_hls_1": {
    "PE": 4
  },
  "ConvolutionInputGenerator_rtl_6": {
    "SIMD": 4,
    "ram_style": "distributed"
  },
  "MVAU_hls_4": {
    "PE": 1,
    "SIMD": 576,
    "ram_style": "auto",
    "resType": "lut"
  },
  "ConvolutionInputGenerator_rtl_7": {
    "SIMD": 1,
    "ram_style": "distributed"
  },
  "MVAU_hls_5": {
    "PE": 1,
    "SIMD": 128,
    "ram_style": "auto",
    "resType": "lut"
  },
  "MVAU_hls_6": {
    "PE": 1,
    "SIMD": 32,
    "ram_style": "auto",
    "resType": "lut"
  },
  "MVAU_hls_7": {
    "PE": 1,
    "SIMD": 64,
    "ram_style": "auto",
    "resType": "lut"
  },
  "MVAU_hls_8": {
    "PE": 1,
    "SIMD": 2,
    "ram_style": "auto",
    "resType": "lut"
  },
  "LabelSelect_hls_0": {
    "PE": 1
  }
}