From 63bd7b60b0376cc6ddb0cac63afa8677c5b1d571 Mon Sep 17 00:00:00 2001 From: Martien de Jong Date: Thu, 5 Mar 2026 13:25:49 +0100 Subject: [PATCH 1/2] [AIE] Move AIE2 into a subdirectory AIE2 was used as a representative for AIE2, AIE2P and AIE2PS. Some refactorings were made into AIE2Common, which still reside in the top directory. In this stage, we still have some cross-target includes, mainly because it needs a lot of effort to untangle the knot. --- llvm/lib/Target/AIE/AIE2AsmPrinter.cpp | 115 -------- ...{AIE2AddrSpace.h => AIE2CommonAddrSpace.h} | 26 +- .../Target/AIE/AIE2CommonTargetMachine.cpp | 264 ++++++++++++++++++ ...getMachine.h => AIE2CommonTargetMachine.h} | 9 +- llvm/lib/Target/AIE/AIEAsmPrinterInit.cpp | 33 +++ llvm/lib/Target/AIE/AIEBaseAsmPrinter.cpp | 81 +++++- llvm/lib/Target/AIE/AIEBaseAsmPrinter.h | 19 +- llvm/lib/Target/AIE/AIEBaseHardwareLoops.cpp | 4 +- llvm/lib/Target/AIE/AIEBaseSubtarget.cpp | 1 + llvm/lib/Target/AIE/AIEBaseSubtarget.h | 10 + llvm/lib/Target/AIE/AIEBaseTargetMachine.cpp | 2 +- llvm/lib/Target/AIE/AIECombinerHelper.cpp | 8 +- .../Target/AIE/AsmParser/AIE2AsmParser.cpp | 8 +- llvm/lib/Target/AIE/CMakeLists.txt | 31 +- .../AIE/Disassembler/AIE2Disassembler.cpp | 4 +- .../AIE/InstPrinter/AIE2InstPrinter.cpp | 4 +- llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.cpp | 53 +--- llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.h | 19 ++ llvm/lib/Target/AIE/{ => aie2}/AIE2.h | 2 +- llvm/lib/Target/AIE/aie2/AIE2AsmPrinter.cpp | 53 ++++ .../Target/AIE/{ => aie2}/AIE2AsmPrinter.h | 17 +- .../AIE/{ => aie2}/AIE2FrameLowering.cpp | 2 +- .../Target/AIE/{ => aie2}/AIE2FrameLowering.h | 2 +- .../AIE/{ => aie2}/AIE2ISelLowering.cpp | 2 +- .../Target/AIE/{ => aie2}/AIE2ISelLowering.h | 2 +- .../Target/AIE/{ => aie2}/AIE2InstrInfo.cpp | 0 .../lib/Target/AIE/{ => aie2}/AIE2InstrInfo.h | 0 .../{ => aie2}/AIE2InstructionSelector.cpp | 0 .../AIE/{ => aie2}/AIE2LegalizerInfo.cpp | 2 +- .../Target/AIE/{ => aie2}/AIE2LegalizerInfo.h | 2 +- .../AIE2PostLegalizerCustomCombiner.cpp | 5 +- .../AIE2PostLegalizerGenericCombiner.cpp | 12 +- .../{ => aie2}/AIE2PreLegalizerCombiner.cpp | 9 +- .../AIE/{ => aie2}/AIE2RegisterBankInfo.cpp | 2 +- .../AIE/{ => aie2}/AIE2RegisterBankInfo.h | 2 +- .../AIE/{ => aie2}/AIE2RegisterInfo.cpp | 2 +- .../Target/AIE/{ => aie2}/AIE2RegisterInfo.h | 2 +- .../Target/AIE/{ => aie2}/AIE2Subtarget.cpp | 2 +- .../lib/Target/AIE/{ => aie2}/AIE2Subtarget.h | 4 +- .../AIE/{ => aie2}/AIE2TargetMachine.cpp | 4 +- llvm/lib/Target/AIE/aie2/AIE2TargetMachine.h | 21 ++ .../{ => aie2}/AIE2TargetTransformInfo.cpp | 2 +- .../AIE/{ => aie2}/AIE2TargetTransformInfo.h | 2 +- llvm/lib/Target/AIE/aie2p/AIE2PSubtarget.h | 7 +- .../lib/Target/AIE/aie2p/AIE2PTargetMachine.h | 5 +- llvm/lib/Target/AIE/aie2ps/AIE2PSSubtarget.h | 7 +- .../Target/AIE/HazardRecognizerTest.cpp | 6 +- 47 files changed, 600 insertions(+), 269 deletions(-) delete mode 100644 llvm/lib/Target/AIE/AIE2AsmPrinter.cpp rename llvm/lib/Target/AIE/{AIE2AddrSpace.h => AIE2CommonAddrSpace.h} (83%) create mode 100644 llvm/lib/Target/AIE/AIE2CommonTargetMachine.cpp rename llvm/lib/Target/AIE/{AIE2TargetMachine.h => AIE2CommonTargetMachine.h} (90%) create mode 100644 llvm/lib/Target/AIE/AIEAsmPrinterInit.cpp create mode 100644 llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.h rename llvm/lib/Target/AIE/{ => aie2}/AIE2.h (96%) create mode 100644 llvm/lib/Target/AIE/aie2/AIE2AsmPrinter.cpp rename llvm/lib/Target/AIE/{ => aie2}/AIE2AsmPrinter.h (74%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2FrameLowering.cpp (98%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2FrameLowering.h (96%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2ISelLowering.cpp (98%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2ISelLowering.h (96%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2InstrInfo.cpp (100%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2InstrInfo.h (100%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2InstructionSelector.cpp (100%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2LegalizerInfo.cpp (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2LegalizerInfo.h (95%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2PostLegalizerCustomCombiner.cpp (97%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2PostLegalizerGenericCombiner.cpp (95%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2PreLegalizerCombiner.cpp (98%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2RegisterBankInfo.cpp (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2RegisterBankInfo.h (97%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2RegisterInfo.cpp (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2RegisterInfo.h (98%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2Subtarget.cpp (97%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2Subtarget.h (98%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2TargetMachine.cpp (98%) create mode 100644 llvm/lib/Target/AIE/aie2/AIE2TargetMachine.h rename llvm/lib/Target/AIE/{ => aie2}/AIE2TargetTransformInfo.cpp (97%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2TargetTransformInfo.h (97%) diff --git a/llvm/lib/Target/AIE/AIE2AsmPrinter.cpp b/llvm/lib/Target/AIE/AIE2AsmPrinter.cpp deleted file mode 100644 index eb4ab00e2084..000000000000 --- a/llvm/lib/Target/AIE/AIE2AsmPrinter.cpp +++ /dev/null @@ -1,115 +0,0 @@ -//===-- AIE2AsmPrinter.cpp - AIEngine V2 LLVM assembly writer ------------===// -// -// This file is licensed under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates -// -//===----------------------------------------------------------------------===// -// -// This file contains a printer that converts from our internal representation -// of machine-dependent LLVM code to the AIEngine V2 assembly language. -// -//===----------------------------------------------------------------------===// - -#include "AIE2AsmPrinter.h" -#include "AIE2TargetMachine.h" -#include "InstPrinter/AIE2InstPrinter.h" -#include "llvm/Analysis/OptimizationRemarkEmitter.h" -#include "llvm/CodeGen/AsmPrinter.h" -#include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h" -#include "llvm/MC/MCStreamer.h" -#include "llvm/Support/raw_ostream.h" - -using namespace llvm; - -#define DEBUG_TYPE "aie-asm-printer" - -// Simple pseudo-instructions have their lowering (with expansion to real -// instructions) auto-generated. -#include "AIE2GenMCPseudoLowering.inc" - -bool AIE2AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, - const char *ExtraCode, raw_ostream &OS) { - // First try the generic code, which knows about modifiers like 'c' and 'n'. - if (!AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS)) - return false; - - const MachineOperand &MO = MI->getOperand(OpNo); - switch (MO.getType()) { - case MachineOperand::MO_Immediate: - OS << MO.getImm(); - return false; - case MachineOperand::MO_Register: - OS << AIE2InstPrinter::getRegisterName(MO.getReg()); - return false; - default: - break; - } - - return true; -} - -bool AIE2AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, - unsigned OpNo, const char *ExtraCode, - raw_ostream &OS) { - if (!ExtraCode) { - const MachineOperand &MO = MI->getOperand(OpNo); - // For now, we only support register memory operands in registers and - // assume there is no addend - if (!MO.isReg()) - return true; - - OS << "0(" << AIE2InstPrinter::getRegisterName(MO.getReg()) << ")"; - return false; - } - - return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, ExtraCode, OS); -} - -bool AIE2AsmPrinter::lowerOperand(const MachineOperand &MO, - MCOperand &MCOp) const { - return LowerAIEMachineOperandToMCOperand(MO, MCOp, *this); -} - -void AIE2AsmPrinter::emitBundleCount(const MachineBasicBlock &MBB) { - unsigned BundleCount = 0; - unsigned ByteCount = 0; - auto *TII = static_cast( - MBB.getParent()->getSubtarget().getInstrInfo()); - for (auto &MI : MBB) { - if (!MI.isBundle()) - continue; - - BundleCount++; - ByteCount += TII->getAIEMachineBundleSize(MI); - } - - if (BundleCount == 0) { - // encountered empty MBB, no need to dump Bundle info, this could be an - // empty back-edge - return; - } - - ORE->emit([&]() { - return MachineOptimizationRemarkAnalysis(DEBUG_TYPE, "analysis", - MBB.begin()->getDebugLoc(), &MBB) - << ore::NV("BasicBlock", MBB.getName()) - << ore::NV("BundleCount", BundleCount) - << ore::NV("ByteCount", ByteCount); - }); -} - -void AIE2AsmPrinter::emitBasicBlockStart(const MachineBasicBlock &MBB) { - emitBundleCount(MBB); - - AsmPrinter::emitBasicBlockStart(MBB); -} - -AsmPrinter * -llvm::createAIE2AsmPrinterPass(TargetMachine &TM, - std::unique_ptr &&Streamer) { - return new AIE2AsmPrinter(TM, std::move(Streamer)); -} diff --git a/llvm/lib/Target/AIE/AIE2AddrSpace.h b/llvm/lib/Target/AIE/AIE2CommonAddrSpace.h similarity index 83% rename from llvm/lib/Target/AIE/AIE2AddrSpace.h rename to llvm/lib/Target/AIE/AIE2CommonAddrSpace.h index 9dce4b540267..832cd913d9de 100644 --- a/llvm/lib/Target/AIE/AIE2AddrSpace.h +++ b/llvm/lib/Target/AIE/AIE2CommonAddrSpace.h @@ -1,26 +1,27 @@ -//===-- AIE2AddrSpace.h - Define Address Space for AIEngine V2 ---*- C++-*-===// +//===-- AIE2CommonAddrSpace.h - AIE2 Common Address Space -------*- C++-*-===// // // This file is licensed under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2024-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // -// This file declares the AIEngine V2 Address Space and DM banks +// This file declares the common Address Space and DM banks shared across +// AIE2 variants (AIE2, AIE2P, AIE2PS). // //===----------------------------------------------------------------------===// +#ifndef LLVM_SUPPORT_AIE2COMMONADDRSPACE_H +#define LLVM_SUPPORT_AIE2COMMONADDRSPACE_H + #include "AIEBaseAddrSpaceInfo.h" #include -#ifndef LLVM_SUPPORT_AIE2ADDRSPACE_H -#define LLVM_SUPPORT_AIE2ADDRSPACE_H - namespace llvm { -namespace AIE2 { +namespace AIE2X { enum class AddressSpaces { none, // Default address space @@ -43,14 +44,15 @@ enum class AddressSpaces { enum class AIEBanks { A, B, C, D, TileMemory }; -} // end namespace AIE2 +} // end namespace AIE2X -class AIE2AddrSpaceInfo final : public AIEBaseAddrSpaceInfo { +/// Common address space information shared across AIE2 variants +class AIE2CommonAddrSpaceInfo : public AIEBaseAddrSpaceInfo { public: MemoryBankBits getDefaultMemoryBank() const override { std::bitset<32> MemoryBanks; - using namespace AIE2; + using namespace AIE2X; MemoryBanks.set(static_cast(AIEBanks::A)) .set(static_cast(AIEBanks::B)) .set(static_cast(AIEBanks::C)) @@ -61,7 +63,7 @@ class AIE2AddrSpaceInfo final : public AIEBaseAddrSpaceInfo { MemoryBankBits getMemoryBanksFromAddressSpace(unsigned AddrSpace) const override { std::bitset<32> MemoryBanks; - using namespace AIE2; + using namespace AIE2X; switch (static_cast(AddrSpace)) { case AddressSpaces::a: MemoryBanks.set(static_cast(AIEBanks::A)); @@ -113,4 +115,4 @@ class AIE2AddrSpaceInfo final : public AIEBaseAddrSpaceInfo { } // end namespace llvm -#endif // LLVM_SUPPORT_AIE2ADDRSPACE_H +#endif // LLVM_SUPPORT_AIE2COMMONADDRSPACE_H diff --git a/llvm/lib/Target/AIE/AIE2CommonTargetMachine.cpp b/llvm/lib/Target/AIE/AIE2CommonTargetMachine.cpp new file mode 100644 index 000000000000..0d16e2575fc3 --- /dev/null +++ b/llvm/lib/Target/AIE/AIE2CommonTargetMachine.cpp @@ -0,0 +1,264 @@ +//===-- AIE2TargetMachine.cpp - Define TargetMachine for AIEngine V2 ------===// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates +// +//===----------------------------------------------------------------------===// +// +// Implements the info about AIEngine V2 target spec. +// +//===----------------------------------------------------------------------===// + +#include "AIE2CommonTargetMachine.h" +#include "AIEDumpArtifacts.h" +#include "AIEMachineFunctionInfo.h" +#include "aie2/AIE2TargetTransformInfo.h" +#include "llvm/CodeGen/GlobalISel/IRTranslator.h" +#include "llvm/CodeGen/GlobalISel/InstructionSelect.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" +#include "llvm/MC/TargetRegistry.h" + +using namespace llvm; + +cl::opt + EnableSubregRenaming("aie-subreg-renaming", cl::Hidden, cl::init(false), + cl::desc("Enable RenameIndependentSubregs pass")); + +static cl::opt + EnableReservedRegsLICM("aie-reserved-regs-licm", cl::Hidden, cl::init(true), + cl::desc("Enable LICM for some reserved registers")); + +static cl::opt StackAddrSpace( + "aie-stack-addrspace", cl::init(0), + cl::desc("Specify the addrspace where the stack is allocated " + "(5: Bank A, 6: Bank B, 7: Bank C, 8: Bank D)")); + +static cl::opt EnableOutlineMemoryGEP( + "enable-outline-memory-gep", cl::Hidden, cl::init(true), + cl::desc("Enable Outlining GEPs in Memory Instructions.")); + +static cl::opt EnableStackMinimization( + "aie-stack-minimize", cl::Hidden, cl::init(true), + cl::desc("Enable spill decomposition and stack slot minimization")); + +extern cl::opt EnableAddressChaining; +extern cl::opt EnableGlobalPtrModOptimizer; +extern cl::opt EnableStagedRA; +extern cl::opt EnableSuperRegSplitting; +extern cl::opt AllocateMRegsFirst; +extern cl::opt EnablePreMISchedCoalescer; +extern cl::opt EnableWAWRegRewrite; +extern cl::opt EnableAIEIfConversion; + +extern bool AIEDumpArtifacts; + +void AIE2TargetMachine::anchor() {} + +AIE2TargetMachine::AIE2TargetMachine(const Target &T, const Triple &TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + std::optional RM, + std::optional CM, + CodeGenOptLevel OL, bool JIT) + : AIEBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false), + Subtarget(TT, StringRef("aie2"), StringRef("aie2"), FS, + Options.MCOptions.getABIName(), *this) { + setGlobalISel(true); + setFastISel(false); + setGlobalISelAbort(GlobalISelAbortMode::Enable); +} + +TargetPassConfig *AIE2TargetMachine::createPassConfig(PassManagerBase &PM) { + return new AIE2PassConfig(*this, PM); +} + +bool AIE2PassConfig::addPreISel() { + if (TM->getOptLevel() != CodeGenOptLevel::None) + addPass(createHardwareLoopsLegacyPass()); + return false; +} + +void AIE2PassConfig::addPreEmitPass() {} + +void AIE2PassConfig::addPreLegalizeMachineIR() { + addPass(createAIEAddressSpaceFlattening()); + if (getOptLevel() != CodeGenOptLevel::None) + addPass(createAIE2PreLegalizerCombiner()); + addPass(createAIEEliminateDuplicatePHI()); +} + +void AIE2PassConfig::addPreRegBankSelect() { + if (getOptLevel() != CodeGenOptLevel::None) { + addPass(createAIE2PostLegalizerGenericCombiner()); + if (EnableAddressChaining) + addPass(createAIEClusterBaseAddress()); + if (EnableGlobalPtrModOptimizer) + addPass(createAIEPtrModOptimizer()); + addPass(createAIE2PostLegalizerCustomCombiner()); + } +} + +bool AIE2PassConfig::addGlobalInstructionSelect() { + addPass(new InstructionSelect(getOptLevel())); + if (getOptLevel() != CodeGenOptLevel::None) { + addPass( + createDeadMachineInstructionElim(/*KeepLifetimeInstructions=*/true)); + addPass(createAIEPostSelectOptimize()); + addPass( + createDeadMachineInstructionElim(/*KeepLifetimeInstructions=*/true)); + if (EnableReservedRegsLICM) { + /// Try and hoist assignments to reserved registers out of loops. + insertPass(&EarlyMachineLICMID, &ReservedRegsLICMID); + } + } + return false; +} + +void AIE2PassConfig::addPreRegAlloc() { + if (getOptLevel() >= CodeGenOptLevel::Default) { + // Perform software pipelining + addPass(&MachinePipelinerID); + // Remove unused debris afer SWP + addPass(&DeadMachineInstructionElimID); + } + insertPass(&PHIEliminationID, &AIESubRegConstrainerID); + if (AIEDumpArtifacts) { + addPass(createDumpModulePass(/*Suffix=*/"before-ra")); + addPass(createMachineFunctionDumperPass(/*Suffix=*/"before-ra")); + } +} + +void AIE2PassConfig::addISelPrepare() { + if (EnableOutlineMemoryGEP) + addPass(createAIEOutlineMemoryGEP()); + TargetPassConfig::addISelPrepare(); +} + +bool AIE2PassConfig::addILPOpts() { + if (EnableAIEIfConversion) + addPass(&EarlyIfConverterLegacyID); + return true; +} + +static bool onlyAllocate3DRegisters(const TargetRegisterInfo &TRI, + const MachineRegisterInfo &MRI, + const Register &R) { + return AIE2::eDSRegClass.hasSubClassEq(MRI.getRegClass(R)); +} +static bool onlyAllocate3D2DRegisters(const TargetRegisterInfo &TRI, + const MachineRegisterInfo &MRI, + const Register &R) { + return AIE2::eDSRegClass.hasSubClassEq(MRI.getRegClass(R)) || + AIE2::eDRegClass.hasSubClassEq(MRI.getRegClass(R)); +} +static bool onlyAllocateMRegisters(const TargetRegisterInfo &TRI, + const MachineRegisterInfo &MRI, + const Register &R) { + return AIE2::eMRegClass.hasSubClassEq(MRI.getRegClass(R)); +} + +bool AIE2PassConfig::addRegAssignAndRewriteOptimized() { + + // Pre-RA scheduling might have exposed simplifiable copies. + if (EnablePreMISchedCoalescer) + addPass(&RegisterCoalescerID); + + if (!EnableStagedRA && !EnableSuperRegSplitting) + return TargetPassConfig::addRegAssignAndRewriteOptimized(); + + // Rewrite instructions which use large tuple regs into _split variants + // to better expose sub-registers and facilitate RA. + if (EnableSuperRegSplitting) + addPass(createAIESplitInstrBuilder()); + + addPass(createAIERegClassConstrainer()); + + if (AllocateMRegsFirst) + addPass(createGreedyRegisterAllocator(onlyAllocateMRegisters)); + if (EnableStagedRA) { + addPass(createGreedyRegisterAllocator(onlyAllocate3DRegisters)); + addPass(createAIESuperRegRewriter()); + addPass(createGreedyRegisterAllocator(onlyAllocate3D2DRegisters)); + addPass(createAIESuperRegRewriter()); + } + addPass(createGreedyRegisterAllocator()); + if (EnableWAWRegRewrite) { + addPass(createAIEWawRegRewriter()); + addPass(createGreedyRegisterAllocator()); + } + addPass(createVirtRegRewriter()); + + return true; +} + +void AIE2PassConfig::addPostRewrite() { + if (EnableStackMinimization) { + // Decompose composite spills into subreg spills when only some subregs + // are live, and minimize stack slot sizes based on actual usage patterns. + addPass(createAIESpillSlotOptimization()); + } + + if (getOptLevel() != CodeGenOptLevel::None && EnableSuperRegSplitting) { + // Rewrite _split instructions which were used to facilitate RA. + // Now we want the real "target" instructions with encoding and scheduling + // information. + addPass(createAIESplitInstrReplacer()); + } +} + +void AIE2PassConfig::addMachineLateOptimization() { + TargetPassConfig::addMachineLateOptimization(); + // Run MachineCopyPropagation again, but take into account + // architecture-specific mov operations using isMoveReg (see isCopyInstrImpl + // hook) + addPass(createMachineCopyPropagationPass(true)); +} + +void AIE2PassConfig::addPreSched2() { + // Remove dead code after PostRA Pseudo Instruction Expansion Pass. + addPass(&DeadMachineInstructionElimID); + if (getOptLevel() != CodeGenOptLevel::None) + addPass(&MachineBlockPlacementID); + + if (TM->getOptLevel() != CodeGenOptLevel::None) + addPass(createAIEBaseHardwareLoopsPass()); + + addPass(createAIEPseudoBranchExpansion()); + if (AIEDumpArtifacts) + addPass(createMachineFunctionDumperPass(/*Suffix=*/"before-post-ra-sched")); + // PostRAScheduler is required to insert NoOps for correctness. + // We always run it, independently of the Opt level. + addPass(&PostMachineSchedulerID); + // After scheduling, create the bundles from the BundleWithPred flags + addPass(createAIEFinalizeBundle()); + addPass(createAIEMachineAlignment()); + if (AIEDumpArtifacts) + addPass(createMachineFunctionDumperPass(/*Suffix=*/"after-post-ra-sched")); +} + +void AIE2PassConfig::addBlockPlacement() { + // Block placement is done pre-scheduling. + return; +} + +TargetTransformInfo +AIE2TargetMachine::getTargetTransformInfo(const Function &F) const { + return TargetTransformInfo(AIE2TTIImpl(this, F)); +} + +unsigned +AIE2TargetMachine::getAddressSpaceForPseudoSourceKind(unsigned Kind) const { + switch (Kind) { + case PseudoSourceValue::Stack: + case PseudoSourceValue::FixedStack: + return StackAddrSpace; + case AIETargetPSV::AIETileMem: + return static_cast(AIE2X::AddressSpaces::TM); + default: + return static_cast(AIE2X::AddressSpaces::none); + } +} diff --git a/llvm/lib/Target/AIE/AIE2TargetMachine.h b/llvm/lib/Target/AIE/AIE2CommonTargetMachine.h similarity index 90% rename from llvm/lib/Target/AIE/AIE2TargetMachine.h rename to llvm/lib/Target/AIE/AIE2CommonTargetMachine.h index cfaa5c6cbfb7..069934d1951a 100644 --- a/llvm/lib/Target/AIE/AIE2TargetMachine.h +++ b/llvm/lib/Target/AIE/AIE2CommonTargetMachine.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -12,12 +12,13 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_LIB_TARGET_AIE_AIE2TARGETMACHINE_H -#define LLVM_LIB_TARGET_AIE_AIE2TARGETMACHINE_H +#ifndef LLVM_LIB_TARGET_AIE_AIE2COMMONTARGETMACHINE_H +#define LLVM_LIB_TARGET_AIE_AIE2COMMONTARGETMACHINE_H -#include "AIE2Subtarget.h" +// FIXME: Subtarget is being reorganized in a separate project #include "AIEBaseTargetMachine.h" #include "MCTargetDesc/AIE2MCTargetDesc.h" +#include "aie2/AIE2Subtarget.h" extern llvm::cl::opt EnableSubregRenaming; namespace llvm { diff --git a/llvm/lib/Target/AIE/AIEAsmPrinterInit.cpp b/llvm/lib/Target/AIE/AIEAsmPrinterInit.cpp new file mode 100644 index 000000000000..a21d4431e3de --- /dev/null +++ b/llvm/lib/Target/AIE/AIEAsmPrinterInit.cpp @@ -0,0 +1,33 @@ +//===-- AIEAsmPrinterInit.cpp - AIE AsmPrinter Registration ---------------===// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates +// +//===----------------------------------------------------------------------===// +// +// This file registers AsmPrinters for all AIE targets. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/Compiler.h" + +namespace llvm { +// Forward declarations of registration functions defined in target-specific +// files +void RegisterAIE1AsmPrinter(); +void RegisterAIE2AsmPrinter(); +void RegisterAIE2PAsmPrinter(); +void RegisterAIE2PSAsmPrinter(); +} // namespace llvm + +// Force static initialization for all AIE targets. +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAIEAsmPrinter() { + // Each target provides its own registration function + llvm::RegisterAIE1AsmPrinter(); + llvm::RegisterAIE2AsmPrinter(); + llvm::RegisterAIE2PAsmPrinter(); + llvm::RegisterAIE2PSAsmPrinter(); +} diff --git a/llvm/lib/Target/AIE/AIEBaseAsmPrinter.cpp b/llvm/lib/Target/AIE/AIEBaseAsmPrinter.cpp index bf5aed1b46ed..5806d4f6895a 100644 --- a/llvm/lib/Target/AIE/AIEBaseAsmPrinter.cpp +++ b/llvm/lib/Target/AIE/AIEBaseAsmPrinter.cpp @@ -17,6 +17,7 @@ #include "AIEBundle.h" #include "InstPrinter/AIEInstPrinter.h" #include "llvm/Analysis/MemoryLocation.h" +#include "llvm/Analysis/OptimizationRemarkEmitter.h" #include "llvm/BinaryFormat/ELF.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineConstantPool.h" @@ -24,6 +25,7 @@ #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineJumpTableInfo.h" #include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCSectionELF.h" @@ -35,7 +37,11 @@ #include "llvm/Target/TargetLoweringObjectFile.h" using namespace llvm; -#define DEBUG_TYPE "asm-printer" +#define DEBUG_TYPE "aie-asm-printer" + +AIEBaseAsmPrinter::AIEBaseAsmPrinter(TargetMachine &TM, + std::unique_ptr Streamer) + : AsmPrinter(TM, std::move(Streamer)), MCRI(TM.getMCRegisterInfo()) {} void AIEBaseAsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) { // This searches for SymbolRefs in sub-instruction operands to register them @@ -311,3 +317,76 @@ void AIEBaseAsmPrinter::emitXXStructorList(const DataLayout &DL, emitXXStructor(DL, S.Func); } } + +bool AIEBaseAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, + const char *ExtraCode, + raw_ostream &OS) { + // First try the generic code, which knows about modifiers like 'c' and 'n'. + if (!AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS)) + return false; + + const MachineOperand &MO = MI->getOperand(OpNo); + switch (MO.getType()) { + case MachineOperand::MO_Immediate: + OS << MO.getImm(); + return false; + case MachineOperand::MO_Register: + OS << MCRI->getName(MO.getReg()); + return false; + default: + break; + } + + return true; +} + +bool AIEBaseAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, + unsigned OpNo, + const char *ExtraCode, + raw_ostream &OS) { + if (!ExtraCode) { + const MachineOperand &MO = MI->getOperand(OpNo); + // For now, we only support register memory operands in registers and + // assume there is no addend + if (!MO.isReg()) + return true; + + OS << "0(" << MCRI->getName(MO.getReg()) << ")"; + return false; + } + + return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, ExtraCode, OS); +} + +void AIEBaseAsmPrinter::emitBundleCount(const MachineBasicBlock &MBB) { + unsigned BundleCount = 0; + unsigned ByteCount = 0; + auto *TII = static_cast( + MBB.getParent()->getSubtarget().getInstrInfo()); + for (auto &MI : MBB) { + if (!MI.isBundle()) + continue; + + BundleCount++; + ByteCount += TII->getAIEMachineBundleSize(MI); + } + + if (BundleCount == 0) { + // encountered empty MBB, no need to dump Bundle info, this could be an + // empty back-edge + return; + } + + ORE->emit([&]() { + return MachineOptimizationRemarkAnalysis(DEBUG_TYPE, "analysis", + MBB.begin()->getDebugLoc(), &MBB) + << ore::NV("BasicBlock", MBB.getName()) + << ore::NV("BundleCount", BundleCount) + << ore::NV("ByteCount", ByteCount); + }); +} + +void AIEBaseAsmPrinter::emitBasicBlockStart(const MachineBasicBlock &MBB) { + emitBundleCount(MBB); + AsmPrinter::emitBasicBlockStart(MBB); +} diff --git a/llvm/lib/Target/AIE/AIEBaseAsmPrinter.h b/llvm/lib/Target/AIE/AIEBaseAsmPrinter.h index 04c4ceb249fd..1defd863ef20 100644 --- a/llvm/lib/Target/AIE/AIEBaseAsmPrinter.h +++ b/llvm/lib/Target/AIE/AIEBaseAsmPrinter.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -26,10 +26,11 @@ class MachineInstr; class MCStreamer; class AIEBaseAsmPrinter : public AsmPrinter { + const MCRegisterInfo *MCRI = nullptr; + public: explicit AIEBaseAsmPrinter(TargetMachine &TM, - std::unique_ptr Streamer) - : AsmPrinter(TM, std::move(Streamer)) {} + std::unique_ptr Streamer); /// Called before any MBB is processed. void emitFunctionBodyStart() override; @@ -42,9 +43,21 @@ class AIEBaseAsmPrinter : public AsmPrinter { void EmitToStreamer(MCStreamer &S, const MCInst &Inst); virtual bool lowerPseudoInstExpansion(const MachineInstr *MI, MCInst &Inst) = 0; + + bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, + const char *ExtraCode, raw_ostream &OS) override; + bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, + const char *ExtraCode, raw_ostream &OS) override; + + void emitBasicBlockStart(const MachineBasicBlock &MBB) override; + void emitXXStructorList(const DataLayout &DL, const Constant *List, bool IsCtor) override; +protected: + // Dump Bundle Count to Optimization Remarks (for AIE2+ targets) + virtual void emitBundleCount(const MachineBasicBlock &MBB); + private: // Count delay slots after an instruction with a delay slot int DelaySlotCounter = 0; diff --git a/llvm/lib/Target/AIE/AIEBaseHardwareLoops.cpp b/llvm/lib/Target/AIE/AIEBaseHardwareLoops.cpp index bef86292a7a0..acdda241d9ad 100644 --- a/llvm/lib/Target/AIE/AIEBaseHardwareLoops.cpp +++ b/llvm/lib/Target/AIE/AIEBaseHardwareLoops.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -23,10 +23,8 @@ // //===----------------------------------------------------------------------===// -#include "AIE2InstrInfo.h" #include "AIEBaseInstrInfo.h" #include "AIEBaseSubtarget.h" -#include "MCTargetDesc/AIE2MCTargetDesc.h" #include "llvm/Analysis/OptimizationRemarkEmitter.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" diff --git a/llvm/lib/Target/AIE/AIEBaseSubtarget.cpp b/llvm/lib/Target/AIE/AIEBaseSubtarget.cpp index ab92eabd5676..aaf13d3ab7c1 100644 --- a/llvm/lib/Target/AIE/AIEBaseSubtarget.cpp +++ b/llvm/lib/Target/AIE/AIEBaseSubtarget.cpp @@ -21,6 +21,7 @@ #include "AIERegMemEventTracker.h" #include "Utils/AIELoopUtils.h" #include "aie1/AIE1Subtarget.h" +#include "aie2/AIE2Subtarget.h" #include "aie2p/AIE2PSubtarget.h" #include "aie2ps/AIE2PSSubtarget.h" #include "llvm/CodeGen/MachineInstr.h" diff --git a/llvm/lib/Target/AIE/AIEBaseSubtarget.h b/llvm/lib/Target/AIE/AIEBaseSubtarget.h index 5808ce6c59b9..413ec8faa5e6 100644 --- a/llvm/lib/Target/AIE/AIEBaseSubtarget.h +++ b/llvm/lib/Target/AIE/AIEBaseSubtarget.h @@ -49,6 +49,16 @@ class AIEBaseSubtarget { virtual const AIEBaseInstrInfo *getInstrInfo() const = 0; virtual const AIEBaseAddrSpaceInfo &getAddrSpaceInfo() const = 0; AIEABI::ABI getTargetABI() const { return TargetABI; } + + /// Find the target operand flags that describe how a global value should be + /// referenced for the current subtarget. + unsigned classifyGlobalReference(const GlobalValue *GV, + const TargetMachine &TM) const { + if (!TM.shouldAssumeDSOLocal(GV)) { + return AIEII::MO_GLOBAL; + } + return AIEII::MO_None; + } bool isAIE1() const { return (TargetTriple.isAIE1()); } bool isAIE2() const { return (TargetTriple.isAIE2()); } bool isAIE2P() const { return (TargetTriple.isAIE2P()); } diff --git a/llvm/lib/Target/AIE/AIEBaseTargetMachine.cpp b/llvm/lib/Target/AIE/AIEBaseTargetMachine.cpp index c68c949df8e8..a4087c85a191 100644 --- a/llvm/lib/Target/AIE/AIEBaseTargetMachine.cpp +++ b/llvm/lib/Target/AIE/AIEBaseTargetMachine.cpp @@ -15,13 +15,13 @@ #include "AIEBaseTargetMachine.h" #include "AIE.h" -#include "AIE2TargetMachine.h" #include "AIEBaseAliasAnalysis.h" #include "AIEMachineFunctionInfo.h" #include "AIEMachineScheduler.h" #include "AIETargetObjectFile.h" #include "TargetInfo/AIETargetInfo.h" #include "aie1/AIE1TargetMachine.h" +#include "aie2/AIE2TargetMachine.h" #include "aie2p/AIE2PTargetMachine.h" #include "aie2ps/AIE2PSTargetMachine.h" #include "llvm/ADT/STLExtras.h" diff --git a/llvm/lib/Target/AIE/AIECombinerHelper.cpp b/llvm/lib/Target/AIE/AIECombinerHelper.cpp index 7d502dd24e1a..bba595b05133 100644 --- a/llvm/lib/Target/AIE/AIECombinerHelper.cpp +++ b/llvm/lib/Target/AIE/AIECombinerHelper.cpp @@ -10,9 +10,9 @@ #include "AIECombinerHelper.h" #include "AIE.h" -#include "AIE2TargetMachine.h" #include "AIEBaseInstrInfo.h" -#include "MCTargetDesc/AIE2MCTargetDesc.h" +#include "AIEBaseSubtarget.h" +#include "Utils/AIEBaseInfo.h" #include "llvm/ADT/SetVector.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/Analysis/VectorUtils.h" @@ -1147,8 +1147,8 @@ bool llvm::matchGlobalValOffset(MachineInstr &MI, MachineRegisterInfo &MRI, // transform %g = G_GLOBAL_VALUE @a, for any other case return false if (GlobalOp.getOffset() != 0) return false; - unsigned OpFlags = MF.getSubtarget().classifyGlobalReference( - GV, MF.getTarget()); + unsigned OpFlags = + AIEBaseSubtarget::get(MF).classifyGlobalReference(GV, MF.getTarget()); if (OpFlags != AIEII::MO_None) return false; diff --git a/llvm/lib/Target/AIE/AsmParser/AIE2AsmParser.cpp b/llvm/lib/Target/AIE/AsmParser/AIE2AsmParser.cpp index f9f3e90c6e1f..cfcf01b29508 100644 --- a/llvm/lib/Target/AIE/AsmParser/AIE2AsmParser.cpp +++ b/llvm/lib/Target/AIE/AsmParser/AIE2AsmParser.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// @@ -13,14 +13,14 @@ #include "llvm/MC/MCParser/MCAsmLexer.h" #include "llvm/MC/MCParser/MCAsmParser.h" -#include "AIE2.h" -#include "AIE2InstrInfo.h" -#include "AIE2RegisterInfo.h" #include "AIEBaseOperand.h" #include "AIEBundle.h" #include "MCTargetDesc/AIE2MCTargetDesc.h" #include "MCTargetDesc/AIEMCExpr.h" #include "TargetInfo/AIETargetInfo.h" +#include "aie2/AIE2.h" +#include "aie2/AIE2InstrInfo.h" +#include "aie2/AIE2RegisterInfo.h" #include "llvm/MC/MCParser/MCTargetAsmParser.h" #include "llvm/MC/MCRegister.h" #include "llvm/MC/MCStreamer.h" diff --git a/llvm/lib/Target/AIE/CMakeLists.txt b/llvm/lib/Target/AIE/CMakeLists.txt index 6c7e6b42cb6b..db6f49d8044d 100644 --- a/llvm/lib/Target/AIE/CMakeLists.txt +++ b/llvm/lib/Target/AIE/CMakeLists.txt @@ -99,6 +99,8 @@ tablegen(LLVM AIE2PSGenAsmMatcher.inc -gen-asm-matcher) add_public_tablegen_target(AIECommonTableGen) add_llvm_target(AIECodeGen + AIE2CommonTargetMachine.cpp + AIEAsmPrinterInit.cpp AIEAddressSpaceFlattening.cpp AIEBaseAliasAnalysis.cpp AIEBaseAsmPrinter.cpp @@ -151,20 +153,6 @@ add_llvm_target(AIECodeGen AIESuperRegRewriter.cpp AIESuperRegUtils.cpp AIETargetObjectFile.cpp - AIE2AsmPrinter.cpp - AIE2FrameLowering.cpp - AIE2InstrInfo.cpp - AIE2InstructionSelector.cpp - AIE2ISelLowering.cpp - AIE2LegalizerInfo.cpp - AIE2PostLegalizerCustomCombiner.cpp - AIE2PostLegalizerGenericCombiner.cpp - AIE2PreLegalizerCombiner.cpp - AIE2RegisterBankInfo.cpp - AIE2RegisterInfo.cpp - AIE2Subtarget.cpp - AIE2TargetMachine.cpp - AIE2TargetTransformInfo.cpp AIETiedRegOperands.cpp AIEUnallocatedSuperRegRewriter.cpp ReservedRegsLICM.cpp @@ -185,6 +173,21 @@ add_llvm_target(AIECodeGen aie1/AIE1RegisterInfo.cpp aie1/AIE1Subtarget.cpp aie1/AIE1TargetMachine.cpp + # aie2 + aie2/AIE2AsmPrinter.cpp + aie2/AIE2FrameLowering.cpp + aie2/AIE2InstrInfo.cpp + aie2/AIE2InstructionSelector.cpp + aie2/AIE2ISelLowering.cpp + aie2/AIE2LegalizerInfo.cpp + aie2/AIE2PostLegalizerCustomCombiner.cpp + aie2/AIE2PostLegalizerGenericCombiner.cpp + aie2/AIE2PreLegalizerCombiner.cpp + aie2/AIE2RegisterBankInfo.cpp + aie2/AIE2RegisterInfo.cpp + aie2/AIE2Subtarget.cpp + aie2/AIE2TargetMachine.cpp + aie2/AIE2TargetTransformInfo.cpp # aie2p aie2p/AIE2PSubtarget.cpp aie2p/AIE2PTargetMachine.cpp diff --git a/llvm/lib/Target/AIE/Disassembler/AIE2Disassembler.cpp b/llvm/lib/Target/AIE/Disassembler/AIE2Disassembler.cpp index 89337739dfd5..efe04514f75c 100644 --- a/llvm/lib/Target/AIE/Disassembler/AIE2Disassembler.cpp +++ b/llvm/lib/Target/AIE/Disassembler/AIE2Disassembler.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -12,10 +12,10 @@ // //===----------------------------------------------------------------------===// -#include "AIE2RegisterInfo.h" #include "AIEBaseDisassembler.h" #include "AIEDisassemblerPP.h" #include "MCTargetDesc/AIE2MCTargetDesc.h" +#include "aie2/AIE2RegisterInfo.h" #include "llvm/MC/MCDecoderOps.h" #include "llvm/MC/MCDisassembler/MCDisassembler.h" #include "llvm/MC/MCInst.h" diff --git a/llvm/lib/Target/AIE/InstPrinter/AIE2InstPrinter.cpp b/llvm/lib/Target/AIE/InstPrinter/AIE2InstPrinter.cpp index b60a4ae63a35..385927030b4c 100644 --- a/llvm/lib/Target/AIE/InstPrinter/AIE2InstPrinter.cpp +++ b/llvm/lib/Target/AIE/InstPrinter/AIE2InstPrinter.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -13,9 +13,9 @@ //===----------------------------------------------------------------------===// #include "AIE2InstPrinter.h" -#include "AIE2InstrInfo.h" #include "AIEInstPrinter.h" #include "Utils/AIEBaseInfo.h" +#include "aie2/AIE2InstrInfo.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCInst.h" diff --git a/llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.cpp b/llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.cpp index 7d1391f9cd6d..4d947ba8c34f 100644 --- a/llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.cpp +++ b/llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.cpp @@ -13,9 +13,9 @@ // //===----------------------------------------------------------------------===// +#include "AIE1AsmPrinter.h" #include "AIE.h" #include "AIE1TargetMachine.h" -#include "AIE2AsmPrinter.h" #include "AIEBaseAsmPrinter.h" #include "InstPrinter/AIEInstPrinter.h" #include "llvm/CodeGen/AsmPrinter.h" @@ -43,11 +43,6 @@ class AIEAsmPrinter : public AIEBaseAsmPrinter { StringRef getPassName() const override { return "AIE Assembly Printer"; } - bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, - const char *ExtraCode, raw_ostream &OS) override; - bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, - const char *ExtraCode, raw_ostream &OS) override; - bool lowerPseudoInstExpansion(const MachineInstr *MI, MCInst &Inst) override; // Wrapper needed for tblgenned pseudo lowering. @@ -61,49 +56,7 @@ class AIEAsmPrinter : public AIEBaseAsmPrinter { // instructions) auto-generated. #include "AIEGenMCPseudoLowering.inc" -bool AIEAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, - const char *ExtraCode, raw_ostream &OS) { - // First try the generic code, which knows about modifiers like 'c' and 'n'. - if (!AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS)) - return false; - - const MachineOperand &MO = MI->getOperand(OpNo); - switch (MO.getType()) { - case MachineOperand::MO_Immediate: - OS << MO.getImm(); - return false; - case MachineOperand::MO_Register: - OS << AIEInstPrinter::getRegisterName(MO.getReg()); - return false; - default: - break; - } - - return true; -} - -bool AIEAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, - const char *ExtraCode, - raw_ostream &OS) { - if (!ExtraCode) { - const MachineOperand &MO = MI->getOperand(OpNo); - // For now, we only support register memory operands in registers and - // assume there is no addend - if (!MO.isReg()) - return true; - - OS << "0(" << AIEInstPrinter::getRegisterName(MO.getReg()) << ")"; - return false; - } - - return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, ExtraCode, OS); -} - -// Force static initialization. -extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAIEAsmPrinter() { +// Registration function called from AIEAsmPrinterInit.cpp +void llvm::RegisterAIE1AsmPrinter() { RegisterAsmPrinter X(getTheAIETarget()); - RegisterAsmPrinter Y(getTheAIE2Target()); - // FIXME using AIE2AsmPrinter for AIE2P and AIE2PS target - RegisterAsmPrinter A(getTheAIE2PTarget()); - RegisterAsmPrinter B(getTheAIE2PSTarget()); } diff --git a/llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.h b/llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.h new file mode 100644 index 000000000000..c74c2c991fb9 --- /dev/null +++ b/llvm/lib/Target/AIE/aie1/AIE1AsmPrinter.h @@ -0,0 +1,19 @@ +//===-- AIE1AsmPrinter.h - AIE1 AsmPrinter Registration ----------*- C++ +//-*-===// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AIE_AIE1_AIE1ASMPRINTER_H +#define LLVM_LIB_TARGET_AIE_AIE1_AIE1ASMPRINTER_H + +namespace llvm { +void RegisterAIE1AsmPrinter(); +} + +#endif // LLVM_LIB_TARGET_AIE_AIE1_AIE1ASMPRINTER_H diff --git a/llvm/lib/Target/AIE/AIE2.h b/llvm/lib/Target/AIE/aie2/AIE2.h similarity index 96% rename from llvm/lib/Target/AIE/AIE2.h rename to llvm/lib/Target/AIE/aie2/AIE2.h index 2dfc00b04157..cfad5b5a5285 100644 --- a/llvm/lib/Target/AIE/AIE2.h +++ b/llvm/lib/Target/AIE/aie2/AIE2.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/aie2/AIE2AsmPrinter.cpp b/llvm/lib/Target/AIE/aie2/AIE2AsmPrinter.cpp new file mode 100644 index 000000000000..aad9edf5f17f --- /dev/null +++ b/llvm/lib/Target/AIE/aie2/AIE2AsmPrinter.cpp @@ -0,0 +1,53 @@ +//===-- AIE2AsmPrinter.cpp - AIEngine V2 LLVM assembly writer ------------===// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates +// +//===----------------------------------------------------------------------===// +// +// This file contains a printer that converts from our internal representation +// of machine-dependent LLVM code to the AIEngine V2 assembly language. +// +//===----------------------------------------------------------------------===// + +#include "AIE2AsmPrinter.h" +#include "AIE2TargetMachine.h" +#include "llvm/CodeGen/AsmPrinter.h" +#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/TargetRegistry.h" + +using namespace llvm; + +#define DEBUG_TYPE "aie-asm-printer" + +// Simple pseudo-instructions have their lowering (with expansion to real +// instructions) auto-generated. +#include "AIE2GenMCPseudoLowering.inc" + +bool AIE2AsmPrinter::lowerOperand(const MachineOperand &MO, + MCOperand &MCOp) const { + return LowerAIEMachineOperandToMCOperand(MO, MCOp, *this); +} + +AsmPrinter * +llvm::createAIE2AsmPrinterPass(TargetMachine &TM, + std::unique_ptr &&Streamer) { + return new AIE2AsmPrinter(TM, std::move(Streamer)); +} + +// Registration functions called from AIEAsmPrinterInit.cpp +void llvm::RegisterAIE2AsmPrinter() { + RegisterAsmPrinter Y(getTheAIE2Target()); +} + +void llvm::RegisterAIE2PAsmPrinter() { + RegisterAsmPrinter A(getTheAIE2PTarget()); +} + +void llvm::RegisterAIE2PSAsmPrinter() { + RegisterAsmPrinter B(getTheAIE2PSTarget()); +} diff --git a/llvm/lib/Target/AIE/AIE2AsmPrinter.h b/llvm/lib/Target/AIE/aie2/AIE2AsmPrinter.h similarity index 74% rename from llvm/lib/Target/AIE/AIE2AsmPrinter.h rename to llvm/lib/Target/AIE/aie2/AIE2AsmPrinter.h index 51398577760f..2a8ccf08821e 100644 --- a/llvm/lib/Target/AIE/AIE2AsmPrinter.h +++ b/llvm/lib/Target/AIE/aie2/AIE2AsmPrinter.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -21,9 +21,6 @@ namespace llvm { class AIE2AsmPrinter : public AIEBaseAsmPrinter { - // Dump Bundle Count to Optimization Remarks - void emitBundleCount(const MachineBasicBlock &MBB); - public: explicit AIE2AsmPrinter(TargetMachine &TM, std::unique_ptr Streamer) @@ -31,21 +28,19 @@ class AIE2AsmPrinter : public AIEBaseAsmPrinter { StringRef getPassName() const override { return "AIE2 Assembly Printer"; } - bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, - const char *ExtraCode, raw_ostream &OS) override; - bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, - const char *ExtraCode, raw_ostream &OS) override; - bool lowerPseudoInstExpansion(const MachineInstr *MI, MCInst &Inst) override; // Wrapper needed for tblgenned pseudo lowering. bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const; - - void emitBasicBlockStart(const MachineBasicBlock &MBB) override; }; AsmPrinter *createAIE2AsmPrinterPass(TargetMachine &TM, std::unique_ptr &&Streamer); + +void RegisterAIE2AsmPrinter(); +void RegisterAIE2PAsmPrinter(); +void RegisterAIE2PSAsmPrinter(); + } // namespace llvm #endif // #define LLVM_LIB_TARGET_AIE2_AIE2ASMPRINTER_H diff --git a/llvm/lib/Target/AIE/AIE2FrameLowering.cpp b/llvm/lib/Target/AIE/aie2/AIE2FrameLowering.cpp similarity index 98% rename from llvm/lib/Target/AIE/AIE2FrameLowering.cpp rename to llvm/lib/Target/AIE/aie2/AIE2FrameLowering.cpp index 65ec21a3374d..a4eab8216561 100644 --- a/llvm/lib/Target/AIE/AIE2FrameLowering.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2FrameLowering.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2FrameLowering.h b/llvm/lib/Target/AIE/aie2/AIE2FrameLowering.h similarity index 96% rename from llvm/lib/Target/AIE/AIE2FrameLowering.h rename to llvm/lib/Target/AIE/aie2/AIE2FrameLowering.h index 86b85ce97c1f..a4bd965773c3 100644 --- a/llvm/lib/Target/AIE/AIE2FrameLowering.h +++ b/llvm/lib/Target/AIE/aie2/AIE2FrameLowering.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2ISelLowering.cpp b/llvm/lib/Target/AIE/aie2/AIE2ISelLowering.cpp similarity index 98% rename from llvm/lib/Target/AIE/AIE2ISelLowering.cpp rename to llvm/lib/Target/AIE/aie2/AIE2ISelLowering.cpp index 9293b669b2ca..b6a9499b3e8d 100644 --- a/llvm/lib/Target/AIE/AIE2ISelLowering.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2ISelLowering.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2ISelLowering.h b/llvm/lib/Target/AIE/aie2/AIE2ISelLowering.h similarity index 96% rename from llvm/lib/Target/AIE/AIE2ISelLowering.h rename to llvm/lib/Target/AIE/aie2/AIE2ISelLowering.h index 3cc416b12d91..70ccb3538a54 100644 --- a/llvm/lib/Target/AIE/AIE2ISelLowering.h +++ b/llvm/lib/Target/AIE/aie2/AIE2ISelLowering.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2InstrInfo.cpp b/llvm/lib/Target/AIE/aie2/AIE2InstrInfo.cpp similarity index 100% rename from llvm/lib/Target/AIE/AIE2InstrInfo.cpp rename to llvm/lib/Target/AIE/aie2/AIE2InstrInfo.cpp diff --git a/llvm/lib/Target/AIE/AIE2InstrInfo.h b/llvm/lib/Target/AIE/aie2/AIE2InstrInfo.h similarity index 100% rename from llvm/lib/Target/AIE/AIE2InstrInfo.h rename to llvm/lib/Target/AIE/aie2/AIE2InstrInfo.h diff --git a/llvm/lib/Target/AIE/AIE2InstructionSelector.cpp b/llvm/lib/Target/AIE/aie2/AIE2InstructionSelector.cpp similarity index 100% rename from llvm/lib/Target/AIE/AIE2InstructionSelector.cpp rename to llvm/lib/Target/AIE/aie2/AIE2InstructionSelector.cpp diff --git a/llvm/lib/Target/AIE/AIE2LegalizerInfo.cpp b/llvm/lib/Target/AIE/aie2/AIE2LegalizerInfo.cpp similarity index 99% rename from llvm/lib/Target/AIE/AIE2LegalizerInfo.cpp rename to llvm/lib/Target/AIE/aie2/AIE2LegalizerInfo.cpp index 1e76a4f497a7..610a19947fa2 100644 --- a/llvm/lib/Target/AIE/AIE2LegalizerInfo.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2LegalizerInfo.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// /// \file diff --git a/llvm/lib/Target/AIE/AIE2LegalizerInfo.h b/llvm/lib/Target/AIE/aie2/AIE2LegalizerInfo.h similarity index 95% rename from llvm/lib/Target/AIE/AIE2LegalizerInfo.h rename to llvm/lib/Target/AIE/aie2/AIE2LegalizerInfo.h index 25688470e0f2..839c99b37dcf 100644 --- a/llvm/lib/Target/AIE/AIE2LegalizerInfo.h +++ b/llvm/lib/Target/AIE/aie2/AIE2LegalizerInfo.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// /// \file diff --git a/llvm/lib/Target/AIE/AIE2PostLegalizerCustomCombiner.cpp b/llvm/lib/Target/AIE/aie2/AIE2PostLegalizerCustomCombiner.cpp similarity index 97% rename from llvm/lib/Target/AIE/AIE2PostLegalizerCustomCombiner.cpp rename to llvm/lib/Target/AIE/aie2/AIE2PostLegalizerCustomCombiner.cpp index 1b1e0dbb6ed1..8ae86e4da767 100644 --- a/llvm/lib/Target/AIE/AIE2PostLegalizerCustomCombiner.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2PostLegalizerCustomCombiner.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -154,7 +154,8 @@ bool AIE2PostLegalizerCustomCombiner::runOnMachineFunction( const auto *LI = ST.getLegalizerInfo(); GISelKnownBits *KB = &getAnalysis().get(MF); - MachineDominatorTree *MDT = &getAnalysis().getDomTree(); + MachineDominatorTree *MDT = + &getAnalysis().getDomTree(); AIE::FoundCombiners *AIEGlobalPtrIncResults = nullptr; if (auto *PtrModOptPass = getAnalysisIfAvailable()) diff --git a/llvm/lib/Target/AIE/AIE2PostLegalizerGenericCombiner.cpp b/llvm/lib/Target/AIE/aie2/AIE2PostLegalizerGenericCombiner.cpp similarity index 95% rename from llvm/lib/Target/AIE/AIE2PostLegalizerGenericCombiner.cpp rename to llvm/lib/Target/AIE/aie2/AIE2PostLegalizerGenericCombiner.cpp index 047eb23bee3f..0e6d7dc9b338 100644 --- a/llvm/lib/Target/AIE/AIE2PostLegalizerGenericCombiner.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2PostLegalizerGenericCombiner.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -74,8 +74,7 @@ AIE2PostLegalizerGenericCombinerImpl::AIE2PostLegalizerGenericCombinerImpl( MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC, GISelKnownBits &KB, GISelCSEInfo *CSEInfo, const AIE2PostLegalizerGenericCombinerImplRuleConfig &RuleConfig, - const AIE2Subtarget &STI, - MachineDominatorTree *MDT, + const AIE2Subtarget &STI, MachineDominatorTree *MDT, const LegalizerInfo *LI) : Combiner(MF, CInfo, TPC, &KB, CSEInfo), Helper(Observer, B, /*IsPostLegalize*/ false, &KB, MDT, LI), @@ -86,7 +85,6 @@ AIE2PostLegalizerGenericCombinerImpl::AIE2PostLegalizerGenericCombinerImpl( { } - class AIE2PostLegalizerGenericCombiner : public MachineFunctionPass { public: static char ID; @@ -116,7 +114,6 @@ class AIE2PostLegalizerGenericCombiner : public MachineFunctionPass { }; } // end anonymous namespace - AIE2PostLegalizerGenericCombiner::AIE2PostLegalizerGenericCombiner() : MachineFunctionPass(ID) { initializeAIE2PostLegalizerGenericCombinerPass( @@ -145,13 +142,14 @@ bool AIE2PostLegalizerGenericCombiner::runOnMachineFunction( const auto *LI = ST.getLegalizerInfo(); GISelKnownBits *KB = &getAnalysis().get(MF); - MachineDominatorTree *MDT = &getAnalysis().getDomTree(); + MachineDominatorTree *MDT = + &getAnalysis().getDomTree(); CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false, /*LegalizerInfo*/ nullptr, EnableOpt, F.hasOptSize(), F.hasMinSize()); AIE2PostLegalizerGenericCombinerImpl Impl(MF, CInfo, TPC, *KB, CSEInfo, - RuleConfig, ST, MDT, LI); + RuleConfig, ST, MDT, LI); return Impl.combineMachineInstrs(); } diff --git a/llvm/lib/Target/AIE/AIE2PreLegalizerCombiner.cpp b/llvm/lib/Target/AIE/aie2/AIE2PreLegalizerCombiner.cpp similarity index 98% rename from llvm/lib/Target/AIE/AIE2PreLegalizerCombiner.cpp rename to llvm/lib/Target/AIE/aie2/AIE2PreLegalizerCombiner.cpp index e0a2e0c1a879..7d5fd1dbd6b3 100644 --- a/llvm/lib/Target/AIE/AIE2PreLegalizerCombiner.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2PreLegalizerCombiner.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -501,13 +501,14 @@ bool AIE2PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) { const auto *LI = ST.getLegalizerInfo(); GISelKnownBits *KB = &getAnalysis().get(MF); - MachineDominatorTree *MDT = &getAnalysis().getDomTree(); + MachineDominatorTree *MDT = + &getAnalysis().getDomTree(); CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false, /*LegalizerInfo*/ nullptr, EnableOpt, F.hasOptSize(), F.hasMinSize()); - AIE2PreLegalizerCombinerImpl Impl(MF, CInfo, TPC, *KB, CSEInfo, - RuleConfig, ST, MDT, LI); + AIE2PreLegalizerCombinerImpl Impl(MF, CInfo, TPC, *KB, CSEInfo, RuleConfig, + ST, MDT, LI); return Impl.combineMachineInstrs(); } diff --git a/llvm/lib/Target/AIE/AIE2RegisterBankInfo.cpp b/llvm/lib/Target/AIE/aie2/AIE2RegisterBankInfo.cpp similarity index 99% rename from llvm/lib/Target/AIE/AIE2RegisterBankInfo.cpp rename to llvm/lib/Target/AIE/aie2/AIE2RegisterBankInfo.cpp index 58491626966e..0cfdf6759017 100644 --- a/llvm/lib/Target/AIE/AIE2RegisterBankInfo.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2RegisterBankInfo.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// /// \file diff --git a/llvm/lib/Target/AIE/AIE2RegisterBankInfo.h b/llvm/lib/Target/AIE/aie2/AIE2RegisterBankInfo.h similarity index 97% rename from llvm/lib/Target/AIE/AIE2RegisterBankInfo.h rename to llvm/lib/Target/AIE/aie2/AIE2RegisterBankInfo.h index cd559de0979f..14141e0b528e 100644 --- a/llvm/lib/Target/AIE/AIE2RegisterBankInfo.h +++ b/llvm/lib/Target/AIE/aie2/AIE2RegisterBankInfo.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// /// \file diff --git a/llvm/lib/Target/AIE/AIE2RegisterInfo.cpp b/llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.cpp similarity index 99% rename from llvm/lib/Target/AIE/AIE2RegisterInfo.cpp rename to llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.cpp index d5014d98be43..39a1e8023356 100644 --- a/llvm/lib/Target/AIE/AIE2RegisterInfo.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2RegisterInfo.h b/llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.h similarity index 98% rename from llvm/lib/Target/AIE/AIE2RegisterInfo.h rename to llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.h index 61ac4b978cf6..375fd3b60a53 100644 --- a/llvm/lib/Target/AIE/AIE2RegisterInfo.h +++ b/llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2Subtarget.cpp b/llvm/lib/Target/AIE/aie2/AIE2Subtarget.cpp similarity index 97% rename from llvm/lib/Target/AIE/AIE2Subtarget.cpp rename to llvm/lib/Target/AIE/aie2/AIE2Subtarget.cpp index ee930b4de117..af1809b681a9 100644 --- a/llvm/lib/Target/AIE/AIE2Subtarget.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2Subtarget.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2Subtarget.h b/llvm/lib/Target/AIE/aie2/AIE2Subtarget.h similarity index 98% rename from llvm/lib/Target/AIE/AIE2Subtarget.h rename to llvm/lib/Target/AIE/aie2/AIE2Subtarget.h index b2e0a0c40204..c217dafbad03 100644 --- a/llvm/lib/Target/AIE/AIE2Subtarget.h +++ b/llvm/lib/Target/AIE/aie2/AIE2Subtarget.h @@ -15,7 +15,7 @@ #ifndef LLVM_LIB_TARGET_AIE2_AIE2SUBTARGET_H #define LLVM_LIB_TARGET_AIE2_AIE2SUBTARGET_H #include "AIE2.h" -#include "AIE2AddrSpace.h" +#include "AIE2CommonAddrSpace.h" #include "AIE2FrameLowering.h" #include "AIE2ISelLowering.h" #include "AIE2InstrInfo.h" @@ -39,7 +39,7 @@ class StringRef; class AIE2Subtarget : public AIE2GenSubtargetInfo, public AIEBaseSubtarget { virtual void anchor(); std::string CPUName; - AIE2AddrSpaceInfo AddrSpaceInfo; + AIE2CommonAddrSpaceInfo AddrSpaceInfo; AIE2FrameLowering FrameLowering; AIE2InstrInfo InstrInfo; AIE2RegisterInfo RegInfo; diff --git a/llvm/lib/Target/AIE/AIE2TargetMachine.cpp b/llvm/lib/Target/AIE/aie2/AIE2TargetMachine.cpp similarity index 98% rename from llvm/lib/Target/AIE/AIE2TargetMachine.cpp rename to llvm/lib/Target/AIE/aie2/AIE2TargetMachine.cpp index 28a0378670d6..d897c1a71a46 100644 --- a/llvm/lib/Target/AIE/AIE2TargetMachine.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2TargetMachine.cpp @@ -257,8 +257,8 @@ AIE2TargetMachine::getAddressSpaceForPseudoSourceKind(unsigned Kind) const { case PseudoSourceValue::FixedStack: return StackAddrSpace; case AIETargetPSV::AIETileMem: - return static_cast(AIE2::AddressSpaces::TM); + return static_cast(AIE2X::AddressSpaces::TM); default: - return static_cast(AIE2::AddressSpaces::none); + return static_cast(AIE2X::AddressSpaces::none); } } diff --git a/llvm/lib/Target/AIE/aie2/AIE2TargetMachine.h b/llvm/lib/Target/AIE/aie2/AIE2TargetMachine.h new file mode 100644 index 000000000000..6577fa14bdb2 --- /dev/null +++ b/llvm/lib/Target/AIE/aie2/AIE2TargetMachine.h @@ -0,0 +1,21 @@ +//===--AIE2TargetMachine.h -Define TargetMachine for AIEngine V2 -*- C++-*-===// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates +// +//===----------------------------------------------------------------------===// +// +// This file is a thin wrapper that includes the common AIE2 target machine +// definitions used by all AIE2 variants (AIE2, AIE2P, AIE2PS). +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AIE_AIE2_AIE2TARGETMACHINE_H +#define LLVM_LIB_TARGET_AIE_AIE2_AIE2TARGETMACHINE_H + +#include "AIE2CommonTargetMachine.h" + +#endif // LLVM_LIB_TARGET_AIE_AIE2_AIE2TARGETMACHINE_H diff --git a/llvm/lib/Target/AIE/AIE2TargetTransformInfo.cpp b/llvm/lib/Target/AIE/aie2/AIE2TargetTransformInfo.cpp similarity index 97% rename from llvm/lib/Target/AIE/AIE2TargetTransformInfo.cpp rename to llvm/lib/Target/AIE/aie2/AIE2TargetTransformInfo.cpp index a07c7d7c59c5..7d7d2c2e1ecc 100644 --- a/llvm/lib/Target/AIE/AIE2TargetTransformInfo.cpp +++ b/llvm/lib/Target/AIE/aie2/AIE2TargetTransformInfo.cpp @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AIE/AIE2TargetTransformInfo.h b/llvm/lib/Target/AIE/aie2/AIE2TargetTransformInfo.h similarity index 97% rename from llvm/lib/Target/AIE/AIE2TargetTransformInfo.h rename to llvm/lib/Target/AIE/aie2/AIE2TargetTransformInfo.h index 021eec4dc30a..ee4e4c71bf02 100644 --- a/llvm/lib/Target/AIE/AIE2TargetTransformInfo.h +++ b/llvm/lib/Target/AIE/aie2/AIE2TargetTransformInfo.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/aie2p/AIE2PSubtarget.h b/llvm/lib/Target/AIE/aie2p/AIE2PSubtarget.h index 73d9fd6109b4..5740f706c367 100644 --- a/llvm/lib/Target/AIE/aie2p/AIE2PSubtarget.h +++ b/llvm/lib/Target/AIE/aie2p/AIE2PSubtarget.h @@ -14,15 +14,17 @@ #ifndef LLVM_LIB_TARGET_AIE2P_AIE2PSUBTARGET_H #define LLVM_LIB_TARGET_AIE2P_AIE2PSUBTARGET_H +#include "AIE2CommonAddrSpace.h" #include "AIE2P.h" #include "AIE2PFrameLowering.h" #include "AIE2PISelLowering.h" #include "AIE2PInstrInfo.h" #include "AIE2PRegisterInfo.h" -#include "AIE2Subtarget.h" +#include "AIEBaseSubtarget.h" #include "llvm/CodeGen/GlobalISel/CallLowering.h" #include "llvm/CodeGen/GlobalISel/InstructionSelector.h" #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" +#include "llvm/CodeGen/SelectionDAGTargetInfo.h" #define GET_SUBTARGETINFO_HEADER #include "AIE2PGenSubtargetInfo.inc" @@ -33,8 +35,7 @@ class StringRef; class AIE2PSubtarget : public AIE2PGenSubtargetInfo, public AIEBaseSubtarget { virtual void anchor(); std::string CPUName; - // FIXME: Do we need a custom AIE2PAddrSpaceInfo? - AIE2AddrSpaceInfo AddrSpaceInfo; + AIE2CommonAddrSpaceInfo AddrSpaceInfo; AIE2PFrameLowering FrameLowering; AIE2PInstrInfo InstrInfo; AIE2PRegisterInfo RegInfo; diff --git a/llvm/lib/Target/AIE/aie2p/AIE2PTargetMachine.h b/llvm/lib/Target/AIE/aie2p/AIE2PTargetMachine.h index 8357f4aa4c24..ff3d137456d7 100644 --- a/llvm/lib/Target/AIE/aie2p/AIE2PTargetMachine.h +++ b/llvm/lib/Target/AIE/aie2p/AIE2PTargetMachine.h @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2024-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2024-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -15,11 +15,10 @@ #ifndef LLVM_LIB_TARGET_AIE_AIE2PTARGETMACHINE_H #define LLVM_LIB_TARGET_AIE_AIE2PTARGETMACHINE_H +#include "AIE2CommonTargetMachine.h" #include "AIE2PSubtarget.h" -#include "AIE2TargetMachine.h" #include "MCTargetDesc/aie2p/AIE2PMCTargetDesc.h" #include "llvm/CodeGen/SelectionDAGTargetInfo.h" -#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/IR/DataLayout.h" #include "llvm/Target/TargetMachine.h" #include diff --git a/llvm/lib/Target/AIE/aie2ps/AIE2PSSubtarget.h b/llvm/lib/Target/AIE/aie2ps/AIE2PSSubtarget.h index 6793b6156f5d..aaf2e3888439 100644 --- a/llvm/lib/Target/AIE/aie2ps/AIE2PSSubtarget.h +++ b/llvm/lib/Target/AIE/aie2ps/AIE2PSSubtarget.h @@ -14,15 +14,17 @@ #ifndef LLVM_LIB_TARGET_AIE2PS_AIE2PSSUBTARGET_H #define LLVM_LIB_TARGET_AIE2PS_AIE2PSSUBTARGET_H +#include "AIE2CommonAddrSpace.h" #include "AIE2PS.h" #include "AIE2PSFrameLowering.h" #include "AIE2PSISelLowering.h" #include "AIE2PSInstrInfo.h" #include "AIE2PSRegisterInfo.h" -#include "AIE2Subtarget.h" +#include "AIEBaseSubtarget.h" #include "llvm/CodeGen/GlobalISel/CallLowering.h" #include "llvm/CodeGen/GlobalISel/InstructionSelector.h" #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" +#include "llvm/CodeGen/SelectionDAGTargetInfo.h" #define GET_SUBTARGETINFO_HEADER #include "AIE2PSGenSubtargetInfo.inc" @@ -33,8 +35,7 @@ class StringRef; class AIE2PSSubtarget : public AIE2PSGenSubtargetInfo, public AIEBaseSubtarget { virtual void anchor(); std::string CPUName; - // FIXME: Do we need a custom AIE2PSAddrSpaceInfo? - AIE2AddrSpaceInfo AddrSpaceInfo; + AIE2CommonAddrSpaceInfo AddrSpaceInfo; AIE2PSFrameLowering FrameLowering; AIE2PSInstrInfo InstrInfo; AIE2PSRegisterInfo RegInfo; diff --git a/llvm/unittests/Target/AIE/HazardRecognizerTest.cpp b/llvm/unittests/Target/AIE/HazardRecognizerTest.cpp index efa0dc52e780..9b29d9c79ded 100644 --- a/llvm/unittests/Target/AIE/HazardRecognizerTest.cpp +++ b/llvm/unittests/Target/AIE/HazardRecognizerTest.cpp @@ -4,13 +4,13 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// -#include "AIE2.h" -#include "AIE2InstrInfo.h" #include "AIEHazardRecognizer.h" #include "MCTargetDesc/AIEFormat.h" +#include "aie2/AIE2.h" +#include "aie2/AIE2InstrInfo.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/ResourceScoreboard.h" #include "llvm/CodeGen/TargetInstrInfo.h" From ff8589af23047d6f8aa27ff0da621e5fd4a10f0a Mon Sep 17 00:00:00 2001 From: Martien de Jong Date: Thu, 5 Mar 2026 17:51:00 +0100 Subject: [PATCH 2/2] [AIE] Also reorgranise the table gen files into subdirectories That holds also for archs that already had their C++ sources in subdirs --- llvm/lib/Target/AIE/CMakeLists.txt | 4 ++-- llvm/lib/Target/AIE/{ => aie2}/AIE2.td | 12 ++++++------ .../lib/Target/AIE/{ => aie2}/AIE2CallingConv.td | 2 +- .../AIE/{ => aie2}/AIE2CompositeFormats.td | 2 +- .../AIE/{ => aie2}/AIE2GenFixupInstrInfo.td | 2 +- .../Target/AIE/{ => aie2}/AIE2GenInstrFormats.td | 2 +- .../Target/AIE/{ => aie2}/AIE2GenInstrInfo.td | 2 +- .../Target/AIE/{ => aie2}/AIE2GenRegisterInfo.td | 2 +- .../Target/AIE/{ => aie2}/AIE2InstrFormats.td | 6 +++--- llvm/lib/Target/AIE/{ => aie2}/AIE2InstrInfo.td | 16 ++++++++-------- .../Target/AIE/{ => aie2}/AIE2InstrPatterns.td | 2 +- .../{ => aie2}/AIE2MultiSlotPseudoInstrInfo.td | 2 +- .../Target/AIE/{ => aie2}/AIE2RegOperandDef.td | 2 +- .../Target/AIE/{ => aie2}/AIE2RegisterBanks.td | 2 +- .../Target/AIE/{ => aie2}/AIE2RegisterInfo.td | 4 ++-- llvm/lib/Target/AIE/{ => aie2}/AIE2Schedule.td | 2 +- llvm/lib/Target/AIE/{ => aie2}/AIE2Slots.td | 2 +- .../Target/AIE/{ => aie2p}/AIE2PSlotInclude.td | 2 +- llvm/lib/Target/AIE/aie2p/AIE2PSlots.td | 4 ++-- llvm/lib/Target/AIE/{ => aie2ps}/AIE2PS.td | 0 .../Target/AIE/aie2ps/AIE2PSCompositeFormats.td | 4 ++-- .../AIE2PSCompositeFormatsInclude.td | 0 .../Target/AIE/{ => aie2ps}/AIE2PSSlotInclude.td | 0 llvm/lib/Target/AIE/aie2ps/AIE2PSSlots.td | 2 +- 24 files changed, 39 insertions(+), 39 deletions(-) rename llvm/lib/Target/AIE/{ => aie2}/AIE2.td (89%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2CallingConv.td (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2CompositeFormats.td (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2GenFixupInstrInfo.td (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2GenInstrFormats.td (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2GenInstrInfo.td (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2GenRegisterInfo.td (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2InstrFormats.td (89%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2InstrInfo.td (98%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2InstrPatterns.td (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2MultiSlotPseudoInstrInfo.td (98%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2RegOperandDef.td (95%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2RegisterBanks.td (90%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2RegisterInfo.td (96%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2Schedule.td (99%) rename llvm/lib/Target/AIE/{ => aie2}/AIE2Slots.td (98%) rename llvm/lib/Target/AIE/{ => aie2p}/AIE2PSlotInclude.td (94%) rename llvm/lib/Target/AIE/{ => aie2ps}/AIE2PS.td (100%) rename llvm/lib/Target/AIE/{ => aie2ps}/AIE2PSCompositeFormatsInclude.td (100%) rename llvm/lib/Target/AIE/{ => aie2ps}/AIE2PSSlotInclude.td (100%) diff --git a/llvm/lib/Target/AIE/CMakeLists.txt b/llvm/lib/Target/AIE/CMakeLists.txt index db6f49d8044d..e91631a95486 100644 --- a/llvm/lib/Target/AIE/CMakeLists.txt +++ b/llvm/lib/Target/AIE/CMakeLists.txt @@ -24,7 +24,7 @@ tablegen(LLVM AIEGenRegisterInfo.inc -gen-register-info -base-registerinfo-class tablegen(LLVM AIEGenSubtargetInfo.inc -gen-subtarget) #tablegen(LLVM AIEGenSystemOperands.inc -gen-searchable-tables) #aie2 -set(LLVM_TARGET_DEFINITIONS AIE2.td) +set(LLVM_TARGET_DEFINITIONS aie2/AIE2.td) tablegen(LLVM AIE2GenAsmMatcher.inc -gen-asm-matcher) tablegen(LLVM AIE2GenAsmWriter.inc -gen-asm-writer) tablegen(LLVM AIE2GenPreLegalizerGICombiner.inc -gen-global-isel-combiner @@ -73,7 +73,7 @@ tablegen(LLVM AIE2PGenAsmMatcher.inc -gen-asm-matcher) tablegen(LLVM AIE2PGenVarInstructionItin.inc -gen-aie-alternate-itinerary-emitter) # aie2ps -set(LLVM_TARGET_DEFINITIONS AIE2PS.td) +set(LLVM_TARGET_DEFINITIONS aie2ps/AIE2PS.td) tablegen(LLVM AIE2PSGenInstrInfo.inc -gen-instr-info -base-instrinfo-class AIEBaseInstrInfo) tablegen(LLVM AIE2PSGenRegisterInfo.inc -gen-register-info -base-registerinfo-class AIEBaseRegisterInfo) tablegen(LLVM AIE2PSGenRegisterBank.inc -gen-register-bank -base-register-bank-class AIEBaseRegisterBankInfo) diff --git a/llvm/lib/Target/AIE/AIE2.td b/llvm/lib/Target/AIE/aie2/AIE2.td similarity index 89% rename from llvm/lib/Target/AIE/AIE2.td rename to llvm/lib/Target/AIE/aie2/AIE2.td index 8ff261183590..785849561083 100644 --- a/llvm/lib/Target/AIE/AIE2.td +++ b/llvm/lib/Target/AIE/aie2/AIE2.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// @@ -22,16 +22,16 @@ def ptr0 : PtrValueType; // Registers, calling conventions, instruction descriptions. //===----------------------------------------------------------------------===// -include "AIE2RegisterInfo.td" -include "AIE2Schedule.td" -include "AIE2CallingConv.td" -include "AIE2RegisterBanks.td" +include "aie2/AIE2RegisterInfo.td" +include "aie2/AIE2Schedule.td" +include "aie2/AIE2CallingConv.td" +include "aie2/AIE2RegisterBanks.td" class AIEGenericInstruction : GenericInstruction { let Namespace = "AIE2"; } include "AIEInstrGISel.td" -include "AIE2InstrInfo.td" +include "aie2/AIE2InstrInfo.td" include "AIECombine.td" diff --git a/llvm/lib/Target/AIE/AIE2CallingConv.td b/llvm/lib/Target/AIE/aie2/AIE2CallingConv.td similarity index 99% rename from llvm/lib/Target/AIE/AIE2CallingConv.td rename to llvm/lib/Target/AIE/aie2/AIE2CallingConv.td index fbb43f812b51..b4148c0f2e50 100644 --- a/llvm/lib/Target/AIE/AIE2CallingConv.td +++ b/llvm/lib/Target/AIE/aie2/AIE2CallingConv.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2CompositeFormats.td b/llvm/lib/Target/AIE/aie2/AIE2CompositeFormats.td similarity index 99% rename from llvm/lib/Target/AIE/AIE2CompositeFormats.td rename to llvm/lib/Target/AIE/aie2/AIE2CompositeFormats.td index fa9ee2f90e36..1e1908fa55b5 100644 --- a/llvm/lib/Target/AIE/AIE2CompositeFormats.td +++ b/llvm/lib/Target/AIE/aie2/AIE2CompositeFormats.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// class AIE2CompositeInst diff --git a/llvm/lib/Target/AIE/AIE2GenFixupInstrInfo.td b/llvm/lib/Target/AIE/aie2/AIE2GenFixupInstrInfo.td similarity index 99% rename from llvm/lib/Target/AIE/AIE2GenFixupInstrInfo.td rename to llvm/lib/Target/AIE/aie2/AIE2GenFixupInstrInfo.td index 2ede5d77c856..74e0fde2851b 100644 --- a/llvm/lib/Target/AIE/AIE2GenFixupInstrInfo.td +++ b/llvm/lib/Target/AIE/aie2/AIE2GenFixupInstrInfo.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AIE/AIE2GenInstrFormats.td b/llvm/lib/Target/AIE/aie2/AIE2GenInstrFormats.td similarity index 99% rename from llvm/lib/Target/AIE/AIE2GenInstrFormats.td rename to llvm/lib/Target/AIE/aie2/AIE2GenInstrFormats.td index 6ff66a0b9d42..946944ec9183 100644 --- a/llvm/lib/Target/AIE/AIE2GenInstrFormats.td +++ b/llvm/lib/Target/AIE/aie2/AIE2GenInstrFormats.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AIE/AIE2GenInstrInfo.td b/llvm/lib/Target/AIE/aie2/AIE2GenInstrInfo.td similarity index 99% rename from llvm/lib/Target/AIE/AIE2GenInstrInfo.td rename to llvm/lib/Target/AIE/aie2/AIE2GenInstrInfo.td index 6d09ccc603a2..510616fba046 100644 --- a/llvm/lib/Target/AIE/AIE2GenInstrInfo.td +++ b/llvm/lib/Target/AIE/aie2/AIE2GenInstrInfo.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AIE/AIE2GenRegisterInfo.td b/llvm/lib/Target/AIE/aie2/AIE2GenRegisterInfo.td similarity index 99% rename from llvm/lib/Target/AIE/AIE2GenRegisterInfo.td rename to llvm/lib/Target/AIE/aie2/AIE2GenRegisterInfo.td index 0f51162638a9..3b4dc38ebcb9 100644 --- a/llvm/lib/Target/AIE/AIE2GenRegisterInfo.td +++ b/llvm/lib/Target/AIE/aie2/AIE2GenRegisterInfo.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2InstrFormats.td b/llvm/lib/Target/AIE/aie2/AIE2InstrFormats.td similarity index 89% rename from llvm/lib/Target/AIE/AIE2InstrFormats.td rename to llvm/lib/Target/AIE/aie2/AIE2InstrFormats.td index fe32096df201..437bfa9b75aa 100644 --- a/llvm/lib/Target/AIE/AIE2InstrFormats.td +++ b/llvm/lib/Target/AIE/aie2/AIE2InstrFormats.td @@ -4,13 +4,13 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// include "AIEBaseInstrFormats.td" -include "AIE2Slots.td" -include "AIE2GenInstrFormats.td" +include "aie2/AIE2Slots.td" +include "aie2/AIE2GenInstrFormats.td" // Pseudo instructions diff --git a/llvm/lib/Target/AIE/AIE2InstrInfo.td b/llvm/lib/Target/AIE/aie2/AIE2InstrInfo.td similarity index 98% rename from llvm/lib/Target/AIE/AIE2InstrInfo.td rename to llvm/lib/Target/AIE/aie2/AIE2InstrInfo.td index f91ebb99b24d..938c286ab729 100644 --- a/llvm/lib/Target/AIE/AIE2InstrInfo.td +++ b/llvm/lib/Target/AIE/aie2/AIE2InstrInfo.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // @@ -361,13 +361,13 @@ class AIE2_ag_no_imm__ag_pstm_3d : AIE2_ag_no_imm, AIE_HasTiedSubregister { let ag_no_imm = {ptr, 0b0, mod, 0b11}; } -include "AIE2RegOperandDef.td" -include "AIE2InstrFormats.td" -include "AIE2GenInstrInfo.td" -include "AIE2CompositeFormats.td" +include "aie2/AIE2RegOperandDef.td" +include "aie2/AIE2InstrFormats.td" +include "aie2/AIE2GenInstrInfo.td" +include "aie2/AIE2CompositeFormats.td" // Manual fixes to the auto-generated files -include "AIE2GenFixupInstrInfo.td" -include "AIE2MultiSlotPseudoInstrInfo.td" +include "aie2/AIE2GenFixupInstrInfo.td" +include "aie2/AIE2MultiSlotPseudoInstrInfo.td" //Intrinsics let Itinerary = II_EVENT, hasSideEffects = 1, mayLoad = 0, mayStore = 0 in { @@ -626,4 +626,4 @@ foreach instr = [VST_3D_SRS_D8_S32, VST_3D_SRS_D16_S64, VST_3D_SRS_D16_S32, PADDA_3D, PADDB_3D, PADDS_3D] in def instr # _split : Split3DInstr; -include "AIE2InstrPatterns.td" +include "aie2/AIE2InstrPatterns.td" diff --git a/llvm/lib/Target/AIE/AIE2InstrPatterns.td b/llvm/lib/Target/AIE/aie2/AIE2InstrPatterns.td similarity index 99% rename from llvm/lib/Target/AIE/AIE2InstrPatterns.td rename to llvm/lib/Target/AIE/aie2/AIE2InstrPatterns.td index df673a035490..845a1128eb8e 100644 --- a/llvm/lib/Target/AIE/AIE2InstrPatterns.td +++ b/llvm/lib/Target/AIE/aie2/AIE2InstrPatterns.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2MultiSlotPseudoInstrInfo.td b/llvm/lib/Target/AIE/aie2/AIE2MultiSlotPseudoInstrInfo.td similarity index 98% rename from llvm/lib/Target/AIE/AIE2MultiSlotPseudoInstrInfo.td rename to llvm/lib/Target/AIE/aie2/AIE2MultiSlotPseudoInstrInfo.td index 5e87a2036589..d8f057071017 100644 --- a/llvm/lib/Target/AIE/AIE2MultiSlotPseudoInstrInfo.td +++ b/llvm/lib/Target/AIE/aie2/AIE2MultiSlotPseudoInstrInfo.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AIE/AIE2RegOperandDef.td b/llvm/lib/Target/AIE/aie2/AIE2RegOperandDef.td similarity index 95% rename from llvm/lib/Target/AIE/AIE2RegOperandDef.td rename to llvm/lib/Target/AIE/aie2/AIE2RegOperandDef.td index 055f04c465df..394a9db96b53 100644 --- a/llvm/lib/Target/AIE/AIE2RegOperandDef.td +++ b/llvm/lib/Target/AIE/aie2/AIE2RegOperandDef.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// def OP_mDm : AIEBaseRegisterOperand; diff --git a/llvm/lib/Target/AIE/AIE2RegisterBanks.td b/llvm/lib/Target/AIE/aie2/AIE2RegisterBanks.td similarity index 90% rename from llvm/lib/Target/AIE/AIE2RegisterBanks.td rename to llvm/lib/Target/AIE/aie2/AIE2RegisterBanks.td index 8f8a6af300ee..47d3aa88d811 100644 --- a/llvm/lib/Target/AIE/AIE2RegisterBanks.td +++ b/llvm/lib/Target/AIE/aie2/AIE2RegisterBanks.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2RegisterInfo.td b/llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.td similarity index 96% rename from llvm/lib/Target/AIE/AIE2RegisterInfo.td rename to llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.td index 185c4065d516..7f5a9a0745d7 100644 --- a/llvm/lib/Target/AIE/AIE2RegisterInfo.td +++ b/llvm/lib/Target/AIE/aie2/AIE2RegisterInfo.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// @@ -46,7 +46,7 @@ class AIE2VReg Enc, string n, list subregs = []> : Register let SubRegs = subregs; } -include "AIE2GenRegisterInfo.td" +include "aie2/AIE2GenRegisterInfo.td" def VEC128 : AIE2Vector128RegisterClass<(add mQQm, mQQa, mQQs)>; def VEC256 : AIE2Vector256RegisterClass<(add mWm, mWa, mWb, mWs)>; diff --git a/llvm/lib/Target/AIE/AIE2Schedule.td b/llvm/lib/Target/AIE/aie2/AIE2Schedule.td similarity index 99% rename from llvm/lib/Target/AIE/AIE2Schedule.td rename to llvm/lib/Target/AIE/aie2/AIE2Schedule.td index f2dcede7a3f7..541f955bc3a2 100644 --- a/llvm/lib/Target/AIE/AIE2Schedule.td +++ b/llvm/lib/Target/AIE/aie2/AIE2Schedule.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// // diff --git a/llvm/lib/Target/AIE/AIE2Slots.td b/llvm/lib/Target/AIE/aie2/AIE2Slots.td similarity index 98% rename from llvm/lib/Target/AIE/AIE2Slots.td rename to llvm/lib/Target/AIE/aie2/AIE2Slots.td index 67b4ca533249..ef3512115ffb 100644 --- a/llvm/lib/Target/AIE/AIE2Slots.td +++ b/llvm/lib/Target/AIE/aie2/AIE2Slots.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2023-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AIE/AIE2PSlotInclude.td b/llvm/lib/Target/AIE/aie2p/AIE2PSlotInclude.td similarity index 94% rename from llvm/lib/Target/AIE/AIE2PSlotInclude.td rename to llvm/lib/Target/AIE/aie2p/AIE2PSlotInclude.td index 31544ffcd9ab..6142b357a4ea 100644 --- a/llvm/lib/Target/AIE/AIE2PSlotInclude.td +++ b/llvm/lib/Target/AIE/aie2p/AIE2PSlotInclude.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2024-2025 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2024-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AIE/aie2p/AIE2PSlots.td b/llvm/lib/Target/AIE/aie2p/AIE2PSlots.td index e0c2fe927099..4d4c00338699 100644 --- a/llvm/lib/Target/AIE/aie2p/AIE2PSlots.td +++ b/llvm/lib/Target/AIE/aie2p/AIE2PSlots.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2024-2026 Advanced Micro Devices, Inc. or its affiliates // //===---------------------------------------------------------------------===// //* Automatically generated file, do not edit! * @@ -42,7 +42,7 @@ let Namespace = "AIE2P" in } // Include manually written file defining a target's slot instruction -include "AIE2PSlotInclude.td" +include "aie2p/AIE2PSlotInclude.td" class AIE2PInst : AIEBaseInst {} diff --git a/llvm/lib/Target/AIE/AIE2PS.td b/llvm/lib/Target/AIE/aie2ps/AIE2PS.td similarity index 100% rename from llvm/lib/Target/AIE/AIE2PS.td rename to llvm/lib/Target/AIE/aie2ps/AIE2PS.td diff --git a/llvm/lib/Target/AIE/aie2ps/AIE2PSCompositeFormats.td b/llvm/lib/Target/AIE/aie2ps/AIE2PSCompositeFormats.td index d4d183f2cd26..872bdf39d358 100644 --- a/llvm/lib/Target/AIE/aie2ps/AIE2PSCompositeFormats.td +++ b/llvm/lib/Target/AIE/aie2ps/AIE2PSCompositeFormats.td @@ -4,7 +4,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates +// (c) Copyright 2024-2026 Advanced Micro Devices, Inc. or its affiliates // //===----------------------------------------------------------------------===// //* Automatically generated file, do not edit! * @@ -1136,7 +1136,7 @@ class AIE2PS__instr128__lda__ldb__st__alu__mv__vec let instr128 = {lda, ldb, st, alu, mv, 0b1, vec}; } -include "AIE2PSCompositeFormatsInclude.td" +include "aie2ps/AIE2PSCompositeFormatsInclude.td" def I32_LDA : AIE2PS__instr32__lda<(ins lda_slot:$lda)>; def I32_LDB : AIE2PS__instr32__ldb<(ins ldb_slot:$ldb)>; diff --git a/llvm/lib/Target/AIE/AIE2PSCompositeFormatsInclude.td b/llvm/lib/Target/AIE/aie2ps/AIE2PSCompositeFormatsInclude.td similarity index 100% rename from llvm/lib/Target/AIE/AIE2PSCompositeFormatsInclude.td rename to llvm/lib/Target/AIE/aie2ps/AIE2PSCompositeFormatsInclude.td diff --git a/llvm/lib/Target/AIE/AIE2PSSlotInclude.td b/llvm/lib/Target/AIE/aie2ps/AIE2PSSlotInclude.td similarity index 100% rename from llvm/lib/Target/AIE/AIE2PSSlotInclude.td rename to llvm/lib/Target/AIE/aie2ps/AIE2PSSlotInclude.td diff --git a/llvm/lib/Target/AIE/aie2ps/AIE2PSSlots.td b/llvm/lib/Target/AIE/aie2ps/AIE2PSSlots.td index 76d77b814d9f..904d7bf0ad9b 100644 --- a/llvm/lib/Target/AIE/aie2ps/AIE2PSSlots.td +++ b/llvm/lib/Target/AIE/aie2ps/AIE2PSSlots.td @@ -42,7 +42,7 @@ let Namespace = "AIE2PS" in } // Include manually written file defining a target's slot instruction -include "AIE2PSSlotInclude.td" +include "aie2ps/AIE2PSSlotInclude.td" class AIE2PSInst : AIEBaseInst {}