From 6b418744361f8e431cc11bfe4b4813dde93061bc Mon Sep 17 00:00:00 2001 From: thomthehound Date: Fri, 15 May 2026 16:19:49 -0400 Subject: [PATCH 1/5] Peano lit enablement No1 Signed-off-by: thomthehound --- mlir_exercises/CMakeLists.txt | 15 ++- programming_examples/CMakeLists.txt | 15 ++- programming_examples/lit.cfg.py | 18 ++- programming_guide/CMakeLists.txt | 15 ++- programming_guide/lit.cfg.py | 18 ++- python/aie_lit_utils/lit_config_helpers.py | 118 +++++++++++++----- python/compiler/aiecc/configure.py.in | 6 +- python/utils/config.py | 6 +- test/CMakeLists.txt | 2 +- .../AIEGenerateTargetArch/Inputs/npu1.mlir | 3 + .../AIEGenerateTargetArch/Inputs/npu2.mlir | 3 + .../Inputs/npu2_4col.mlir | 3 + test/Targets/AIEGenerateTargetArch/aie2.mlir | 8 +- .../test_error_dma_multi_lock.mlir | 2 +- .../test_error_dma_multi_state.mlir | 2 +- .../test_error_shimdma_multi_lock.mlir | 2 +- .../test_error_shimdma_multi_state.mlir | 2 +- .../AIETargetCDODirect/control_packets.mlir | 2 +- .../AIETargetCDODirect/initbuffer.mlir | 2 +- .../AIETargetCDODirect/initbuffer_fp32.mlir | 2 +- .../AIETargetCDODirect/initbuffer_int8.mlir | 2 +- .../AIETargetCDODirect/initbuffer_uint8.mlir | 2 +- test/Targets/AIETargetCDODirect/oneshim.mlir | 2 +- test/lit.cfg.py | 62 ++++++++- .../run.lit | 4 +- .../run.lit | 4 +- .../run.lit | 4 +- test/npu-xrt/add_314_using_dma_op/run.lit | 4 +- .../run.lit | 4 +- test/npu-xrt/add_blockwrite/run.lit | 4 +- test/npu-xrt/add_maskwrite/run.lit | 4 +- test/npu-xrt/add_one_cpp_aiecc/run.lit | 2 +- .../add_one_cpp_aiecc_xchesscc/run.lit | 2 +- test/npu-xrt/add_one_ctrl_packet/run.lit | 4 +- .../add_one_ctrl_packet_4_cores/run.lit | 4 +- .../add_one_ctrl_packet_col_overlay/run.lit | 4 +- .../add_one_func_link_with_chess/run.lit | 2 +- .../add_one_func_link_with_peano/run.lit | 2 +- test/npu-xrt/add_one_objFifo/run.lit | 4 +- test/npu-xrt/add_one_objFifo_elf/run.lit | 4 +- .../run.lit | 2 +- .../run.lit | 2 +- test/npu-xrt/add_one_two/run.lit | 6 +- test/npu-xrt/add_one_two_runlist/run.lit | 6 +- test/npu-xrt/add_one_two_txn/run.lit | 6 +- test/npu-xrt/add_one_using_dma/run.lit | 4 +- .../three_memtiles/aie2.py | 6 +- .../two_memtiles/aie2.py | 6 +- .../ext_to_core_L2_placed.py | 4 +- .../ext_to_core_L2_placed.py | 4 +- .../ext_to_core_L2_placed.py | 4 +- .../bd_chain_repeat_on_memtile/aie2.py | 4 +- test/npu-xrt/cascade_flows/run.lit | 4 +- test/npu-xrt/column_specific/aie2.py | 6 +- .../core_dmas/dma_configure_task_lock/run.lit | 4 +- .../dma_configure_task_token/run.lit | 4 +- test/npu-xrt/ctrl_packet_reconfig/run.lit | 6 +- .../ctrl_packet_reconfig_1x4_cores/run.lit | 6 +- .../ctrl_packet_reconfig_4x1_cores/run.lit | 6 +- test/npu-xrt/ctrl_packet_reconfig_elf/run.lit | 6 +- test/npu-xrt/device_width/aie2.py | 4 +- test/npu-xrt/dma_complex_dims/aie2.py | 2 +- test/npu-xrt/dma_task_large_linear/aie2.py | 4 +- test/npu-xrt/dmabd_task_queue/run.lit | 4 +- test/npu-xrt/dmabd_task_queue/test.cpp | 6 +- .../dynamic_object_fifo/nested_loops/aie2.py | 4 +- .../dynamic_object_fifo/ping_pong/aie2.py | 4 +- .../dynamic_object_fifo/reduction/aie2.py | 4 +- .../sliding_window/aie2.py | 4 +- .../sliding_window_conditional/aie2.py | 6 +- .../two_core_sliding_window/aie2.py | 4 +- test/npu-xrt/lit.local.cfg | 4 +- test/npu-xrt/loadpdi/run.lit | 4 +- .../run.lit | 2 +- test/npu-xrt/matrix_transpose/aie2.py | 6 +- .../blockwrite_using_locks/run.lit | 4 +- .../dma_configure_task_lock/run.lit | 4 +- .../dma_configure_task_token/run.lit | 4 +- test/npu-xrt/memtile_dmas/writebd/run.lit | 4 +- .../memtile_dmas/writebd_tokens/run.lit | 4 +- test/npu-xrt/nd_memcpy_linear_repeat/aie2.py | 6 +- test/npu-xrt/nd_memcpy_transforms/aie2.py | 8 +- .../neighbor_tile_memory_access/aie2.py | 6 +- .../objectfifo_repeat/compute_repeat/aie2.py | 2 +- .../distribute_repeat/aie2.py | 2 +- .../init_values_repeat/aie2.py | 2 +- .../objectfifo_repeat/simple_repeat/aie2.py | 4 +- test/npu-xrt/packet_flow/run.lit | 4 +- test/npu-xrt/packet_flow_fanin/run.lit | 4 +- test/npu-xrt/packet_flow_fanout/run.lit | 4 +- .../reconfigure_loadpdi/run_loadpdi.lit | 4 +- .../reconfigure_loadpdi/run_write32s.lit | 4 +- .../run_loadpdi.lit | 4 +- .../run_write32s.lit | 4 +- test/npu-xrt/runtime_cumsum/run.lit | 2 +- test/npu-xrt/shim_dma_bd_reuse/run.lit | 4 +- test/npu-xrt/static_L1_init/run.lit | 4 +- test/npu-xrt/sync_task_complete_token/aie2.py | 8 +- .../aie2.py | 8 +- .../tile_dmas/blockwrite_using_locks/run.lit | 4 +- test/npu-xrt/tile_dmas/writebd/run.lit | 4 +- test/npu-xrt/tile_dmas/writebd_tokens/run.lit | 4 +- test/npu-xrt/tile_mapped_read/run.lit | 4 +- test/npu-xrt/two_col/run.lit | 2 +- test/npu-xrt/vec_mul_event_trace/test.py | 4 +- .../vec_mul_trace_distribute_lateral/test.py | 2 +- test/npu-xrt/vec_vec_add_memtile_init/run.lit | 4 +- test/npu-xrt/vec_vec_add_objfifo_init/aie2.py | 2 +- test/npu-xrt/vec_vec_add_tile_init/run.lit | 4 +- test/npu-xrt/vector_scalar_using_dma/run.lit | 2 +- test/parse-trace/test1/aie_test1.mlir | 8 +- test/parse-trace/test2/aie_test2.mlir | 8 +- 112 files changed, 408 insertions(+), 274 deletions(-) create mode 100644 test/Targets/AIEGenerateTargetArch/Inputs/npu1.mlir create mode 100644 test/Targets/AIEGenerateTargetArch/Inputs/npu2.mlir create mode 100644 test/Targets/AIEGenerateTargetArch/Inputs/npu2_4col.mlir diff --git a/mlir_exercises/CMakeLists.txt b/mlir_exercises/CMakeLists.txt index 078e6455dfc..b5058e36281 100755 --- a/mlir_exercises/CMakeLists.txt +++ b/mlir_exercises/CMakeLists.txt @@ -48,13 +48,6 @@ set(CMAKE_CXX_STANDARD_REQUIRED YES) option(LLVM_INCLUDE_TOOLS "Generate build targets for the LLVM tools." ON) option(LLVM_BUILD_TOOLS "Build the LLVM tools. If OFF, just generate build targets." ON) -if(Vitis_FOUND) - set(DEFAULT_ENABLE_CHESS_TESTS ON) -else() - set(DEFAULT_ENABLE_CHESS_TESTS OFF) -endif() -option(ENABLE_CHESS_TESTS "Enable backend tests using xchesscc" ${DEFAULT_ENABLE_CHESS_TESTS}) - if(${CMAKE_HOST_SYSTEM_PROCESSOR} STREQUAL aarch64) set(DEFAULT_ENABLE_BOARD_TESTS ON) else() @@ -72,12 +65,18 @@ set(LLVM_LIBRARY_OUTPUT_INTDIR ${CMAKE_BINARY_DIR}/lib) set(MLIR_BINARY_DIR ${CMAKE_BINARY_DIR}) find_package(Vitis 2023.2 COMPONENTS ${AIE_VITIS_COMPONENTS}) +if(Vitis_FOUND) + set(DEFAULT_ENABLE_CHESS_TESTS ON) +else() + set(DEFAULT_ENABLE_CHESS_TESTS OFF) +endif() +option(ENABLE_CHESS_TESTS "Enable backend tests using xchesscc" ${DEFAULT_ENABLE_CHESS_TESTS}) find_package(Python3 COMPONENTS Interpreter) # Look for LibXAIE if (DEFINED LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR) message("Tutorials using xaiengine from LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR=${LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR}") - set(LibXAIE_ROOT ${LibXAIE_${target}_DIR}) + set(LibXAIE_ROOT ${LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR}) find_package(LibXAIE) else() if(DEFINED VITIS_ROOT) diff --git a/programming_examples/CMakeLists.txt b/programming_examples/CMakeLists.txt index 19fd34df990..2037ecf74e9 100755 --- a/programming_examples/CMakeLists.txt +++ b/programming_examples/CMakeLists.txt @@ -48,13 +48,6 @@ set(CMAKE_CXX_STANDARD_REQUIRED YES) option(LLVM_INCLUDE_TOOLS "Generate build targets for the LLVM tools." ON) option(LLVM_BUILD_TOOLS "Build the LLVM tools. If OFF, just generate build targets." ON) -if(Vitis_FOUND) - set(DEFAULT_ENABLE_CHESS_TESTS ON) -else() - set(DEFAULT_ENABLE_CHESS_TESTS OFF) -endif() -option(ENABLE_CHESS_TESTS "Enable backend tests using xchesscc" ${DEFAULT_ENABLE_CHESS_TESTS}) - if(${CMAKE_HOST_SYSTEM_PROCESSOR} STREQUAL aarch64) set(DEFAULT_ENABLE_BOARD_TESTS ON) endif() @@ -70,6 +63,12 @@ set(LLVM_LIBRARY_OUTPUT_INTDIR ${CMAKE_BINARY_DIR}/lib) set(MLIR_BINARY_DIR ${CMAKE_BINARY_DIR}) find_package(Vitis 2023.2 COMPONENTS ${AIE_VITIS_COMPONENTS}) +if(Vitis_FOUND) + set(DEFAULT_ENABLE_CHESS_TESTS ON) +else() + set(DEFAULT_ENABLE_CHESS_TESTS OFF) +endif() +option(ENABLE_CHESS_TESTS "Enable backend tests using xchesscc" ${DEFAULT_ENABLE_CHESS_TESTS}) find_package(Python3 COMPONENTS Interpreter) find_package(XRT) find_package(OpenCV) @@ -78,7 +77,7 @@ find_package(hsa-runtime64) # Look for LibXAIE if (DEFINED LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR) message("Ref designs using xaiengine from LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR=${LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR}") - set(LibXAIE_ROOT ${LibXAIE_${target}_DIR}) + set(LibXAIE_ROOT ${LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR}) find_package(LibXAIE) else() if(DEFINED VITIS_ROOT) diff --git a/programming_examples/lit.cfg.py b/programming_examples/lit.cfg.py index 16f5ab9c249..88ed701ee2f 100755 --- a/programming_examples/lit.cfg.py +++ b/programming_examples/lit.cfg.py @@ -56,6 +56,12 @@ config.hsa_dir, config.aieHostTarget, config.enable_board_tests ) +# Detect Peano before XRT feature gating for systems without Chess/AIETOOLS +early_peano_tools_dir = os.path.join(config.peano_install_dir, "bin") +early_peano_config = LitConfigHelper.detect_peano( + early_peano_tools_dir, config.peano_install_dir, llvm_config +) + # Detect XRT and Ryzen AI NPU devices xrt_config = LitConfigHelper.detect_xrt( config.xrt_lib_dir, @@ -63,6 +69,7 @@ config.xrt_bin_dir, config.aie_src_root, config.vitis_components, + has_peano_backend=early_peano_config.found, ) # Detect OpenCV @@ -108,12 +115,13 @@ LitConfigHelper.prepend_path(llvm_config, peano_tools_dir) config.substitutions.append(("%LLVM_TOOLS_DIR", config.llvm_tools_dir)) -tool_dirs = [config.aie_tools_dir, config.llvm_tools_dir] +tool_dirs = [config.aie_tools_dir] +if early_peano_config.found: + tool_dirs.append(peano_tools_dir) +tool_dirs.append(config.llvm_tools_dir) -# Detect Peano backend -peano_config = LitConfigHelper.detect_peano( - peano_tools_dir, config.peano_install_dir, llvm_config -) +# Reuse the earlier Peano probe after path setup. +peano_config = early_peano_config # Detect Chess compiler chess_config = LitConfigHelper.detect_chess( diff --git a/programming_guide/CMakeLists.txt b/programming_guide/CMakeLists.txt index 1e505ecae49..eec1f4050b2 100755 --- a/programming_guide/CMakeLists.txt +++ b/programming_guide/CMakeLists.txt @@ -48,13 +48,6 @@ set(CMAKE_CXX_STANDARD_REQUIRED YES) option(LLVM_INCLUDE_TOOLS "Generate build targets for the LLVM tools." ON) option(LLVM_BUILD_TOOLS "Build the LLVM tools. If OFF, just generate build targets." ON) -if(Vitis_FOUND) - set(DEFAULT_ENABLE_CHESS_TESTS ON) -else() - set(DEFAULT_ENABLE_CHESS_TESTS OFF) -endif() -option(ENABLE_CHESS_TESTS "Enable backend tests using xchesscc" ${DEFAULT_ENABLE_CHESS_TESTS}) - if(${CMAKE_HOST_SYSTEM_PROCESSOR} STREQUAL aarch64) set(DEFAULT_ENABLE_BOARD_TESTS ON) endif() @@ -70,6 +63,12 @@ set(LLVM_LIBRARY_OUTPUT_INTDIR ${CMAKE_BINARY_DIR}/lib) set(MLIR_BINARY_DIR ${CMAKE_BINARY_DIR}) find_package(Vitis 2023.2 COMPONENTS ${AIE_VITIS_COMPONENTS}) +if(Vitis_FOUND) + set(DEFAULT_ENABLE_CHESS_TESTS ON) +else() + set(DEFAULT_ENABLE_CHESS_TESTS OFF) +endif() +option(ENABLE_CHESS_TESTS "Enable backend tests using xchesscc" ${DEFAULT_ENABLE_CHESS_TESTS}) find_package(Python3 COMPONENTS Interpreter) find_package(XRT) find_package(OpenCV) @@ -78,7 +77,7 @@ find_package(hsa-runtime64) # Look for LibXAIE if (DEFINED LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR) message("Ref designs using xaiengine from LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR=${LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR}") - set(LibXAIE_ROOT ${LibXAIE_${target}_DIR}) + set(LibXAIE_ROOT ${LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR}) find_package(LibXAIE) else() if(DEFINED VITIS_ROOT) diff --git a/programming_guide/lit.cfg.py b/programming_guide/lit.cfg.py index 5112263255b..2efd66dd58b 100755 --- a/programming_guide/lit.cfg.py +++ b/programming_guide/lit.cfg.py @@ -38,6 +38,12 @@ # Add Vitis components as features LitConfigHelper.add_vitis_components_features(config, config.vitis_components) +# Detect Peano before XRT feature gating for systems without Chess/AIETOOLS +early_peano_tools_dir = os.path.join(config.peano_install_dir, "bin") +early_peano_config = LitConfigHelper.detect_peano( + early_peano_tools_dir, config.peano_install_dir, llvm_config +) + # Detect XRT and Ryzen AI NPU devices xrt_config = LitConfigHelper.detect_xrt( config.xrt_lib_dir, @@ -45,6 +51,7 @@ config.xrt_bin_dir, config.aie_src_root, config.vitis_components, + has_peano_backend=early_peano_config.found, ) llvm_config.use_default_substitutions() @@ -71,12 +78,13 @@ LitConfigHelper.prepend_path(llvm_config, peano_tools_dir) config.substitutions.append(("%LLVM_TOOLS_DIR", config.llvm_tools_dir)) -tool_dirs = [config.aie_tools_dir, config.llvm_tools_dir] +tool_dirs = [config.aie_tools_dir] +if early_peano_config.found: + tool_dirs.append(peano_tools_dir) +tool_dirs.append(config.llvm_tools_dir) -# Detect Peano backend -peano_config = LitConfigHelper.detect_peano( - peano_tools_dir, config.peano_install_dir, llvm_config -) +# Reuse the earlier Peano probe after path setup. +peano_config = early_peano_config # Detect Chess compiler chess_config = LitConfigHelper.detect_chess( diff --git a/python/aie_lit_utils/lit_config_helpers.py b/python/aie_lit_utils/lit_config_helpers.py index da31494257a..adfcd98d26e 100644 --- a/python/aie_lit_utils/lit_config_helpers.py +++ b/python/aie_lit_utils/lit_config_helpers.py @@ -257,6 +257,7 @@ def detect_xrt( xrt_bin_dir: str, aie_src_root: str, vitis_components: Optional[List[str]] = None, + has_peano_backend: bool = False, ) -> HardwareConfig: """ Detect XRT installation and Ryzen AI NPU hardware. @@ -267,6 +268,8 @@ def detect_xrt( xrt_bin_dir: Path to XRT binary directory aie_src_root: Path to AIE source root (for the run_on_npu wrapper) vitis_components: List of available Vitis components for feature filtering + has_peano_backend: Whether a working Peano backend is available for + AIE2/AIE2P compilation when Chess/Vitis AIETOOLS are absent Returns: HardwareConfig with XRT detection results @@ -301,26 +304,6 @@ def detect_xrt( config.flags = f"-I{xrt_include_dir} -L{xrt_lib_dir} -luuid -lxrt_coreutil" config.substitutions["%xrt_flags"] = config.flags - # Runtime library search path. - if os.name == "nt": - # Windows: ensure XRT DLLs can be resolved at runtime. - existing_path = os.environ.get("PATH", "") - config.environment["PATH"] = ( - xrt_bin_dir + os.pathsep + existing_path - if existing_path - else xrt_bin_dir - ) - else: - # Linux: add XRT library directory to LD_LIBRARY_PATH. - existing_ld_library_path = os.environ.get("LD_LIBRARY_PATH") - if existing_ld_library_path: - new_ld_library_path = ( - existing_ld_library_path + os.pathsep + xrt_lib_dir - ) - else: - new_ld_library_path = xrt_lib_dir - config.environment["LD_LIBRARY_PATH"] = new_ld_library_path - # Runtime library search path. Compose with the lit environment instead of # rebuilding PATH/LD_LIBRARY_PATH from the process environment. if os.name == "nt": @@ -387,7 +370,7 @@ def detect_xrt( # Map model to NPU generation and filter by available components # Use substring matching so e.g. "Krackan" matches "Krackan 1" if any(known in model for known in LitConfigHelper.NPU_MODELS["npu1"]): - if "AIE2" in vitis_components: + if "AIE2" in vitis_components or has_peano_backend: run_on_npu1 = LitConfigHelper._run_on_npu_wrap( aie_src_root, "npu1" ) @@ -398,12 +381,12 @@ def detect_xrt( ) else: logger.warning( - "NPU1 detected but aietools for aie2 not available" + "NPU1 detected but no AIE2 backend is available" ) elif any( known in model for known in LitConfigHelper.NPU_MODELS["npu2"] ): - if "AIE2P" in vitis_components: + if "AIE2P" in vitis_components or has_peano_backend: run_on_npu2 = LitConfigHelper._run_on_npu_wrap( aie_src_root, "npu2" ) @@ -414,7 +397,7 @@ def detect_xrt( ) else: logger.warning( - "NPU2 detected but aietools for aie2p not available" + "NPU2 detected but no AIE2P backend is available" ) else: logger.warning("xrt-smi reported unknown NPU model '%s'.", model) @@ -508,7 +491,8 @@ def detect_peano( config = HardwareConfig() try: - llc_path = os.path.join(peano_tools_dir, "llc") + llc_executable = "llc.exe" if os.name == "nt" else "llc" + llc_path = os.path.join(peano_tools_dir, llc_executable) result = subprocess.run( [llc_path, "-mtriple=aie", "--version"], stdout=subprocess.PIPE, @@ -521,6 +505,16 @@ def detect_peano( ): config.found = True config.features.append("peano") + + peano_executable_suffix = ".exe" if os.name == "nt" else "" + for tool_name in ["clang++", "clang"]: + tool_path = os.path.join( + peano_tools_dir, f"{tool_name}{peano_executable_suffix}" + ) + config.substitutions[f"%PEANO_INSTALL_DIR/bin/{tool_name}"] = ( + LitConfigHelper._quote_lit_arg(tool_path) + ) + config.substitutions["%PEANO_INSTALL_DIR"] = peano_install_dir # Also set environment variable for tests that need it llvm_config.with_environment("PEANO_INSTALL_DIR", peano_install_dir) @@ -618,6 +612,63 @@ def setup_host_target_triplet( else: return aie_host_target, "" + @staticmethod + def can_import_python_module( + config_obj, python_executable: str, module_name: str + ) -> bool: + """Return True when lit's test Python can import a module. + + Probes the environment lit actually uses for tests so feature gates do + not advertise Python extensions that are missing from the active PATH. + """ + probe_env = os.environ.copy() + for key, value in config_obj.environment.items(): + if key in LitConfigHelper.PATH_ENV_VARS: + probe_env[key] = LitConfigHelper._prepend_env_paths( + probe_env.get(key, ""), value + ) + else: + probe_env[key] = value + + probe = ( + "import importlib; " + f"importlib.import_module({module_name!r}); " + "print('ok')" + ) + try: + result = subprocess.run( + [python_executable, "-c", probe], + stdout=subprocess.PIPE, + stderr=subprocess.PIPE, + env=probe_env, + timeout=10, + ) + except subprocess.TimeoutExpired: + logger.warning("Python module import probe timed out for %s", module_name) + return False + except FileNotFoundError: + logger.warning( + "Python executable not found for import probe: %s", python_executable + ) + return False + except Exception as e: + logger.warning( + "Python module import probe failed for %s: %s", module_name, e + ) + return False + + if result.returncode == 0: + return True + + stderr = result.stderr.decode("utf-8", errors="ignore").strip() + logger.warning( + "Python module %s is not importable by %s%s", + module_name, + python_executable, + f": {stderr}" if stderr else "", + ) + return False + @staticmethod def apply_config_to_lit(config_obj, hardware_configs: Dict[str, HardwareConfig]): """ @@ -662,8 +713,14 @@ def setup_standard_environment( # Ensure hardware discovery messages are visible during lit runs. logging.basicConfig(level=logging.INFO, format="%(message)s", stream=sys.stdout) - # Python path for AIE Python bindings - config_obj.environment["PYTHONPATH"] = os.path.join(aie_obj_root, "python") + # Python path for AIE Python bindings. Preserve any existing entries. + aie_python_dir = os.path.join(aie_obj_root, "python") + current_pythonpath = config_obj.environment.get( + "PYTHONPATH", os.environ.get("PYTHONPATH", "") + ) + config_obj.environment["PYTHONPATH"] = LitConfigHelper._prepend_env_paths( + current_pythonpath, aie_python_dir + ) # AIE tools environment llvm_config.with_environment("AIETOOLS", vitis_aietools_dir) @@ -692,16 +749,19 @@ def setup_test_lib_substitutions( test_lib_path = os.path.join( aie_obj_root, "runtime_lib", aie_host_target, "test_lib" ) + test_lib_include = os.path.join(test_lib_path, "include") + test_lib_lib = os.path.join(test_lib_path, "lib") config_obj.substitutions.append( ( "%test_lib_flags", - f"-I{test_lib_path}/include -L{test_lib_path}/lib -ltest_lib", + f"-I{test_lib_include} -L{test_lib_lib} -ltest_lib", ) ) + test_utils_flags = f"-I{test_lib_include} -L{test_lib_lib} -ltest_utils" config_obj.substitutions.append( ( "%test_utils_flags", - f"-I{test_lib_path}/include -L{test_lib_path}/lib -ltest_utils", + test_utils_flags, ) ) diff --git a/python/compiler/aiecc/configure.py.in b/python/compiler/aiecc/configure.py.in index a69a3ec9cff..712570eaf17 100644 --- a/python/compiler/aiecc/configure.py.in +++ b/python/compiler/aiecc/configure.py.in @@ -19,10 +19,10 @@ aie_disable_compile = not pythonize_bool("@AIECC_COMPILE@") aie_unified_compile = True host_disable_compile = not pythonize_bool("@AIECC_HOST_COMPILE@") host_architecture = os.getenv("LLVM_HOST_TRIPLE", "@LLVM_HOST_TRIPLE@") -hsa_dir = os.getenv("HSA_RUNTIME_64_DIR", "@hsa-runtime64_DIR@") -libxaie_x86_hsa_dir = os.getenv("LIBXAIE_X86_HSA_DIR", "@LibXAIE_x86_64-hsa_DIR@") +hsa_dir = os.getenv("HSA_RUNTIME_64_DIR", r"""@hsa-runtime64_DIR@""") +libxaie_x86_hsa_dir = os.getenv("LIBXAIE_X86_HSA_DIR", r"""@LibXAIE_x86_64-hsa_DIR@""") -peano_install_dir = os.getenv("PEANO_INSTALL_DIR", "@PEANO_INSTALL_DIR@") +peano_install_dir = os.getenv("PEANO_INSTALL_DIR", r"""@PEANO_INSTALL_DIR@""") aie_dir = os.path.realpath( os.path.join(os.path.dirname(__file__), "..", "..", "..", "..") ) diff --git a/python/utils/config.py b/python/utils/config.py index 74e461d5e95..280585ac00a 100644 --- a/python/utils/config.py +++ b/python/utils/config.py @@ -22,7 +22,8 @@ def peano_install_dir(): def peano_cxx_path(): """Returns the path to the Peano C++ compiler.""" install_dir = peano_install_dir() - peano_cxx = os.path.join(install_dir, "bin", "clang++") + exe = ".exe" if os.name == "nt" else "" + peano_cxx = os.path.join(install_dir, "bin", f"clang++{exe}") if not os.path.isfile(peano_cxx): raise RuntimeError(f"Peano compiler not found in {peano_cxx}") return peano_cxx @@ -31,7 +32,8 @@ def peano_cxx_path(): def peano_linker_path(): """Returns the path to the Peano linker.""" install_dir = peano_install_dir() - peano_ld = os.path.join(install_dir, "bin", "ld.lld") + exe = ".exe" if os.name == "nt" else "" + peano_ld = os.path.join(install_dir, "bin", f"ld.lld{exe}") if not os.path.isfile(peano_ld): raise RuntimeError(f"Peano linker not found in {peano_ld}") return peano_ld diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index 86eb4c0bd94..69e1d38ef7f 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -74,7 +74,7 @@ cmake_dependent_option(ENABLE_PYTHON_TESTS "Enable python tests" ON "AIE_ENABLE_ set(LibXAIE_FOUND FALSE) if (DEFINED LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR) message("Test using xaiengine from LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR=${LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR}") - set(LibXAIE_ROOT ${LibXAIE_${target}_DIR}) + set(LibXAIE_ROOT ${LibXAIE_${AIE_RUNTIME_TEST_TARGET}_DIR}) find_package(LibXAIE) else() if(DEFINED VITIS_ROOT) diff --git a/test/Targets/AIEGenerateTargetArch/Inputs/npu1.mlir b/test/Targets/AIEGenerateTargetArch/Inputs/npu1.mlir new file mode 100644 index 00000000000..69bce21fda8 --- /dev/null +++ b/test/Targets/AIEGenerateTargetArch/Inputs/npu1.mlir @@ -0,0 +1,3 @@ +aie.device(npu1) { + aie.end +} diff --git a/test/Targets/AIEGenerateTargetArch/Inputs/npu2.mlir b/test/Targets/AIEGenerateTargetArch/Inputs/npu2.mlir new file mode 100644 index 00000000000..d96a8694053 --- /dev/null +++ b/test/Targets/AIEGenerateTargetArch/Inputs/npu2.mlir @@ -0,0 +1,3 @@ +aie.device(npu2) { + aie.end +} diff --git a/test/Targets/AIEGenerateTargetArch/Inputs/npu2_4col.mlir b/test/Targets/AIEGenerateTargetArch/Inputs/npu2_4col.mlir new file mode 100644 index 00000000000..8f0c7666663 --- /dev/null +++ b/test/Targets/AIEGenerateTargetArch/Inputs/npu2_4col.mlir @@ -0,0 +1,3 @@ +aie.device(npu2_4col) { + aie.end +} diff --git a/test/Targets/AIEGenerateTargetArch/aie2.mlir b/test/Targets/AIEGenerateTargetArch/aie2.mlir index c081c5637d9..667c1e0dac7 100644 --- a/test/Targets/AIEGenerateTargetArch/aie2.mlir +++ b/test/Targets/AIEGenerateTargetArch/aie2.mlir @@ -8,14 +8,14 @@ // //===----------------------------------------------------------------------===// -// RUN: echo 'aie.device(npu1){aie.end}' | aie-translate -aie-generate-target-arch | FileCheck --check-prefix=NPU10 --match-full-lines %s +// RUN: aie-translate %S/Inputs/npu1.mlir -aie-generate-target-arch | FileCheck --check-prefix=NPU10 --match-full-lines %s // NPU10: AIE2 -// RUN: echo 'aie.device(npu1){aie.end}' | aie-translate -aie-generate-target-arch | FileCheck --check-prefix=NPU14 --match-full-lines %s +// RUN: aie-translate %S/Inputs/npu1.mlir -aie-generate-target-arch | FileCheck --check-prefix=NPU14 --match-full-lines %s // NPU14: AIE2 -// RUN: echo 'aie.device(npu2){aie.end}' | aie-translate -aie-generate-target-arch | FileCheck --check-prefix=NPU20 --match-full-lines %s +// RUN: aie-translate %S/Inputs/npu2.mlir -aie-generate-target-arch | FileCheck --check-prefix=NPU20 --match-full-lines %s // NPU20: AIE2p -// RUN: echo 'aie.device(npu2_4col){aie.end}' | aie-translate -aie-generate-target-arch | FileCheck --check-prefix=NPU24 --match-full-lines %s +// RUN: aie-translate %S/Inputs/npu2_4col.mlir -aie-generate-target-arch | FileCheck --check-prefix=NPU24 --match-full-lines %s // NPU24: AIE2p diff --git a/test/Targets/AIEGenerateXAIE/test_error_dma_multi_lock.mlir b/test/Targets/AIEGenerateXAIE/test_error_dma_multi_lock.mlir index 305d4ad303d..7b34f56e1d5 100644 --- a/test/Targets/AIEGenerateXAIE/test_error_dma_multi_lock.mlir +++ b/test/Targets/AIEGenerateXAIE/test_error_dma_multi_lock.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: (aie-translate --aie-generate-xaie %s 2>&1 || true) | FileCheck %s +// RUN: not aie-translate --aie-generate-xaie %s 2>&1 | FileCheck %s // CHECK: used in a DMA block that have multiple locks. module @test_error_dma_multi_lock { diff --git a/test/Targets/AIEGenerateXAIE/test_error_dma_multi_state.mlir b/test/Targets/AIEGenerateXAIE/test_error_dma_multi_state.mlir index 873541e8571..184cdd45df8 100644 --- a/test/Targets/AIEGenerateXAIE/test_error_dma_multi_state.mlir +++ b/test/Targets/AIEGenerateXAIE/test_error_dma_multi_state.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: (aie-translate --aie-generate-xaie %s 2>&1 || true) | FileCheck %s +// RUN: not aie-translate --aie-generate-xaie %s 2>&1 | FileCheck %s // CHECK: acquires/releases the lock in a DMA block from/to multiple states. module @test_error_dma_multi_state { diff --git a/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_lock.mlir b/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_lock.mlir index 2b549d324a4..81d1712517d 100644 --- a/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_lock.mlir +++ b/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_lock.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: (aie-translate --aie-generate-xaie %s 2>&1 || true) | FileCheck %s +// RUN: not aie-translate --aie-generate-xaie %s 2>&1 | FileCheck %s // CHECK: used in a DMA block that have multiple locks. module @test_error_shimdma_multi_lock { diff --git a/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_state.mlir b/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_state.mlir index 41ed1a08eee..7f241a82a7b 100644 --- a/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_state.mlir +++ b/test/Targets/AIEGenerateXAIE/test_error_shimdma_multi_state.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: (aie-translate --aie-generate-xaie %s 2>&1 || true) | FileCheck %s +// RUN: not aie-translate --aie-generate-xaie %s 2>&1 | FileCheck %s // CHECK: acquires/releases the lock in a DMA block from/to multiple states. module @test_error_shimdma_multi_state { diff --git a/test/Targets/AIETargetCDODirect/control_packets.mlir b/test/Targets/AIETargetCDODirect/control_packets.mlir index 793692133e6..5cc78172e47 100644 --- a/test/Targets/AIETargetCDODirect/control_packets.mlir +++ b/test/Targets/AIETargetCDODirect/control_packets.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: aie-translate --aie-ctrlpkt-to-bin -aie-output-binary=false %s |& FileCheck %s +// RUN: aie-translate --aie-ctrlpkt-to-bin -aie-output-binary=false %s 2>&1 | FileCheck %s // CHECK: 8000001B // CHECK: 0001F000 diff --git a/test/Targets/AIETargetCDODirect/initbuffer.mlir b/test/Targets/AIETargetCDODirect/initbuffer.mlir index 2738f5f0032..cbe4d630f35 100644 --- a/test/Targets/AIETargetCDODirect/initbuffer.mlir +++ b/test/Targets/AIETargetCDODirect/initbuffer.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true |& FileCheck %s +// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true 2>&1 | FileCheck %s // CHECK: (BlockWrite-DMAWriteCmd): Start Address: 0x0000000000100000 Size: 8 // CHECK: Address: 0x0000000000100000 Data@ {{0x[0-9a-z]+}} is: 0x000000EA diff --git a/test/Targets/AIETargetCDODirect/initbuffer_fp32.mlir b/test/Targets/AIETargetCDODirect/initbuffer_fp32.mlir index aff86cd06ad..7a34de18610 100644 --- a/test/Targets/AIETargetCDODirect/initbuffer_fp32.mlir +++ b/test/Targets/AIETargetCDODirect/initbuffer_fp32.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true |& FileCheck %s +// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true 2>&1 | FileCheck %s // CHECK: (BlockWrite-DMAWriteCmd): Start Address: 0x0000000000100000 Size: 8 // CHECK: Address: 0x0000000000100000 Data@ {{0x[0-9a-z]+}} is: 0x40533333 diff --git a/test/Targets/AIETargetCDODirect/initbuffer_int8.mlir b/test/Targets/AIETargetCDODirect/initbuffer_int8.mlir index f6e93be99d7..46064744b9a 100644 --- a/test/Targets/AIETargetCDODirect/initbuffer_int8.mlir +++ b/test/Targets/AIETargetCDODirect/initbuffer_int8.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true |& FileCheck %s +// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true 2>&1 | FileCheck %s // CHECK: (BlockWrite-DMAWriteCmd): Start Address: 0x0000000000100000 Size: 2 // CHECK: Address: 0x0000000000100000 Data@ {{0x[0-9a-z]+}} is: 0xFD020100 diff --git a/test/Targets/AIETargetCDODirect/initbuffer_uint8.mlir b/test/Targets/AIETargetCDODirect/initbuffer_uint8.mlir index ece498e0568..38699720b82 100644 --- a/test/Targets/AIETargetCDODirect/initbuffer_uint8.mlir +++ b/test/Targets/AIETargetCDODirect/initbuffer_uint8.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true |& FileCheck %s +// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true 2>&1 | FileCheck %s // CHECK: (BlockWrite-DMAWriteCmd): Start Address: 0x0000000000100000 Size: 2 // CHECK: Address: 0x0000000000100000 Data@ {{0x[0-9a-z]+}} is: 0xFD020100 diff --git a/test/Targets/AIETargetCDODirect/oneshim.mlir b/test/Targets/AIETargetCDODirect/oneshim.mlir index 2724d190b1e..518210db888 100644 --- a/test/Targets/AIETargetCDODirect/oneshim.mlir +++ b/test/Targets/AIETargetCDODirect/oneshim.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true |& FileCheck %s +// RUN: aie-translate --aie-generate-cdo %s --cdo-debug=true 2>&1 | FileCheck %s // CHECK: (BlockWrite-DMAWriteCmd): Start Address: 0x000000000001D000 Size: 8 // CHECK: Address: 0x000000000001D000 Data@ {{0x[0-9a-z]+}} is: 0x00000004 diff --git a/test/lit.cfg.py b/test/lit.cfg.py index 417ee27542e..7c9d612f527 100644 --- a/test/lit.cfg.py +++ b/test/lit.cfg.py @@ -7,6 +7,7 @@ # (c) Copyright 2021-2026 Xilinx Inc. import os +import shutil import sys # Add shared AIE lit utilities to path @@ -38,6 +39,10 @@ llvm_config, config, config.aie_obj_root, config.vitis_aietools_dir ) +# Forward the install prefix when tests are run against wheel-installed tools. +if "MLIR_AIE_INSTALL_DIR" in os.environ: + llvm_config.with_system_environment("MLIR_AIE_INSTALL_DIR") + # Basic substitutions config.substitutions.append(("%PYTHON", config.python_executable)) config.substitutions.append(("%extraAieCcFlags%", config.extraAieCcFlags)) @@ -63,6 +68,20 @@ # Add Vitis components as features LitConfigHelper.add_vitis_components_features(config, config.vitis_components) +# Host-side tests should use the host LLVM compiler instead of llvm-aie. +host_clang = os.path.join(config.llvm_tools_dir, f"clang{config.llvm_exe_ext}") +if not os.path.exists(host_clang): + host_clang = shutil.which("clang") or "clang" +config.substitutions.append( + ("%host_clang", LitConfigHelper._quote_lit_arg(host_clang)) +) + + +# Detect Peano before XRT feature gating for systems without Chess/AIETOOLS. +early_peano_tools_dir = os.path.join(config.peano_install_dir, "bin") +early_peano_config = LitConfigHelper.detect_peano( + early_peano_tools_dir, config.peano_install_dir, llvm_config +) # Detect XRT and Ryzen AI NPU devices xrt_config = LitConfigHelper.detect_xrt( @@ -71,6 +90,7 @@ config.xrt_bin_dir, config.aie_src_root, config.vitis_components, + has_peano_backend=early_peano_config.found, ) # Setup host target triplet and sysroot @@ -88,6 +108,7 @@ # directories. config.excludes = [ "lit.cfg.py", + "Inputs", ] config.aie_tools_dir = os.path.join(config.aie_obj_root, "bin") @@ -102,17 +123,21 @@ LitConfigHelper.prepend_path(llvm_config, config.xrt_bin_dir) peano_tools_dir = os.path.join(config.peano_install_dir, "bin") +# Keep generic tool substitutions working by making both Peano tools and host +# LLVM tools discoverable. Host-side tests use %host_clang instead of relying on +# PATH order to choose the host compiler. LitConfigHelper.prepend_path(llvm_config, config.llvm_tools_dir) LitConfigHelper.prepend_path(llvm_config, peano_tools_dir) LitConfigHelper.prepend_path(llvm_config, config.aie_tools_dir) config.substitutions.append(("%LLVM_TOOLS_DIR", config.llvm_tools_dir)) -tool_dirs = [config.aie_tools_dir, config.llvm_tools_dir] +tool_dirs = [config.aie_tools_dir] +if early_peano_config.found: + tool_dirs.append(peano_tools_dir) +tool_dirs.append(config.llvm_tools_dir) -# Detect Peano backend -peano_config = LitConfigHelper.detect_peano( - peano_tools_dir, config.peano_install_dir, llvm_config -) +# Reuse the earlier Peano probe after path setup. +peano_config = early_peano_config # Detect Chess compiler chess_config = LitConfigHelper.detect_chess( @@ -134,6 +159,29 @@ }, ) +# Keep generic npu-xrt tests on the existing Chess path when Chess is available, +# but steer them onto the Peano/lld path when Peano is the only AIE backend. +aiecc_backend_flags = "" +if "peano" in config.available_features and "chess" not in config.available_features: + aiecc_backend_flags = "--no-xchesscc --no-xbridge" +config.substitutions.append(("%aiecc_backend_flags", aiecc_backend_flags)) + +# Linux hosted tests need librt/libstdc++. Windows hosted tests link against +# CMake-built dynamic MSVC libraries. Match CMake's default /MD selection. +if os.name == "nt": + host_link_flags = " ".join( + [ + "-fms-runtime-lib=dll", + "-Xlinker", + "/NODEFAULTLIB:libucrt", + "-Xlinker", + "/DEFAULTLIB:ucrt", + ] + ) +else: + host_link_flags = "-lrt -lstdc++" +config.substitutions.append(("%host_link_flags", host_link_flags)) + tools = [ "aie-opt", "aie-translate", @@ -182,7 +230,9 @@ if config.python_passes: config.available_features.add("python_passes") -if config.xrt_python_bindings: +if config.xrt_python_bindings and LitConfigHelper.can_import_python_module( + config, config.python_executable, "pyxrt" +): config.available_features.add("xrt_python_bindings") if config.has_mlir_runtime_libraries: diff --git a/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit b/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit index 5f6b152c71b..4ddda91883a 100644 --- a/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit +++ b/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin // diff --git a/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit b/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit index e0951c2fec1..9cd7b9d05ba 100644 --- a/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit +++ b/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit b/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit index e0951c2fec1..9cd7b9d05ba 100644 --- a/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit +++ b/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_314_using_dma_op/run.lit b/test/npu-xrt/add_314_using_dma_op/run.lit index b7e3235ea81..b85c8f10195 100644 --- a/test/npu-xrt/add_314_using_dma_op/run.lit +++ b/test/npu-xrt/add_314_using_dma_op/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit b/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit index b7e3235ea81..b85c8f10195 100644 --- a/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit +++ b/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_blockwrite/run.lit b/test/npu-xrt/add_blockwrite/run.lit index c03cd8bf30e..d38da60330a 100644 --- a/test/npu-xrt/add_blockwrite/run.lit +++ b/test/npu-xrt/add_blockwrite/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_maskwrite/run.lit b/test/npu-xrt/add_maskwrite/run.lit index c03cd8bf30e..d38da60330a 100644 --- a/test/npu-xrt/add_maskwrite/run.lit +++ b/test/npu-xrt/add_maskwrite/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_cpp_aiecc/run.lit b/test/npu-xrt/add_one_cpp_aiecc/run.lit index a69f23ae8cf..2b53833dc7f 100644 --- a/test/npu-xrt/add_one_cpp_aiecc/run.lit +++ b/test/npu-xrt/add_one_cpp_aiecc/run.lit @@ -7,6 +7,6 @@ // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // RUN: aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_cpp_aiecc_xchesscc/run.lit b/test/npu-xrt/add_one_cpp_aiecc_xchesscc/run.lit index d230440ab88..af1f2c3694b 100644 --- a/test/npu-xrt/add_one_cpp_aiecc_xchesscc/run.lit +++ b/test/npu-xrt/add_one_cpp_aiecc_xchesscc/run.lit @@ -7,6 +7,6 @@ // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // RUN: aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_ctrl_packet/run.lit b/test/npu-xrt/add_one_ctrl_packet/run.lit index 0cbc0b715ea..c09f42c2215 100644 --- a/test/npu-xrt/add_one_ctrl_packet/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit b/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit index 43b6bafe697..6fc43bd05d3 100644 --- a/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_4col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall -lrt -lstdc++ %xrt_flags %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %host_link_flags %xrt_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit b/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit index 3f07d4f404b..b7a23542f44 100644 --- a/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1 // -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --generate-ctrl-pkt-overlay --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --generate-ctrl-pkt-overlay --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_func_link_with_chess/run.lit b/test/npu-xrt/add_one_func_link_with_chess/run.lit index 656c98d3972..433efd7b018 100644 --- a/test/npu-xrt/add_one_func_link_with_chess/run.lit +++ b/test/npu-xrt/add_one_func_link_with_chess/run.lit @@ -17,6 +17,6 @@ // RUN: %run_on_npu1% xchesscc_wrapper aie2 -I %aietools/include -c %S/add_one_kernel.cc -o ./add_one_kernel.o // RUN: %run_on_npu2% xchesscc_wrapper aie2p -I %aietools/include -c %S/add_one_kernel.cc -o ./add_one_kernel.o // RUN: aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_func_link_with_peano/run.lit b/test/npu-xrt/add_one_func_link_with_peano/run.lit index dab28dd7299..c27e2a44d52 100644 --- a/test/npu-xrt/add_one_func_link_with_peano/run.lit +++ b/test/npu-xrt/add_one_func_link_with_peano/run.lit @@ -18,6 +18,6 @@ // RUN: %run_on_npu1% %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -O2 -c %S/add_one_kernel.cc -o ./add_one_kernel.o // RUN: %run_on_npu2% %PEANO_INSTALL_DIR/bin/clang --target=aie2p-none-unknown-elf -O2 -c %S/add_one_kernel.cc -o ./add_one_kernel.o // RUN: aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_objFifo/run.lit b/test/npu-xrt/add_one_objFifo/run.lit index d736abad840..60dac9f86da 100644 --- a/test/npu-xrt/add_one_objFifo/run.lit +++ b/test/npu-xrt/add_one_objFifo/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu1% %python %S/test.py -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_objFifo_elf/run.lit b/test/npu-xrt/add_one_objFifo_elf/run.lit index ef4d313e59f..4800d22cf87 100644 --- a/test/npu-xrt/add_one_objFifo_elf/run.lit +++ b/test/npu-xrt/add_one_objFifo_elf/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-elf --elf-name=insts.elf --no-compile-host ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-elf --elf-name=insts.elf --no-compile-host ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.elf // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.elf // RUN: %run_on_npu1% %python %S/test.py -x aie.xclbin -k MLIR_AIE -i insts.elf diff --git a/test/npu-xrt/add_one_scale_func_link_with_chess/run.lit b/test/npu-xrt/add_one_scale_func_link_with_chess/run.lit index 860745d1618..21be8207427 100644 --- a/test/npu-xrt/add_one_scale_func_link_with_chess/run.lit +++ b/test/npu-xrt/add_one_scale_func_link_with_chess/run.lit @@ -26,6 +26,6 @@ // RUN: %run_on_npu1% xchesscc_wrapper aie2 -I %aietools/include -c %S/scale_kernel.cc -o ./scale_kernel.o // RUN: %run_on_npu2% xchesscc_wrapper aie2p -I %aietools/include -c %S/scale_kernel.cc -o ./scale_kernel.o // RUN: aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_scale_func_link_with_peano/run.lit b/test/npu-xrt/add_one_scale_func_link_with_peano/run.lit index a2ff6338849..ffb798dc7da 100644 --- a/test/npu-xrt/add_one_scale_func_link_with_peano/run.lit +++ b/test/npu-xrt/add_one_scale_func_link_with_peano/run.lit @@ -26,6 +26,6 @@ // RUN: %run_on_npu1% %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -O2 -c %S/scale_kernel.cc -o ./scale_kernel.o // RUN: %run_on_npu2% %PEANO_INSTALL_DIR/bin/clang --target=aie2p-none-unknown-elf -O2 -c %S/scale_kernel.cc -o ./scale_kernel.o // RUN: aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_two/run.lit b/test/npu-xrt/add_one_two/run.lit index c67a19c7b4b..eb09eec082b 100644 --- a/test/npu-xrt/add_one_two/run.lit +++ b/test/npu-xrt/add_one_two/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --xclbin-kernel-name=ADDONE --device-name=design1 --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: %python aiecc.py --xclbin-kernel-name=ADDTWO --device-name=design2 --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --xclbin-kernel-name=ADDONE --device-name=design1 --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --xclbin-kernel-name=ADDTWO --device-name=design2 --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x add_two.xclbin -i insts.bin // RUN: %run_on_npu2% ./test.exe -x add_two.xclbin -i insts.bin diff --git a/test/npu-xrt/add_one_two_runlist/run.lit b/test/npu-xrt/add_one_two_runlist/run.lit index f8710e6c13f..97b2293eabf 100644 --- a/test/npu-xrt/add_one_two_runlist/run.lit +++ b/test/npu-xrt/add_one_two_runlist/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --device-name=aie_add_1 --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: %python aiecc.py --device-name=aie_add_2 --xclbin-kernel-name=ADDTWO --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --device-name=aie_add_1 --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --device-name=aie_add_2 --xclbin-kernel-name=ADDTWO --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x add_two.xclbin -i insts.bin // RUN: %run_on_npu2% ./test.exe -x add_two.xclbin -i insts.bin diff --git a/test/npu-xrt/add_one_two_txn/run.lit b/test/npu-xrt/add_one_two_txn/run.lit index ad89272a021..5427e4f0174 100644 --- a/test/npu-xrt/add_one_two_txn/run.lit +++ b/test/npu-xrt/add_one_two_txn/run.lit @@ -6,9 +6,9 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -// RUN: %python aiecc.py --tmpdir=project1 --device-name=add_one --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=add_one_insts.bin aie_arch.mlir -// RUN: %python aiecc.py --tmpdir=project2 --device-name=add_two --aie-generate-txn --txn-name=transaction.mlir --aie-generate-npu-insts --no-compile-host --npu-insts-name=add_two_insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --tmpdir=project1 --device-name=add_one --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=add_one_insts.bin aie_arch.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --tmpdir=project2 --device-name=add_two --aie-generate-txn --txn-name=transaction.mlir --aie-generate-npu-insts --no-compile-host --npu-insts-name=add_two_insts.bin aie_arch.mlir // RUN: aie-translate --aie-device-name=add_two -aie-npu-to-binary -aie-sequence-name=configure transaction.mlir -o add_two_cfg.bin // RUN: %run_on_npu1% ./test.exe -x add_one.xclbin --instr0 add_one_insts.bin -c add_two_cfg.bin --instr1 add_two_insts.bin // RUN: %run_on_npu2% ./test.exe -x add_one.xclbin --instr0 add_one_insts.bin -c add_two_cfg.bin --instr1 add_two_insts.bin diff --git a/test/npu-xrt/add_one_using_dma/run.lit b/test/npu-xrt/add_one_using_dma/run.lit index c03cd8bf30e..d38da60330a 100644 --- a/test/npu-xrt/add_one_using_dma/run.lit +++ b/test/npu-xrt/add_one_using_dma/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py b/test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py index bacc65954f7..b21464de06c 100644 --- a/test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py +++ b/test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py @@ -6,11 +6,11 @@ # # (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates -# REQUIRES: ryzen_ai +# REQUIRES: ryzen_ai_npu1 # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin import numpy as np import sys diff --git a/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py b/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py index c7c93aa7114..ae0e889b514 100644 --- a/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py +++ b/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py @@ -6,11 +6,11 @@ # # (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates -# REQUIRES: ryzen_ai +# REQUIRES: ryzen_ai_npu1 # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin import numpy as np import sys diff --git a/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_2memtile/ext_to_core_L2_placed.py b/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_2memtile/ext_to_core_L2_placed.py index 9321f57a9ed..f9240e571df 100644 --- a/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_2memtile/ext_to_core_L2_placed.py +++ b/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_2memtile/ext_to_core_L2_placed.py @@ -7,8 +7,8 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # RUN: %python %S/ext_to_core_L2_placed.py npu > ./aie.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %python aiecc.py --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_3memtile/ext_to_core_L2_placed.py b/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_3memtile/ext_to_core_L2_placed.py index 5074e8a7c5c..d104bbd14a9 100644 --- a/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_3memtile/ext_to_core_L2_placed.py +++ b/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_3memtile/ext_to_core_L2_placed.py @@ -7,8 +7,8 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # RUN: %python %S/ext_to_core_L2_placed.py npu > ./aie.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %python aiecc.py --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/adjacent_memtile_allocation/twofifo_one_2memtile/ext_to_core_L2_placed.py b/test/npu-xrt/adjacent_memtile_allocation/twofifo_one_2memtile/ext_to_core_L2_placed.py index 283222bdb48..b5aaba1db16 100644 --- a/test/npu-xrt/adjacent_memtile_allocation/twofifo_one_2memtile/ext_to_core_L2_placed.py +++ b/test/npu-xrt/adjacent_memtile_allocation/twofifo_one_2memtile/ext_to_core_L2_placed.py @@ -7,8 +7,8 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # RUN: %python %S/ext_to_core_L2_placed.py npu > ./aie.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %python aiecc.py --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/bd_chain_repeat_on_memtile/aie2.py b/test/npu-xrt/bd_chain_repeat_on_memtile/aie2.py index 9208cbbd92d..5988adcec3e 100644 --- a/test/npu-xrt/bd_chain_repeat_on_memtile/aie2.py +++ b/test/npu-xrt/bd_chain_repeat_on_memtile/aie2.py @@ -9,8 +9,8 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.cc.o # RUN: %python %S/aie2.py npu > ./aie.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %python aiecc.py --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/cascade_flows/run.lit b/test/npu-xrt/cascade_flows/run.lit index b090e62a1a9..868e717fb8b 100644 --- a/test/npu-xrt/cascade_flows/run.lit +++ b/test/npu-xrt/cascade_flows/run.lit @@ -6,6 +6,6 @@ // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel1.cc -o ./kernel1.o // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel2.cc -o ./kernel2.o // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel3.cc -o ./kernel3.o -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/column_specific/aie2.py b/test/npu-xrt/column_specific/aie2.py index 92b384c5e49..372d1be7904 100644 --- a/test/npu-xrt/column_specific/aie2.py +++ b/test/npu-xrt/column_specific/aie2.py @@ -6,11 +6,11 @@ # # (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates # -# REQUIRES: ryzen_ai, valid_xchess_license +# REQUIRES: ryzen_ai_npu1, valid_xchess_license # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/core_dmas/dma_configure_task_lock/run.lit b/test/npu-xrt/core_dmas/dma_configure_task_lock/run.lit index 636d68ef3e4..8a2a0551217 100644 --- a/test/npu-xrt/core_dmas/dma_configure_task_lock/run.lit +++ b/test/npu-xrt/core_dmas/dma_configure_task_lock/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/core_dmas/dma_configure_task_token/run.lit b/test/npu-xrt/core_dmas/dma_configure_task_token/run.lit index 636d68ef3e4..8a2a0551217 100644 --- a/test/npu-xrt/core_dmas/dma_configure_task_token/run.lit +++ b/test/npu-xrt/core_dmas/dma_configure_task_token/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/ctrl_packet_reconfig/run.lit b/test/npu-xrt/ctrl_packet_reconfig/run.lit index 1a2df37e87b..dea4da33b27 100644 --- a/test/npu-xrt/ctrl_packet_reconfig/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig/run.lit @@ -9,10 +9,10 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // // RUN: aie-opt -aie-generate-column-control-overlay="route-shim-to-tile-ctrl=true" aie_arch.mlir -o aie_overlay.mlir -// RUN: %python aiecc.py --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir -// RUN: %python aiecc.py --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir // -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // // RUN: %run_on_npu1% ./test.exe // RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit b/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit index 90f6ffaa131..8be44600b67 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit @@ -9,9 +9,9 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // // RUN: aie-opt -aie-generate-column-control-overlay="route-shim-to-tile-ctrl=true" aie_arch.mlir -o aie_overlay.mlir -// RUN: %python aiecc.py --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir -// RUN: %python aiecc.py --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir // -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe // RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit b/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit index 970ced95893..efaca9f46fc 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit @@ -9,9 +9,9 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2/g' -i aie_arch.mlir // // RUN: aie-opt -aie-generate-column-control-overlay="route-shim-to-tile-ctrl=true" aie_arch.mlir -o aie_overlay.mlir -// RUN: %python aiecc.py --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir -// RUN: %python aiecc.py --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir // -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe // RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/ctrl_packet_reconfig_elf/run.lit b/test/npu-xrt/ctrl_packet_reconfig_elf/run.lit index 48bbc83341c..78559b20aa7 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_elf/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig_elf/run.lit @@ -9,9 +9,9 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // // RUN: aie-opt -aie-generate-column-control-overlay="route-shim-to-tile-ctrl=true" aie_arch.mlir -o aie_overlay.mlir -// RUN: %python aiecc.py --tmpdir=project1 --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir -// RUN: %python aiecc.py --tmpdir=project2 --device-name=main --aie-generate-ctrlpkt --aie-generate-elf --elf-name=aie.elf aie_overlay.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --tmpdir=project1 --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir +// RUN: %python aiecc.py %aiecc_backend_flags --tmpdir=project2 --device-name=main --aie-generate-ctrlpkt --aie-generate-elf --elf-name=aie.elf aie_overlay.mlir // -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe // RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/device_width/aie2.py b/test/npu-xrt/device_width/aie2.py index cbe5d3d208b..c8bfbf33f4b 100644 --- a/test/npu-xrt/device_width/aie2.py +++ b/test/npu-xrt/device_width/aie2.py @@ -9,8 +9,8 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/dma_complex_dims/aie2.py b/test/npu-xrt/dma_complex_dims/aie2.py index 9774420af9a..08caf1e6926 100644 --- a/test/npu-xrt/dma_complex_dims/aie2.py +++ b/test/npu-xrt/dma_complex_dims/aie2.py @@ -10,7 +10,7 @@ # # RUN: %python %S/aie2.py 8 5 20 4 5 > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -m 8 --tile-k 5 -K 20 -r 4 -s 5 import argparse import numpy as np diff --git a/test/npu-xrt/dma_task_large_linear/aie2.py b/test/npu-xrt/dma_task_large_linear/aie2.py index 90e7e1d1f82..28440b7c10e 100644 --- a/test/npu-xrt/dma_task_large_linear/aie2.py +++ b/test/npu-xrt/dma_task_large_linear/aie2.py @@ -9,8 +9,8 @@ # # RUN: %python %S/aie2.py > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %run_on_npu1% ./test +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %run_on_npu1% ./test.exe import numpy as np from aie.extras.context import mlir_mod_ctx diff --git a/test/npu-xrt/dmabd_task_queue/run.lit b/test/npu-xrt/dmabd_task_queue/run.lit index ce93096e09e..35066e6647e 100644 --- a/test/npu-xrt/dmabd_task_queue/run.lit +++ b/test/npu-xrt/dmabd_task_queue/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_4col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/dmabd_task_queue/test.cpp b/test/npu-xrt/dmabd_task_queue/test.cpp index ce807adf2c3..8d2f2fed51a 100644 --- a/test/npu-xrt/dmabd_task_queue/test.cpp +++ b/test/npu-xrt/dmabd_task_queue/test.cpp @@ -8,8 +8,11 @@ // //===----------------------------------------------------------------------===// -#include #include +#include +#include +#include +#include #include #include #include @@ -17,7 +20,6 @@ #include #include #include -#include #include "cxxopts.hpp" #include "test_utils.h" diff --git a/test/npu-xrt/dynamic_object_fifo/nested_loops/aie2.py b/test/npu-xrt/dynamic_object_fifo/nested_loops/aie2.py index 9bdd0d92c2f..a77d2bedcea 100644 --- a/test/npu-xrt/dynamic_object_fifo/nested_loops/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/nested_loops/aie2.py @@ -9,8 +9,8 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/dynamic_object_fifo/ping_pong/aie2.py b/test/npu-xrt/dynamic_object_fifo/ping_pong/aie2.py index 414119973a7..27421c0d260 100644 --- a/test/npu-xrt/dynamic_object_fifo/ping_pong/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/ping_pong/aie2.py @@ -9,8 +9,8 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np import sys diff --git a/test/npu-xrt/dynamic_object_fifo/reduction/aie2.py b/test/npu-xrt/dynamic_object_fifo/reduction/aie2.py index 830ba3a3fa9..639d24c1a91 100644 --- a/test/npu-xrt/dynamic_object_fifo/reduction/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/reduction/aie2.py @@ -9,8 +9,8 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np import sys diff --git a/test/npu-xrt/dynamic_object_fifo/sliding_window/aie2.py b/test/npu-xrt/dynamic_object_fifo/sliding_window/aie2.py index f6d001b8007..1e4f432ab85 100644 --- a/test/npu-xrt/dynamic_object_fifo/sliding_window/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/sliding_window/aie2.py @@ -9,8 +9,8 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe from aie.dialects.aie import * diff --git a/test/npu-xrt/dynamic_object_fifo/sliding_window_conditional/aie2.py b/test/npu-xrt/dynamic_object_fifo/sliding_window_conditional/aie2.py index 705cd8a08ae..e9579c43b79 100644 --- a/test/npu-xrt/dynamic_object_fifo/sliding_window_conditional/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/sliding_window_conditional/aie2.py @@ -5,12 +5,12 @@ # # (c) Copyright 2025 AMD Inc. -# REQUIRES: ryzen_ai, valid_xchess_license +# REQUIRES: ryzen_ai_npu1, valid_xchess_license # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/dynamic_object_fifo/two_core_sliding_window/aie2.py b/test/npu-xrt/dynamic_object_fifo/two_core_sliding_window/aie2.py index e2c9981d7a5..67062177845 100644 --- a/test/npu-xrt/dynamic_object_fifo/two_core_sliding_window/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/two_core_sliding_window/aie2.py @@ -9,8 +9,8 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/lit.local.cfg b/test/npu-xrt/lit.local.cfg index d05972e2a31..32e9acf7be9 100644 --- a/test/npu-xrt/lit.local.cfg +++ b/test/npu-xrt/lit.local.cfg @@ -6,7 +6,9 @@ config.suffixes = [".lit", ".py"] -if 'AIE2' not in config.vitis_components and 'AIE2P' not in config.vitis_components: +# Gate on lit features rather than vitis_components to enable Peano. +backend_features = {"aietools_aie2", "aietools_aie2p", "peano"} +if not backend_features.intersection(set(config.available_features)): config.unsupported = True config.excludes.add("util.py") diff --git a/test/npu-xrt/loadpdi/run.lit b/test/npu-xrt/loadpdi/run.lit index 4bd3f0372b4..ea2a7aecc8e 100644 --- a/test/npu-xrt/loadpdi/run.lit +++ b/test/npu-xrt/loadpdi/run.lit @@ -4,5 +4,5 @@ // REQUIRES: ryzen_ai_npu2, peano // // RUN: %PYTHON aiecc.py -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir -// RUN: clang -o test %S/test_elf.cpp -std=c++17 -lstdc++ %xrt_flags -// RUN: ./test +// RUN: %host_clang -o test.exe %S/test_elf.cpp -std=c++17 %host_link_flags %xrt_flags +// RUN: ./test.exe diff --git a/test/npu-xrt/matrix_multiplication_using_cascade/run.lit b/test/npu-xrt/matrix_multiplication_using_cascade/run.lit index c5454931ab0..5d980e8a951 100644 --- a/test/npu-xrt/matrix_multiplication_using_cascade/run.lit +++ b/test/npu-xrt/matrix_multiplication_using_cascade/run.lit @@ -4,7 +4,7 @@ // REQUIRES: ryzen_ai_npu1, chess // // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/mm.cc -o ./mm.o -// RUN: g++-13 %S/test.cpp -o test.exe -std=c++23 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: g++-13 %S/test.cpp -o test.exe -std=c++23 -Wall %xrt_flags %host_link_flags %test_utils_flags // // RUN: %python aiecc.py --xchesscc --xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie2_plain.xclbin --npu-insts-name=insts2_plain.txt %S/aie_plainx4.mlir // RUN: %run_on_npu1% ./test.exe -x aie2_plain.xclbin -k MLIR_AIE -i insts2_plain.txt --trace_sz 32768 diff --git a/test/npu-xrt/matrix_transpose/aie2.py b/test/npu-xrt/matrix_transpose/aie2.py index aedc4a614dc..280a748ee95 100644 --- a/test/npu-xrt/matrix_transpose/aie2.py +++ b/test/npu-xrt/matrix_transpose/aie2.py @@ -9,9 +9,9 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %run_on_npu1% ./test +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %run_on_npu1% ./test.exe import numpy as np from aie.extras.context import mlir_mod_ctx diff --git a/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit b/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit index ef349d525a1..3f33c71fd9f 100644 --- a/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit +++ b/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/memtile_dmas/dma_configure_task_lock/run.lit b/test/npu-xrt/memtile_dmas/dma_configure_task_lock/run.lit index 636d68ef3e4..8a2a0551217 100644 --- a/test/npu-xrt/memtile_dmas/dma_configure_task_lock/run.lit +++ b/test/npu-xrt/memtile_dmas/dma_configure_task_lock/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/memtile_dmas/dma_configure_task_token/run.lit b/test/npu-xrt/memtile_dmas/dma_configure_task_token/run.lit index 636d68ef3e4..8a2a0551217 100644 --- a/test/npu-xrt/memtile_dmas/dma_configure_task_token/run.lit +++ b/test/npu-xrt/memtile_dmas/dma_configure_task_token/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/memtile_dmas/writebd/run.lit b/test/npu-xrt/memtile_dmas/writebd/run.lit index ef349d525a1..3f33c71fd9f 100644 --- a/test/npu-xrt/memtile_dmas/writebd/run.lit +++ b/test/npu-xrt/memtile_dmas/writebd/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit b/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit index ef349d525a1..3f33c71fd9f 100644 --- a/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit +++ b/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/nd_memcpy_linear_repeat/aie2.py b/test/npu-xrt/nd_memcpy_linear_repeat/aie2.py index 50ed82ab89a..1629e30457d 100644 --- a/test/npu-xrt/nd_memcpy_linear_repeat/aie2.py +++ b/test/npu-xrt/nd_memcpy_linear_repeat/aie2.py @@ -5,11 +5,11 @@ # # (c) Copyright 2024 AMD Inc. -# REQUIRES: ryzen_ai, valid_xchess_license +# REQUIRES: ryzen_ai_npu1, valid_xchess_license # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/nd_memcpy_transforms/aie2.py b/test/npu-xrt/nd_memcpy_transforms/aie2.py index 4c7e14142d8..99ab54947ec 100644 --- a/test/npu-xrt/nd_memcpy_transforms/aie2.py +++ b/test/npu-xrt/nd_memcpy_transforms/aie2.py @@ -5,13 +5,13 @@ # # (c) Copyright 2024 AMD Inc. -# REQUIRES: ryzen_ai, valid_xchess_license +# REQUIRES: ryzen_ai_npu1, valid_xchess_license # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %run_on_npu1% ./test +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %run_on_npu1% ./test.exe import numpy as np from aie.extras.context import mlir_mod_ctx diff --git a/test/npu-xrt/neighbor_tile_memory_access/aie2.py b/test/npu-xrt/neighbor_tile_memory_access/aie2.py index d7263f9c1ad..420f5f24f86 100644 --- a/test/npu-xrt/neighbor_tile_memory_access/aie2.py +++ b/test/npu-xrt/neighbor_tile_memory_access/aie2.py @@ -7,11 +7,11 @@ # (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates # Adapted from vector_scalar_add/aie2.py but with link between ComputeTiles -# REQUIRES: ryzen_ai, chess +# REQUIRES: ryzen_ai_npu1, chess # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin import numpy as np import sys diff --git a/test/npu-xrt/objectfifo_repeat/compute_repeat/aie2.py b/test/npu-xrt/objectfifo_repeat/compute_repeat/aie2.py index 0e7bab2ff28..45d214a81ef 100644 --- a/test/npu-xrt/objectfifo_repeat/compute_repeat/aie2.py +++ b/test/npu-xrt/objectfifo_repeat/compute_repeat/aie2.py @@ -10,7 +10,7 @@ # # RUN: %python %S/aie2.py 4096 > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -l 4096 import numpy as np import sys diff --git a/test/npu-xrt/objectfifo_repeat/distribute_repeat/aie2.py b/test/npu-xrt/objectfifo_repeat/distribute_repeat/aie2.py index e54d18dd06d..94d1ec9429c 100644 --- a/test/npu-xrt/objectfifo_repeat/distribute_repeat/aie2.py +++ b/test/npu-xrt/objectfifo_repeat/distribute_repeat/aie2.py @@ -11,7 +11,7 @@ # # RUN: %python %S/aie2.py 36 > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -l 36 import numpy as np import sys diff --git a/test/npu-xrt/objectfifo_repeat/init_values_repeat/aie2.py b/test/npu-xrt/objectfifo_repeat/init_values_repeat/aie2.py index 197044e14b2..c0954931d9d 100644 --- a/test/npu-xrt/objectfifo_repeat/init_values_repeat/aie2.py +++ b/test/npu-xrt/objectfifo_repeat/init_values_repeat/aie2.py @@ -10,7 +10,7 @@ # # RUN: %python %S/aie2.py 4096 > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -l 4096 import numpy as np import sys diff --git a/test/npu-xrt/objectfifo_repeat/simple_repeat/aie2.py b/test/npu-xrt/objectfifo_repeat/simple_repeat/aie2.py index 7e9268dd851..15dde2b57cf 100644 --- a/test/npu-xrt/objectfifo_repeat/simple_repeat/aie2.py +++ b/test/npu-xrt/objectfifo_repeat/simple_repeat/aie2.py @@ -9,8 +9,8 @@ # REQUIRES: ryzen_ai_npu1, peano # # RUN: %python %S/aie2.py 4096 > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --no-xchesscc --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -l 4096 import numpy as np import sys diff --git a/test/npu-xrt/packet_flow/run.lit b/test/npu-xrt/packet_flow/run.lit index c7886504bd0..7000daca40f 100644 --- a/test/npu-xrt/packet_flow/run.lit +++ b/test/npu-xrt/packet_flow/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/packet_flow_fanin/run.lit b/test/npu-xrt/packet_flow_fanin/run.lit index c7886504bd0..7000daca40f 100644 --- a/test/npu-xrt/packet_flow_fanin/run.lit +++ b/test/npu-xrt/packet_flow_fanin/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/packet_flow_fanout/run.lit b/test/npu-xrt/packet_flow_fanout/run.lit index c7886504bd0..7000daca40f 100644 --- a/test/npu-xrt/packet_flow_fanout/run.lit +++ b/test/npu-xrt/packet_flow_fanout/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/reconfigure_loadpdi/run_loadpdi.lit b/test/npu-xrt/reconfigure_loadpdi/run_loadpdi.lit index 064f6b987f9..e4e47ca68ec 100644 --- a/test/npu-xrt/reconfigure_loadpdi/run_loadpdi.lit +++ b/test/npu-xrt/reconfigure_loadpdi/run_loadpdi.lit @@ -4,5 +4,5 @@ // REQUIRES: ryzen_ai_npu2, peano // // RUN: %PYTHON aiecc.py -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir -// RUN: clang -o test %S/test.cpp -std=c++17 -lstdc++ %xrt_flags -// RUN: %run_on_npu2% ./test +// RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags +// RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/reconfigure_loadpdi/run_write32s.lit b/test/npu-xrt/reconfigure_loadpdi/run_write32s.lit index 1ee87787843..8e91f08a5b3 100644 --- a/test/npu-xrt/reconfigure_loadpdi/run_write32s.lit +++ b/test/npu-xrt/reconfigure_loadpdi/run_write32s.lit @@ -4,5 +4,5 @@ // REQUIRES: ryzen_ai_npu2, peano // // RUN: %PYTHON aiecc.py -v --generate-full-elf --expand-load-pdis --no-xchesscc --no-xbridge %S/aie.mlir -// RUN: clang -o test %S/test.cpp -std=c++17 -lstdc++ %xrt_flags -// RUN: ./test +// RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags +// RUN: ./test.exe diff --git a/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_loadpdi.lit b/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_loadpdi.lit index 064f6b987f9..e4e47ca68ec 100644 --- a/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_loadpdi.lit +++ b/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_loadpdi.lit @@ -4,5 +4,5 @@ // REQUIRES: ryzen_ai_npu2, peano // // RUN: %PYTHON aiecc.py -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir -// RUN: clang -o test %S/test.cpp -std=c++17 -lstdc++ %xrt_flags -// RUN: %run_on_npu2% ./test +// RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags +// RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_write32s.lit b/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_write32s.lit index 20bb6864867..c32006d6961 100644 --- a/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_write32s.lit +++ b/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_write32s.lit @@ -4,5 +4,5 @@ // REQUIRES: ryzen_ai_npu2, peano // // RUN: %PYTHON aiecc.py -v --generate-full-elf --expand-load-pdis --no-xchesscc --no-xbridge %S/aie.mlir -// RUN: clang -o test %S/test.cpp -std=c++17 -lstdc++ %xrt_flags -// RUN: %run_on_npu2% ./test +// RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags +// RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/runtime_cumsum/run.lit b/test/npu-xrt/runtime_cumsum/run.lit index cf1023eacd3..f71d97843a7 100644 --- a/test/npu-xrt/runtime_cumsum/run.lit +++ b/test/npu-xrt/runtime_cumsum/run.lit @@ -5,5 +5,5 @@ // // RUN: xchesscc_wrapper aie2 -I %aietools/include -DBIT_WIDTH=8 -c %S/sum.cc -o ./sum.o // RUN: %python aiecc.py --xchesscc --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/shim_dma_bd_reuse/run.lit b/test/npu-xrt/shim_dma_bd_reuse/run.lit index 636d68ef3e4..8a2a0551217 100644 --- a/test/npu-xrt/shim_dma_bd_reuse/run.lit +++ b/test/npu-xrt/shim_dma_bd_reuse/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/static_L1_init/run.lit b/test/npu-xrt/static_L1_init/run.lit index aca3740cc1d..5494bc39712 100644 --- a/test/npu-xrt/static_L1_init/run.lit +++ b/test/npu-xrt/static_L1_init/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/sync_task_complete_token/aie2.py b/test/npu-xrt/sync_task_complete_token/aie2.py index 8ef7f71e0f8..aa2789b5ac6 100644 --- a/test/npu-xrt/sync_task_complete_token/aie2.py +++ b/test/npu-xrt/sync_task_complete_token/aie2.py @@ -5,12 +5,12 @@ # # (c) Copyright 2024 AMD Inc. -# REQUIRES: ryzen_ai +# REQUIRES: ryzen_ai_npu1 # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %run_on_npu1% ./test +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %run_on_npu1% ./test.exe from aie.extras.context import mlir_mod_ctx diff --git a/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py b/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py index 81c7228e2da..33b246c419e 100644 --- a/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py +++ b/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py @@ -5,12 +5,12 @@ # # (c) Copyright 2024 AMD Inc. -# REQUIRES: ryzen_ai +# REQUIRES: ryzen_ai_npu1 # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags -# RUN: %run_on_npu1% ./test +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags +# RUN: %run_on_npu1% ./test.exe from aie.extras.context import mlir_mod_ctx diff --git a/test/npu-xrt/tile_dmas/blockwrite_using_locks/run.lit b/test/npu-xrt/tile_dmas/blockwrite_using_locks/run.lit index ef349d525a1..3f33c71fd9f 100644 --- a/test/npu-xrt/tile_dmas/blockwrite_using_locks/run.lit +++ b/test/npu-xrt/tile_dmas/blockwrite_using_locks/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/tile_dmas/writebd/run.lit b/test/npu-xrt/tile_dmas/writebd/run.lit index ef349d525a1..3f33c71fd9f 100644 --- a/test/npu-xrt/tile_dmas/writebd/run.lit +++ b/test/npu-xrt/tile_dmas/writebd/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/tile_dmas/writebd_tokens/run.lit b/test/npu-xrt/tile_dmas/writebd_tokens/run.lit index ef349d525a1..3f33c71fd9f 100644 --- a/test/npu-xrt/tile_dmas/writebd_tokens/run.lit +++ b/test/npu-xrt/tile_dmas/writebd_tokens/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/tile_mapped_read/run.lit b/test/npu-xrt/tile_mapped_read/run.lit index b22f7735968..2b8296842dc 100644 --- a/test/npu-xrt/tile_mapped_read/run.lit +++ b/test/npu-xrt/tile_mapped_read/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai_npu1, chess // // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cpp -o kernel.o -// RUN: %python aiecc.py --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/two_col/run.lit b/test/npu-xrt/two_col/run.lit index bd50bf43885..76506dfa84e 100644 --- a/test/npu-xrt/two_col/run.lit +++ b/test/npu-xrt/two_col/run.lit @@ -5,5 +5,5 @@ // // RUN: xchesscc_wrapper aie2 -I %aietools/include -DBIT_WIDTH=8 -c %S/threshold.cc -o ./threshold.o // RUN: %python aiecc.py --xchesscc --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/vec_mul_event_trace/test.py b/test/npu-xrt/vec_mul_event_trace/test.py index cc99609e9ce..6b2f5388bab 100644 --- a/test/npu-xrt/vec_mul_event_trace/test.py +++ b/test/npu-xrt/vec_mul_event_trace/test.py @@ -9,12 +9,12 @@ # # ===-----------------------------------------------------------------------===# # -# REQUIRES: ryzen_ai_npu2, xrt_python_bindings +# REQUIRES: ryzen_ai_npu2, xrt_python_bindings, chess # # Build the test # RUN: xchesscc_wrapper aie2p -I %aietools/include -c %S/vector_scalar_mul.cc -o vector_scalar_mul.o -# RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin %S/aie.mlir +# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin %S/aie.mlir # Run the test (input_with_addresses.mlir contains the lowered npu_write ops) # RUN: %run_on_npu2% %python %S/test.py --xclbin final.xclbin --instr insts.bin --kernel MLIR_AIE --trace-sz 8192 --mlir aie.mlir.prj/input_with_addresses.mlir | FileCheck %s diff --git a/test/npu-xrt/vec_mul_trace_distribute_lateral/test.py b/test/npu-xrt/vec_mul_trace_distribute_lateral/test.py index f0299e066bf..e9eb365a45e 100644 --- a/test/npu-xrt/vec_mul_trace_distribute_lateral/test.py +++ b/test/npu-xrt/vec_mul_trace_distribute_lateral/test.py @@ -19,7 +19,7 @@ # With lateral-routing, both channels are routed to column 1's shim # (the spare column), keeping trace traffic off the active data path. # -# REQUIRES: ryzen_ai_npu1, xrt_python_bindings +# REQUIRES: ryzen_ai_npu1, xrt_python_bindings, peano # # Compile kernel with Peano (aie2 target for Phoenix/NPU1): # RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -O2 -c %S/vector_scalar_mul.cc -o vector_scalar_mul.o diff --git a/test/npu-xrt/vec_vec_add_memtile_init/run.lit b/test/npu-xrt/vec_vec_add_memtile_init/run.lit index 8a76582914f..23ebbaceb54 100644 --- a/test/npu-xrt/vec_vec_add_memtile_init/run.lit +++ b/test/npu-xrt/vec_vec_add_memtile_init/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/vec_vec_add_objfifo_init/aie2.py b/test/npu-xrt/vec_vec_add_objfifo_init/aie2.py index e0bee9a83d5..056ed79cd00 100644 --- a/test/npu-xrt/vec_vec_add_objfifo_init/aie2.py +++ b/test/npu-xrt/vec_vec_add_objfifo_init/aie2.py @@ -10,7 +10,7 @@ # # RUN: %python %S/aie2.py npu 0 > ./aie2.mlir # RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --no-xchesscc --no-xbridge --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir -# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +# RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin import numpy as np import sys diff --git a/test/npu-xrt/vec_vec_add_tile_init/run.lit b/test/npu-xrt/vec_vec_add_tile_init/run.lit index aca3740cc1d..5494bc39712 100644 --- a/test/npu-xrt/vec_vec_add_tile_init/run.lit +++ b/test/npu-xrt/vec_vec_add_tile_init/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/vector_scalar_using_dma/run.lit b/test/npu-xrt/vector_scalar_using_dma/run.lit index 9724bf5fe66..b93e0faf99b 100644 --- a/test/npu-xrt/vector_scalar_using_dma/run.lit +++ b/test/npu-xrt/vector_scalar_using_dma/run.lit @@ -5,5 +5,5 @@ // // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/scale.cc -o ./scale.o // RUN: %python aiecc.py --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir -// RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags +// RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/parse-trace/test1/aie_test1.mlir b/test/parse-trace/test1/aie_test1.mlir index ae2ffe8acef..12b559ef6b9 100644 --- a/test/parse-trace/test1/aie_test1.mlir +++ b/test/parse-trace/test1/aie_test1.mlir @@ -1,11 +1,9 @@ // (c) Copyright 2023 Advanced Micro Devices, Inc. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// RUN: mkdir -p test -// RUN: cd test -// RUN: make -f %S/Makefile clean -// RUN: make -f %S/Makefile -// RUN: make -f %S/Makefile diff +// RUN: %python %S/../../../python/utils/trace/parse.py --input %S/trace_test1.txt --mlir %s --output %t.json +// RUN: %python %S/../../../python/utils/trace/get_trace_summary.py --input %t.json +// RUN: %python -c "import difflib,pathlib,sys; actual=pathlib.Path(r'%t.json').read_text(encoding='utf-8').splitlines(); expected_path=pathlib.Path(r'%S/golden_json.txt'); expected=expected_path.read_text(encoding='utf-8').splitlines(); ok=(actual==expected); sys.stdout.write('\n'.join(difflib.unified_diff(expected, actual, fromfile=str(expected_path), tofile=r'%t.json', lineterm='')) + ('\n' if not ok else '')); raise SystemExit(0 if ok else 1)" module { aie.device(npu1_1col) { diff --git a/test/parse-trace/test2/aie_test2.mlir b/test/parse-trace/test2/aie_test2.mlir index c6221fe58a9..f1ad95808f2 100644 --- a/test/parse-trace/test2/aie_test2.mlir +++ b/test/parse-trace/test2/aie_test2.mlir @@ -1,11 +1,9 @@ // (c) Copyright 2023 Advanced Micro Devices, Inc. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// RUN: mkdir -p test -// RUN: cd test -// RUN: make -f %S/Makefile clean -// RUN: make -f %S/Makefile -// RUN: make -f %S/Makefile diff +// RUN: %python %S/../../../python/utils/trace/parse.py --input %S/trace_test2.txt --mlir %s --output %t.json +// RUN: %python %S/../../../python/utils/trace/get_trace_summary.py --input %t.json +// RUN: %python -c "import difflib,pathlib,sys; actual=pathlib.Path(r'%t.json').read_text(encoding='utf-8').splitlines(); expected_path=pathlib.Path(r'%S/golden_json.txt'); expected=expected_path.read_text(encoding='utf-8').splitlines(); ok=(actual==expected); sys.stdout.write('\n'.join(difflib.unified_diff(expected, actual, fromfile=str(expected_path), tofile=r'%t.json', lineterm='')) + ('\n' if not ok else '')); raise SystemExit(0 if ok else 1)" module { aie.device(npu1_1col) { From 4ccf15e1b28425b374749a33c3ea70d5569cfc6c Mon Sep 17 00:00:00 2001 From: thomthehound Date: Fri, 15 May 2026 16:40:22 -0400 Subject: [PATCH 2/5] formatting Signed-off-by: thomthehound --- python/aie_lit_utils/lit_config_helpers.py | 4 +--- test/lit.cfg.py | 4 +--- test/npu-xrt/dmabd_task_queue/test.cpp | 8 ++++---- 3 files changed, 6 insertions(+), 10 deletions(-) diff --git a/python/aie_lit_utils/lit_config_helpers.py b/python/aie_lit_utils/lit_config_helpers.py index adfcd98d26e..e80cef4506f 100644 --- a/python/aie_lit_utils/lit_config_helpers.py +++ b/python/aie_lit_utils/lit_config_helpers.py @@ -380,9 +380,7 @@ def detect_xrt( "Running tests on NPU1 with command line: %s", run_on_npu1 ) else: - logger.warning( - "NPU1 detected but no AIE2 backend is available" - ) + logger.warning("NPU1 detected but no AIE2 backend is available") elif any( known in model for known in LitConfigHelper.NPU_MODELS["npu2"] ): diff --git a/test/lit.cfg.py b/test/lit.cfg.py index 7c9d612f527..03a15c29796 100644 --- a/test/lit.cfg.py +++ b/test/lit.cfg.py @@ -72,9 +72,7 @@ host_clang = os.path.join(config.llvm_tools_dir, f"clang{config.llvm_exe_ext}") if not os.path.exists(host_clang): host_clang = shutil.which("clang") or "clang" -config.substitutions.append( - ("%host_clang", LitConfigHelper._quote_lit_arg(host_clang)) -) +config.substitutions.append(("%host_clang", LitConfigHelper._quote_lit_arg(host_clang))) # Detect Peano before XRT feature gating for systems without Chess/AIETOOLS. diff --git a/test/npu-xrt/dmabd_task_queue/test.cpp b/test/npu-xrt/dmabd_task_queue/test.cpp index 8d2f2fed51a..575ae31a48f 100644 --- a/test/npu-xrt/dmabd_task_queue/test.cpp +++ b/test/npu-xrt/dmabd_task_queue/test.cpp @@ -8,18 +8,18 @@ // //===----------------------------------------------------------------------===// -#include #include -#include -#include -#include +#include #include #include +#include #include #include #include #include #include +#include +#include #include "cxxopts.hpp" #include "test_utils.h" From f2a47d17798ae3dbc7f5a832a4a42ef61c3d3ea0 Mon Sep 17 00:00:00 2001 From: thomthehound Date: Fri, 15 May 2026 20:06:53 -0400 Subject: [PATCH 3/5] centralize tool subs Signed-off-by: thomthehound --- mlir_exercises/CMakeLists.txt | 1 + mlir_exercises/lit.cfg.py | 14 +++ programming_examples/CMakeLists.txt | 1 + programming_examples/lit.cfg.py | 8 ++ programming_guide/CMakeLists.txt | 3 +- programming_guide/lit.cfg.py | 21 +++++ python/aie_lit_utils/lit_config_helpers.py | 93 ++++++++++++++++++- test/CMakeLists.txt | 1 + test/lit.cfg.py | 52 +---------- .../run.lit | 2 +- .../run.lit | 2 +- .../run.lit | 2 +- test/npu-xrt/add_314_using_dma_op/run.lit | 2 +- .../run.lit | 2 +- test/npu-xrt/add_blockwrite/run.lit | 2 +- test/npu-xrt/add_maskwrite/run.lit | 2 +- test/npu-xrt/add_one_cpp_aiecc/run.lit | 4 +- .../add_one_cpp_aiecc_xchesscc/run.lit | 2 +- test/npu-xrt/add_one_ctrl_packet/run.lit | 2 +- .../add_one_ctrl_packet_4_cores/run.lit | 2 +- .../add_one_ctrl_packet_col_overlay/run.lit | 2 +- .../add_one_func_link_with_chess/run.lit | 2 +- .../add_one_func_link_with_peano/run.lit | 2 +- test/npu-xrt/add_one_objFifo/run.lit | 2 +- test/npu-xrt/add_one_objFifo_elf/run.lit | 2 +- .../run.lit | 2 +- .../run.lit | 2 +- test/npu-xrt/add_one_two/run.lit | 4 +- test/npu-xrt/add_one_two_runlist/run.lit | 4 +- test/npu-xrt/add_one_two_txn/run.lit | 4 +- test/npu-xrt/add_one_using_dma/run.lit | 2 +- .../three_memtiles/aie2.py | 2 +- .../two_memtiles/aie2.py | 2 +- .../ext_to_core_L2_placed.py | 2 +- .../ext_to_core_L2_placed.py | 2 +- .../ext_to_core_L2_placed.py | 2 +- .../bd_chain_repeat_on_memtile/aie2.py | 2 +- test/npu-xrt/cascade_flows/run.lit | 2 +- test/npu-xrt/column_specific/aie2.py | 2 +- .../core_dmas/dma_configure_task_lock/run.lit | 2 +- .../dma_configure_task_token/run.lit | 2 +- test/npu-xrt/ctrl_packet_reconfig/run.lit | 4 +- .../ctrl_packet_reconfig_1x4_cores/run.lit | 4 +- .../ctrl_packet_reconfig_4x1_cores/run.lit | 4 +- test/npu-xrt/ctrl_packet_reconfig_elf/run.lit | 4 +- test/npu-xrt/device_width/aie2.py | 2 +- test/npu-xrt/dma_complex_dims/aie2.py | 2 +- test/npu-xrt/dma_task_large_linear/aie2.py | 2 +- test/npu-xrt/dmabd_task_queue/run.lit | 2 +- test/npu-xrt/dmabd_task_queue/test.cpp | 8 +- .../dynamic_object_fifo/nested_loops/aie2.py | 2 +- .../dynamic_object_fifo/ping_pong/aie2.py | 2 +- .../dynamic_object_fifo/reduction/aie2.py | 2 +- .../sliding_window/aie2.py | 2 +- .../sliding_window_conditional/aie2.py | 2 +- .../two_core_sliding_window/aie2.py | 2 +- test/npu-xrt/loadpdi/run.lit | 2 +- .../run.lit | 6 +- test/npu-xrt/matrix_transpose/aie2.py | 2 +- .../blockwrite_using_locks/run.lit | 2 +- .../dma_configure_task_lock/run.lit | 2 +- .../dma_configure_task_token/run.lit | 2 +- test/npu-xrt/memtile_dmas/writebd/run.lit | 2 +- .../memtile_dmas/writebd_tokens/run.lit | 2 +- test/npu-xrt/nd_memcpy_linear_repeat/aie2.py | 2 +- test/npu-xrt/nd_memcpy_transforms/aie2.py | 2 +- .../neighbor_tile_memory_access/aie2.py | 2 +- .../objectfifo_repeat/compute_repeat/aie2.py | 2 +- .../distribute_repeat/aie2.py | 2 +- .../init_values_repeat/aie2.py | 2 +- .../objectfifo_repeat/simple_repeat/aie2.py | 2 +- test/npu-xrt/packet_flow/run.lit | 2 +- test/npu-xrt/packet_flow_fanin/run.lit | 2 +- test/npu-xrt/packet_flow_fanout/run.lit | 2 +- .../reconfigure_loadpdi/run_loadpdi.lit | 2 +- .../reconfigure_loadpdi/run_write32s.lit | 2 +- .../run_loadpdi.lit | 2 +- .../run_write32s.lit | 2 +- test/npu-xrt/runtime_cumsum/run.lit | 2 +- test/npu-xrt/scratchpad_regwrite/run.lit | 6 +- test/npu-xrt/scratchpad_regwrite/test.cpp | 1 - test/npu-xrt/shim_dma_bd_reuse/run.lit | 2 +- test/npu-xrt/static_L1_init/run.lit | 2 +- test/npu-xrt/sync_task_complete_token/aie2.py | 2 +- .../aie2.py | 2 +- .../tile_dmas/blockwrite_using_locks/run.lit | 2 +- test/npu-xrt/tile_dmas/writebd/run.lit | 2 +- test/npu-xrt/tile_dmas/writebd_tokens/run.lit | 2 +- test/npu-xrt/tile_mapped_read/run.lit | 2 +- test/npu-xrt/two_col/run.lit | 2 +- test/npu-xrt/vec_mul_event_trace/test.py | 2 +- .../vec_mul_trace_distribute_lateral/test.py | 2 +- test/npu-xrt/vec_vec_add_memtile_init/run.lit | 2 +- test/npu-xrt/vec_vec_add_objfifo_init/aie2.py | 2 +- test/npu-xrt/vec_vec_add_tile_init/run.lit | 2 +- test/npu-xrt/vector_scalar_using_dma/run.lit | 2 +- 96 files changed, 246 insertions(+), 151 deletions(-) diff --git a/mlir_exercises/CMakeLists.txt b/mlir_exercises/CMakeLists.txt index b5058e36281..465140a13f7 100755 --- a/mlir_exercises/CMakeLists.txt +++ b/mlir_exercises/CMakeLists.txt @@ -125,6 +125,7 @@ configure_lit_site_cfg( set(TEST_DEPENDS FileCheck count not AIEPythonModules + aiecc aie-opt aie-translate ) diff --git a/mlir_exercises/lit.cfg.py b/mlir_exercises/lit.cfg.py index fff789c7bcd..156ae16c71e 100755 --- a/mlir_exercises/lit.cfg.py +++ b/mlir_exercises/lit.cfg.py @@ -38,6 +38,9 @@ # Basic substitutions config.substitutions.append(("%extraAieCcFlags%", config.extraAieCcFlags)) +config.substitutions.append( + ("%aie_runtime_lib%", os.path.join(config.aie_obj_root, "aie_runtime_lib")) +) config.substitutions.append( ( "%host_runtime_lib%", @@ -89,6 +92,9 @@ LitConfigHelper.prepend_path(llvm_config, config.vitis_aietools_bin) llvm_config.with_environment("VITIS", config.vitis_root) +# Add Vitis components as features +LitConfigHelper.add_vitis_components_features(config, config.vitis_components) + # Detect Peano backend peano_config = LitConfigHelper.detect_peano( peano_tools_dir, config.peano_install_dir, llvm_config @@ -108,6 +114,11 @@ }, ) +LitConfigHelper.setup_host_compiler_substitutions(config) +LitConfigHelper.setup_aiecc_substitution(config) +LitConfigHelper.setup_backend_flags_substitution(config) +LitConfigHelper.setup_host_link_substitution(config) + tool_dirs = [config.aie_tools_dir, peano_tools_dir, config.llvm_tools_dir] tools = [ "aie-opt", @@ -122,6 +133,9 @@ llvm_config.add_tool_substitutions(tools, tool_dirs) +if os.name == "nt": + LitConfigHelper.add_python_tool_substitutions(config, ["aiecc.py"]) + if config.enable_board_tests: lit_config.parallelism_groups["board"] = 1 config.parallelism_group = "board" diff --git a/programming_examples/CMakeLists.txt b/programming_examples/CMakeLists.txt index 2037ecf74e9..a0b1d57ddc9 100755 --- a/programming_examples/CMakeLists.txt +++ b/programming_examples/CMakeLists.txt @@ -126,6 +126,7 @@ configure_lit_site_cfg( set(TEST_DEPENDS FileCheck count not AIEPythonModules + aiecc aie-opt aie-translate ) diff --git a/programming_examples/lit.cfg.py b/programming_examples/lit.cfg.py index 88ed701ee2f..7e7a5939312 100755 --- a/programming_examples/lit.cfg.py +++ b/programming_examples/lit.cfg.py @@ -37,6 +37,9 @@ # Basic substitutions config.substitutions.append(("%extraAieCcFlags%", config.extraAieCcFlags)) +config.substitutions.append( + ("%aie_runtime_lib%", os.path.join(config.aie_obj_root, "aie_runtime_lib")) +) config.substitutions.append( ( "%host_runtime_lib%", @@ -140,6 +143,11 @@ }, ) +LitConfigHelper.setup_host_compiler_substitutions(config) +LitConfigHelper.setup_aiecc_substitution(config) +LitConfigHelper.setup_backend_flags_substitution(config) +LitConfigHelper.setup_host_link_substitution(config) + tools = [ "aie-opt", "aie-translate", diff --git a/programming_guide/CMakeLists.txt b/programming_guide/CMakeLists.txt index eec1f4050b2..7764fd580fc 100755 --- a/programming_guide/CMakeLists.txt +++ b/programming_guide/CMakeLists.txt @@ -126,6 +126,7 @@ configure_lit_site_cfg( set(TEST_DEPENDS FileCheck count not AIEPythonModules + aiecc aie-opt aie-translate ) @@ -135,4 +136,4 @@ add_lit_testsuite(check-programming-guide "Running the programming guide code sa DEPENDS ${TEST_DEPENDS} ARGS "-sv --timeout 600" ) -set_target_properties(check-reference-designs PROPERTIES FOLDER "Programming Guide") +set_target_properties(check-programming-guide PROPERTIES FOLDER "Programming Guide") diff --git a/programming_guide/lit.cfg.py b/programming_guide/lit.cfg.py index 2efd66dd58b..ccc8f25f9c5 100755 --- a/programming_guide/lit.cfg.py +++ b/programming_guide/lit.cfg.py @@ -35,6 +35,22 @@ llvm_config, config, config.aie_obj_root, config.vitis_aietools_dir ) +# Basic substitutions +config.substitutions.append(("%extraAieCcFlags%", config.extraAieCcFlags)) +config.substitutions.append( + ("%aie_runtime_lib%", os.path.join(config.aie_obj_root, "aie_runtime_lib")) +) +config.substitutions.append( + ( + "%host_runtime_lib%", + os.path.join(config.aie_obj_root, "runtime_lib", config.aieHostTarget), + ) +) +config.substitutions.append(("%aietools", config.vitis_aietools_dir)) + +# Not using run_on_board anymore, need more specific per-platform commands +config.substitutions.append(("%run_on_board", "echo")) + # Add Vitis components as features LitConfigHelper.add_vitis_components_features(config, config.vitis_components) @@ -101,6 +117,11 @@ }, ) +LitConfigHelper.setup_host_compiler_substitutions(config) +LitConfigHelper.setup_aiecc_substitution(config) +LitConfigHelper.setup_backend_flags_substitution(config) +LitConfigHelper.setup_host_link_substitution(config) + tools = [ "aie-opt", "aie-translate", diff --git a/python/aie_lit_utils/lit_config_helpers.py b/python/aie_lit_utils/lit_config_helpers.py index e80cef4506f..20692cddab8 100644 --- a/python/aie_lit_utils/lit_config_helpers.py +++ b/python/aie_lit_utils/lit_config_helpers.py @@ -380,7 +380,9 @@ def detect_xrt( "Running tests on NPU1 with command line: %s", run_on_npu1 ) else: - logger.warning("NPU1 detected but no AIE2 backend is available") + logger.warning( + "NPU1 detected but no AIE2 backend is available" + ) elif any( known in model for known in LitConfigHelper.NPU_MODELS["npu2"] ): @@ -610,6 +612,95 @@ def setup_host_target_triplet( else: return aie_host_target, "" + @staticmethod + def setup_host_compiler_substitutions(config_obj) -> None: + """Add host compiler substitutions for tests that build host executables. + + AIE/Peano tool directories are added to PATH for device-side tools, so + host-side tests should not rely on a bare ``clang`` resolving to the + host LLVM compiler. This substitution keeps host compilation explicit + and preserves Windows executable suffix handling. + """ + host_clang = os.path.join( + config_obj.llvm_tools_dir, f"clang{config_obj.llvm_exe_ext}" + ) + if not os.path.exists(host_clang): + host_clang = shutil.which("clang") or "clang" + config_obj.substitutions.append( + ("%host_clang", LitConfigHelper._quote_lit_arg(host_clang)) + ) + + @staticmethod + def setup_host_link_substitution(config_obj) -> None: + """Add host linker flags for tests that build XRT host executables. + + Linux-hosted tests need librt/libstdc++. Windows-hosted tests link + against CMake-built dynamic MSVC libraries, matching CMake's default + /MD runtime selection. + """ + if os.name == "nt": + host_link_flags = " ".join( + [ + "-fms-runtime-lib=dll", + "-Xlinker", + "/NODEFAULTLIB:libucrt", + "-Xlinker", + "/DEFAULTLIB:ucrt", + ] + ) + else: + host_link_flags = "-lrt -lstdc++" + config_obj.substitutions.append(("%host_link_flags", host_link_flags)) + + @staticmethod + def setup_aiecc_substitution(config_obj) -> None: + """Add an explicit substitution for the C++ aiecc driver. + + The Python ``aiecc.py`` entry point is now a compatibility wrapper + around the C++ driver. Tests that exercise the compiler should invoke + the build-tree executable directly so they do not depend on PATH order + or a stale installed console script. + """ + aiecc = os.path.join( + config_obj.aie_tools_dir, f"aiecc{config_obj.llvm_exe_ext}" + ) + config_obj.substitutions.append( + ("%aiecc", LitConfigHelper._quote_lit_arg(aiecc)) + ) + + @staticmethod + def setup_backend_flags_substitution(config_obj) -> None: + """Add backend-selection flags for generic aiecc-driven tests. + + Keep existing Chess behavior when Chess is available, but steer tests + onto the Peano/lld path when Peano is the only detected AIE backend. + """ + backend_flags = "" + if ( + "peano" in config_obj.available_features + and "chess" not in config_obj.available_features + ): + backend_flags = "--no-xchesscc --no-xbridge" + config_obj.substitutions.append(("%backend_flags", backend_flags)) + + @staticmethod + def add_python_tool_substitutions(config_obj, tool_names: List[str]) -> None: + """Add explicit substitutions for Python scripts under the AIE bin dir. + + Lit's normal tool discovery can struggle with ``.py`` tool names on + Windows, so these substitutions quote the build-tree tool paths + directly. + """ + for tool_name in tool_names: + config_obj.substitutions.append( + ( + tool_name, + LitConfigHelper._quote_lit_arg( + os.path.join(config_obj.aie_tools_dir, tool_name) + ), + ) + ) + @staticmethod def can_import_python_module( config_obj, python_executable: str, module_name: str diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index 69e1d38ef7f..f829ee8efac 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -109,6 +109,7 @@ configure_lit_site_cfg( set(TEST_DEPENDS FileCheck count not AIEPythonModules + aiecc aie-lsp-server aie-opt aie-translate diff --git a/test/lit.cfg.py b/test/lit.cfg.py index 03a15c29796..71923f40696 100644 --- a/test/lit.cfg.py +++ b/test/lit.cfg.py @@ -7,7 +7,6 @@ # (c) Copyright 2021-2026 Xilinx Inc. import os -import shutil import sys # Add shared AIE lit utilities to path @@ -68,12 +67,7 @@ # Add Vitis components as features LitConfigHelper.add_vitis_components_features(config, config.vitis_components) -# Host-side tests should use the host LLVM compiler instead of llvm-aie. -host_clang = os.path.join(config.llvm_tools_dir, f"clang{config.llvm_exe_ext}") -if not os.path.exists(host_clang): - host_clang = shutil.which("clang") or "clang" -config.substitutions.append(("%host_clang", LitConfigHelper._quote_lit_arg(host_clang))) - +LitConfigHelper.setup_host_compiler_substitutions(config) # Detect Peano before XRT feature gating for systems without Chess/AIETOOLS. early_peano_tools_dir = os.path.join(config.peano_install_dir, "bin") @@ -110,6 +104,7 @@ ] config.aie_tools_dir = os.path.join(config.aie_obj_root, "bin") +LitConfigHelper.setup_aiecc_substitution(config) # Setup the PATH with all necessary tool directories if config.vitis_root: @@ -157,28 +152,8 @@ }, ) -# Keep generic npu-xrt tests on the existing Chess path when Chess is available, -# but steer them onto the Peano/lld path when Peano is the only AIE backend. -aiecc_backend_flags = "" -if "peano" in config.available_features and "chess" not in config.available_features: - aiecc_backend_flags = "--no-xchesscc --no-xbridge" -config.substitutions.append(("%aiecc_backend_flags", aiecc_backend_flags)) - -# Linux hosted tests need librt/libstdc++. Windows hosted tests link against -# CMake-built dynamic MSVC libraries. Match CMake's default /MD selection. -if os.name == "nt": - host_link_flags = " ".join( - [ - "-fms-runtime-lib=dll", - "-Xlinker", - "/NODEFAULTLIB:libucrt", - "-Xlinker", - "/DEFAULTLIB:ucrt", - ] - ) -else: - host_link_flags = "-lrt -lstdc++" -config.substitutions.append(("%host_link_flags", host_link_flags)) +LitConfigHelper.setup_backend_flags_substitution(config) +LitConfigHelper.setup_host_link_substitution(config) tools = [ "aie-opt", @@ -196,24 +171,7 @@ llvm_config.add_tool_substitutions(tools, tool_dirs) if os.name == "nt": - # Lit on Windows struggles with substituting tools with a .py extension. - # Add these manually and quote them so paths with spaces survive. - config.substitutions.append( - ( - "aiecc.py", - LitConfigHelper._quote_lit_arg( - os.path.join(config.aie_tools_dir, "aiecc.py") - ), - ) - ) - config.substitutions.append( - ( - "txn2mlir.py", - LitConfigHelper._quote_lit_arg( - os.path.join(config.aie_tools_dir, "txn2mlir.py") - ), - ) - ) + LitConfigHelper.add_python_tool_substitutions(config, ["aiecc.py", "txn2mlir.py"]) if config.enable_board_tests: lit_config.parallelism_groups["board"] = 1 diff --git a/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit b/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit index 4ddda91883a..a2aff02ce56 100644 --- a/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit +++ b/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit b/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit index 9cd7b9d05ba..f28495aca2b 100644 --- a/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit +++ b/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit b/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit index 9cd7b9d05ba..f28495aca2b 100644 --- a/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit +++ b/test/npu-xrt/add_256_using_dma_op_no_double_buffering/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_314_using_dma_op/run.lit b/test/npu-xrt/add_314_using_dma_op/run.lit index b85c8f10195..866838e091b 100644 --- a/test/npu-xrt/add_314_using_dma_op/run.lit +++ b/test/npu-xrt/add_314_using_dma_op/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit b/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit index b85c8f10195..866838e091b 100644 --- a/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit +++ b/test/npu-xrt/add_378_i32_using_dma_op_with_padding/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/add_blockwrite/run.lit b/test/npu-xrt/add_blockwrite/run.lit index d38da60330a..0650c885d02 100644 --- a/test/npu-xrt/add_blockwrite/run.lit +++ b/test/npu-xrt/add_blockwrite/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_maskwrite/run.lit b/test/npu-xrt/add_maskwrite/run.lit index d38da60330a..0650c885d02 100644 --- a/test/npu-xrt/add_maskwrite/run.lit +++ b/test/npu-xrt/add_maskwrite/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_cpp_aiecc/run.lit b/test/npu-xrt/add_one_cpp_aiecc/run.lit index 2b53833dc7f..2a7ee0e6e0e 100644 --- a/test/npu-xrt/add_one_cpp_aiecc/run.lit +++ b/test/npu-xrt/add_one_cpp_aiecc/run.lit @@ -1,12 +1,12 @@ // Copyright (C) 2026, Advanced Micro Devices, Inc. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // -// REQUIRES: ryzen_ai +// REQUIRES: ryzen_ai, peano // // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_cpp_aiecc_xchesscc/run.lit b/test/npu-xrt/add_one_cpp_aiecc_xchesscc/run.lit index af1f2c3694b..150e6a66746 100644 --- a/test/npu-xrt/add_one_cpp_aiecc_xchesscc/run.lit +++ b/test/npu-xrt/add_one_cpp_aiecc_xchesscc/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_ctrl_packet/run.lit b/test/npu-xrt/add_one_ctrl_packet/run.lit index c09f42c2215..76b1a26f0b1 100644 --- a/test/npu-xrt/add_one_ctrl_packet/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit b/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit index 6fc43bd05d3..f27011cfcc1 100644 --- a/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet_4_cores/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_4col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %host_link_flags %xrt_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit b/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit index b7a23542f44..2b351f0c59d 100644 --- a/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit +++ b/test/npu-xrt/add_one_ctrl_packet_col_overlay/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1 // -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --generate-ctrl-pkt-overlay --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --generate-ctrl-pkt-overlay --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_func_link_with_chess/run.lit b/test/npu-xrt/add_one_func_link_with_chess/run.lit index 433efd7b018..0147b6c8f62 100644 --- a/test/npu-xrt/add_one_func_link_with_chess/run.lit +++ b/test/npu-xrt/add_one_func_link_with_chess/run.lit @@ -16,7 +16,7 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // RUN: %run_on_npu1% xchesscc_wrapper aie2 -I %aietools/include -c %S/add_one_kernel.cc -o ./add_one_kernel.o // RUN: %run_on_npu2% xchesscc_wrapper aie2p -I %aietools/include -c %S/add_one_kernel.cc -o ./add_one_kernel.o -// RUN: aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_func_link_with_peano/run.lit b/test/npu-xrt/add_one_func_link_with_peano/run.lit index c27e2a44d52..c59cd867638 100644 --- a/test/npu-xrt/add_one_func_link_with_peano/run.lit +++ b/test/npu-xrt/add_one_func_link_with_peano/run.lit @@ -17,7 +17,7 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // RUN: %run_on_npu1% %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -O2 -c %S/add_one_kernel.cc -o ./add_one_kernel.o // RUN: %run_on_npu2% %PEANO_INSTALL_DIR/bin/clang --target=aie2p-none-unknown-elf -O2 -c %S/add_one_kernel.cc -o ./add_one_kernel.o -// RUN: aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_objFifo/run.lit b/test/npu-xrt/add_one_objFifo/run.lit index 60dac9f86da..c43c89981d8 100644 --- a/test/npu-xrt/add_one_objFifo/run.lit +++ b/test/npu-xrt/add_one_objFifo/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_objFifo_elf/run.lit b/test/npu-xrt/add_one_objFifo_elf/run.lit index 4800d22cf87..f17783f5d04 100644 --- a/test/npu-xrt/add_one_objFifo_elf/run.lit +++ b/test/npu-xrt/add_one_objFifo_elf/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-elf --elf-name=insts.elf --no-compile-host ./aie_arch.mlir +// RUN: %aiecc %backend_flags --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-elf --elf-name=insts.elf --no-compile-host ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.elf // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.elf diff --git a/test/npu-xrt/add_one_scale_func_link_with_chess/run.lit b/test/npu-xrt/add_one_scale_func_link_with_chess/run.lit index 21be8207427..29ee3f3b9de 100644 --- a/test/npu-xrt/add_one_scale_func_link_with_chess/run.lit +++ b/test/npu-xrt/add_one_scale_func_link_with_chess/run.lit @@ -25,7 +25,7 @@ // RUN: %run_on_npu2% xchesscc_wrapper aie2p -I %aietools/include -c %S/add_one_kernel.cc -o ./add_one_kernel.o // RUN: %run_on_npu1% xchesscc_wrapper aie2 -I %aietools/include -c %S/scale_kernel.cc -o ./scale_kernel.o // RUN: %run_on_npu2% xchesscc_wrapper aie2p -I %aietools/include -c %S/scale_kernel.cc -o ./scale_kernel.o -// RUN: aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc --xchesscc --xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_scale_func_link_with_peano/run.lit b/test/npu-xrt/add_one_scale_func_link_with_peano/run.lit index ffb798dc7da..3a828c7d69e 100644 --- a/test/npu-xrt/add_one_scale_func_link_with_peano/run.lit +++ b/test/npu-xrt/add_one_scale_func_link_with_peano/run.lit @@ -25,7 +25,7 @@ // RUN: %run_on_npu2% %PEANO_INSTALL_DIR/bin/clang --target=aie2p-none-unknown-elf -O2 -c %S/add_one_kernel.cc -o ./add_one_kernel.o // RUN: %run_on_npu1% %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -O2 -c %S/scale_kernel.cc -o ./scale_kernel.o // RUN: %run_on_npu2% %PEANO_INSTALL_DIR/bin/clang --target=aie2p-none-unknown-elf -O2 -c %S/scale_kernel.cc -o ./scale_kernel.o -// RUN: aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc --no-xchesscc --no-xbridge --aie-generate-xclbin --xclbin-name=aie.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/add_one_two/run.lit b/test/npu-xrt/add_one_two/run.lit index eb09eec082b..6b43c1e1981 100644 --- a/test/npu-xrt/add_one_two/run.lit +++ b/test/npu-xrt/add_one_two/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --xclbin-kernel-name=ADDONE --device-name=design1 --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --xclbin-kernel-name=ADDTWO --device-name=design2 --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --xclbin-kernel-name=ADDONE --device-name=design1 --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --xclbin-kernel-name=ADDTWO --device-name=design2 --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x add_two.xclbin -i insts.bin // RUN: %run_on_npu2% ./test.exe -x add_two.xclbin -i insts.bin diff --git a/test/npu-xrt/add_one_two_runlist/run.lit b/test/npu-xrt/add_one_two_runlist/run.lit index 97b2293eabf..747fe458513 100644 --- a/test/npu-xrt/add_one_two_runlist/run.lit +++ b/test/npu-xrt/add_one_two_runlist/run.lit @@ -6,8 +6,8 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --device-name=aie_add_1 --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.bin aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --device-name=aie_add_2 --xclbin-kernel-name=ADDTWO --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --device-name=aie_add_1 --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --device-name=aie_add_2 --xclbin-kernel-name=ADDTWO --xclbin-kernel-id=0x902 --xclbin-instance-name=ADDTWOINST --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-input=add_one.xclbin --xclbin-name=add_two.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x add_two.xclbin -i insts.bin // RUN: %run_on_npu2% ./test.exe -x add_two.xclbin -i insts.bin diff --git a/test/npu-xrt/add_one_two_txn/run.lit b/test/npu-xrt/add_one_two_txn/run.lit index 5427e4f0174..b4adda82c8e 100644 --- a/test/npu-xrt/add_one_two_txn/run.lit +++ b/test/npu-xrt/add_one_two_txn/run.lit @@ -7,8 +7,8 @@ // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags -// RUN: %python aiecc.py %aiecc_backend_flags --tmpdir=project1 --device-name=add_one --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=add_one_insts.bin aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --tmpdir=project2 --device-name=add_two --aie-generate-txn --txn-name=transaction.mlir --aie-generate-npu-insts --no-compile-host --npu-insts-name=add_two_insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --tmpdir=project1 --device-name=add_one --xclbin-kernel-name=ADDONE --xclbin-kernel-id=0x901 --xclbin-instance-name=ADDONEINST --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=add_one.xclbin --npu-insts-name=add_one_insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --tmpdir=project2 --device-name=add_two --aie-generate-txn --txn-name=transaction.mlir --aie-generate-npu-insts --no-compile-host --npu-insts-name=add_two_insts.bin aie_arch.mlir // RUN: aie-translate --aie-device-name=add_two -aie-npu-to-binary -aie-sequence-name=configure transaction.mlir -o add_two_cfg.bin // RUN: %run_on_npu1% ./test.exe -x add_one.xclbin --instr0 add_one_insts.bin -c add_two_cfg.bin --instr1 add_two_insts.bin // RUN: %run_on_npu2% ./test.exe -x add_one.xclbin --instr0 add_one_insts.bin -c add_two_cfg.bin --instr1 add_two_insts.bin diff --git a/test/npu-xrt/add_one_using_dma/run.lit b/test/npu-xrt/add_one_using_dma/run.lit index d38da60330a..0650c885d02 100644 --- a/test/npu-xrt/add_one_using_dma/run.lit +++ b/test/npu-xrt/add_one_using_dma/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py b/test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py index b21464de06c..e931e43f209 100644 --- a/test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py +++ b/test/npu-xrt/adjacent_memtile_access/three_memtiles/aie2.py @@ -9,7 +9,7 @@ # REQUIRES: ryzen_ai_npu1 # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py b/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py index ae0e889b514..d1bac4437dc 100644 --- a/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py +++ b/test/npu-xrt/adjacent_memtile_access/two_memtiles/aie2.py @@ -9,7 +9,7 @@ # REQUIRES: ryzen_ai_npu1 # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_2memtile/ext_to_core_L2_placed.py b/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_2memtile/ext_to_core_L2_placed.py index f9240e571df..121c3e0eae6 100644 --- a/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_2memtile/ext_to_core_L2_placed.py +++ b/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_2memtile/ext_to_core_L2_placed.py @@ -8,7 +8,7 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # RUN: %python %S/ext_to_core_L2_placed.py npu > ./aie.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags -# RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir +# RUN: %aiecc %backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_3memtile/ext_to_core_L2_placed.py b/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_3memtile/ext_to_core_L2_placed.py index d104bbd14a9..b7f5f8f575c 100644 --- a/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_3memtile/ext_to_core_L2_placed.py +++ b/test/npu-xrt/adjacent_memtile_allocation/onelargefifo_on_3memtile/ext_to_core_L2_placed.py @@ -8,7 +8,7 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # RUN: %python %S/ext_to_core_L2_placed.py npu > ./aie.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags -# RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir +# RUN: %aiecc %backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/adjacent_memtile_allocation/twofifo_one_2memtile/ext_to_core_L2_placed.py b/test/npu-xrt/adjacent_memtile_allocation/twofifo_one_2memtile/ext_to_core_L2_placed.py index b5aaba1db16..1216487d4a8 100644 --- a/test/npu-xrt/adjacent_memtile_allocation/twofifo_one_2memtile/ext_to_core_L2_placed.py +++ b/test/npu-xrt/adjacent_memtile_allocation/twofifo_one_2memtile/ext_to_core_L2_placed.py @@ -8,7 +8,7 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # RUN: %python %S/ext_to_core_L2_placed.py npu > ./aie.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags -# RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir +# RUN: %aiecc %backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/bd_chain_repeat_on_memtile/aie2.py b/test/npu-xrt/bd_chain_repeat_on_memtile/aie2.py index 5988adcec3e..d37c802b6d7 100644 --- a/test/npu-xrt/bd_chain_repeat_on_memtile/aie2.py +++ b/test/npu-xrt/bd_chain_repeat_on_memtile/aie2.py @@ -10,7 +10,7 @@ # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.cc.o # RUN: %python %S/aie2.py npu > ./aie.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags -# RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir +# RUN: %aiecc %backend_flags --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --aie-generate-npu-insts --npu-insts-name=insts.bin ./aie.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin | FileCheck %s # CHECK: PASS! diff --git a/test/npu-xrt/cascade_flows/run.lit b/test/npu-xrt/cascade_flows/run.lit index 868e717fb8b..17556638b3c 100644 --- a/test/npu-xrt/cascade_flows/run.lit +++ b/test/npu-xrt/cascade_flows/run.lit @@ -6,6 +6,6 @@ // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel1.cc -o ./kernel1.o // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel2.cc -o ./kernel2.o // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel3.cc -o ./kernel3.o -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/column_specific/aie2.py b/test/npu-xrt/column_specific/aie2.py index 372d1be7904..90f75d989fd 100644 --- a/test/npu-xrt/column_specific/aie2.py +++ b/test/npu-xrt/column_specific/aie2.py @@ -10,7 +10,7 @@ # # RUN: %python %S/aie2.py > ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/core_dmas/dma_configure_task_lock/run.lit b/test/npu-xrt/core_dmas/dma_configure_task_lock/run.lit index 8a2a0551217..77dfb5fb80c 100644 --- a/test/npu-xrt/core_dmas/dma_configure_task_lock/run.lit +++ b/test/npu-xrt/core_dmas/dma_configure_task_lock/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/core_dmas/dma_configure_task_token/run.lit b/test/npu-xrt/core_dmas/dma_configure_task_token/run.lit index 8a2a0551217..77dfb5fb80c 100644 --- a/test/npu-xrt/core_dmas/dma_configure_task_token/run.lit +++ b/test/npu-xrt/core_dmas/dma_configure_task_token/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/ctrl_packet_reconfig/run.lit b/test/npu-xrt/ctrl_packet_reconfig/run.lit index dea4da33b27..fd6a375cd61 100644 --- a/test/npu-xrt/ctrl_packet_reconfig/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig/run.lit @@ -9,8 +9,8 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // // RUN: aie-opt -aie-generate-column-control-overlay="route-shim-to-tile-ctrl=true" aie_arch.mlir -o aie_overlay.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir +// RUN: %aiecc %backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir +// RUN: %aiecc %backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir // // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // diff --git a/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit b/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit index 8be44600b67..c20076b44db 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig_1x4_cores/run.lit @@ -9,8 +9,8 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // // RUN: aie-opt -aie-generate-column-control-overlay="route-shim-to-tile-ctrl=true" aie_arch.mlir -o aie_overlay.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir +// RUN: %aiecc %backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir +// RUN: %aiecc %backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir // // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe diff --git a/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit b/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit index efaca9f46fc..cf8a34b3541 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig_4x1_cores/run.lit @@ -9,8 +9,8 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2/g' -i aie_arch.mlir // // RUN: aie-opt -aie-generate-column-control-overlay="route-shim-to-tile-ctrl=true" aie_arch.mlir -o aie_overlay.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir +// RUN: %aiecc %backend_flags --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir +// RUN: %aiecc %backend_flags --device-name=main --aie-generate-ctrlpkt --ctrlpkt-name=ctrlpkt.bin --aie-generate-npu-insts --npu-insts-name=aie_run_seq.bin aie_overlay.mlir // // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe diff --git a/test/npu-xrt/ctrl_packet_reconfig_elf/run.lit b/test/npu-xrt/ctrl_packet_reconfig_elf/run.lit index 78559b20aa7..fc5ff930363 100644 --- a/test/npu-xrt/ctrl_packet_reconfig_elf/run.lit +++ b/test/npu-xrt/ctrl_packet_reconfig_elf/run.lit @@ -9,8 +9,8 @@ // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir // // RUN: aie-opt -aie-generate-column-control-overlay="route-shim-to-tile-ctrl=true" aie_arch.mlir -o aie_overlay.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --tmpdir=project1 --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --tmpdir=project2 --device-name=main --aie-generate-ctrlpkt --aie-generate-elf --elf-name=aie.elf aie_overlay.mlir +// RUN: %aiecc %backend_flags --tmpdir=project1 --device-name=base --aie-generate-xclbin --xclbin-name=aie.xclbin aie_overlay.mlir +// RUN: %aiecc %backend_flags --tmpdir=project2 --device-name=main --aie-generate-ctrlpkt --aie-generate-elf --elf-name=aie.elf aie_overlay.mlir // // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe diff --git a/test/npu-xrt/device_width/aie2.py b/test/npu-xrt/device_width/aie2.py index c8bfbf33f4b..b4dfb426157 100644 --- a/test/npu-xrt/device_width/aie2.py +++ b/test/npu-xrt/device_width/aie2.py @@ -10,7 +10,7 @@ # # RUN: %python %S/aie2.py > ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/dma_complex_dims/aie2.py b/test/npu-xrt/dma_complex_dims/aie2.py index 08caf1e6926..fc4624ced70 100644 --- a/test/npu-xrt/dma_complex_dims/aie2.py +++ b/test/npu-xrt/dma_complex_dims/aie2.py @@ -9,7 +9,7 @@ # REQUIRES: ryzen_ai_npu1, peano # # RUN: %python %S/aie2.py 8 5 20 4 5 > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -m 8 --tile-k 5 -K 20 -r 4 -s 5 import argparse diff --git a/test/npu-xrt/dma_task_large_linear/aie2.py b/test/npu-xrt/dma_task_large_linear/aie2.py index 28440b7c10e..5cd17d44857 100644 --- a/test/npu-xrt/dma_task_large_linear/aie2.py +++ b/test/npu-xrt/dma_task_large_linear/aie2.py @@ -8,7 +8,7 @@ # REQUIRES: ryzen_ai_npu1, peano # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/dmabd_task_queue/run.lit b/test/npu-xrt/dmabd_task_queue/run.lit index 35066e6647e..4b3480c0360 100644 --- a/test/npu-xrt/dmabd_task_queue/run.lit +++ b/test/npu-xrt/dmabd_task_queue/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_4col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/dmabd_task_queue/test.cpp b/test/npu-xrt/dmabd_task_queue/test.cpp index 575ae31a48f..8d2f2fed51a 100644 --- a/test/npu-xrt/dmabd_task_queue/test.cpp +++ b/test/npu-xrt/dmabd_task_queue/test.cpp @@ -8,18 +8,18 @@ // //===----------------------------------------------------------------------===// -#include #include +#include +#include +#include +#include #include #include -#include #include #include #include #include #include -#include -#include #include "cxxopts.hpp" #include "test_utils.h" diff --git a/test/npu-xrt/dynamic_object_fifo/nested_loops/aie2.py b/test/npu-xrt/dynamic_object_fifo/nested_loops/aie2.py index a77d2bedcea..91f4c04f167 100644 --- a/test/npu-xrt/dynamic_object_fifo/nested_loops/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/nested_loops/aie2.py @@ -10,7 +10,7 @@ # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/dynamic_object_fifo/ping_pong/aie2.py b/test/npu-xrt/dynamic_object_fifo/ping_pong/aie2.py index 27421c0d260..ac3165da35d 100644 --- a/test/npu-xrt/dynamic_object_fifo/ping_pong/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/ping_pong/aie2.py @@ -9,7 +9,7 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/dynamic_object_fifo/reduction/aie2.py b/test/npu-xrt/dynamic_object_fifo/reduction/aie2.py index 639d24c1a91..26d1f673668 100644 --- a/test/npu-xrt/dynamic_object_fifo/reduction/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/reduction/aie2.py @@ -9,7 +9,7 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/dynamic_object_fifo/sliding_window/aie2.py b/test/npu-xrt/dynamic_object_fifo/sliding_window/aie2.py index 1e4f432ab85..747c0d91ddc 100644 --- a/test/npu-xrt/dynamic_object_fifo/sliding_window/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/sliding_window/aie2.py @@ -9,7 +9,7 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe diff --git a/test/npu-xrt/dynamic_object_fifo/sliding_window_conditional/aie2.py b/test/npu-xrt/dynamic_object_fifo/sliding_window_conditional/aie2.py index e9579c43b79..6ca3e212456 100644 --- a/test/npu-xrt/dynamic_object_fifo/sliding_window_conditional/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/sliding_window_conditional/aie2.py @@ -10,7 +10,7 @@ # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/dynamic_object_fifo/two_core_sliding_window/aie2.py b/test/npu-xrt/dynamic_object_fifo/two_core_sliding_window/aie2.py index 67062177845..a71448ccd11 100644 --- a/test/npu-xrt/dynamic_object_fifo/two_core_sliding_window/aie2.py +++ b/test/npu-xrt/dynamic_object_fifo/two_core_sliding_window/aie2.py @@ -9,7 +9,7 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe diff --git a/test/npu-xrt/loadpdi/run.lit b/test/npu-xrt/loadpdi/run.lit index ea2a7aecc8e..5b39c0c0871 100644 --- a/test/npu-xrt/loadpdi/run.lit +++ b/test/npu-xrt/loadpdi/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu2, peano // -// RUN: %PYTHON aiecc.py -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir +// RUN: %aiecc -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir // RUN: %host_clang -o test.exe %S/test_elf.cpp -std=c++17 %host_link_flags %xrt_flags // RUN: ./test.exe diff --git a/test/npu-xrt/matrix_multiplication_using_cascade/run.lit b/test/npu-xrt/matrix_multiplication_using_cascade/run.lit index 5d980e8a951..97f3fa16556 100644 --- a/test/npu-xrt/matrix_multiplication_using_cascade/run.lit +++ b/test/npu-xrt/matrix_multiplication_using_cascade/run.lit @@ -6,11 +6,11 @@ // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/mm.cc -o ./mm.o // RUN: g++-13 %S/test.cpp -o test.exe -std=c++23 -Wall %xrt_flags %host_link_flags %test_utils_flags // -// RUN: %python aiecc.py --xchesscc --xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie2_plain.xclbin --npu-insts-name=insts2_plain.txt %S/aie_plainx4.mlir +// RUN: %aiecc --xchesscc --xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie2_plain.xclbin --npu-insts-name=insts2_plain.txt %S/aie_plainx4.mlir // RUN: %run_on_npu1% ./test.exe -x aie2_plain.xclbin -k MLIR_AIE -i insts2_plain.txt --trace_sz 32768 // -// RUN: %python aiecc.py --xchesscc --xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie2_buffer.xclbin --npu-insts-name=insts2_buffer.txt %S/aie_bufferx4.mlir +// RUN: %aiecc --xchesscc --xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie2_buffer.xclbin --npu-insts-name=insts2_buffer.txt %S/aie_bufferx4.mlir // RUN: %run_on_npu1% ./test.exe -x aie2_buffer.xclbin -k MLIR_AIE -i insts2_buffer.txt --trace_sz 32768 // -// RUN: %python aiecc.py --xchesscc --xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie2_cascade.xclbin --npu-insts-name=insts2_cascade.txt %S/aie_cascadex4.mlir +// RUN: %aiecc --xchesscc --xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie2_cascade.xclbin --npu-insts-name=insts2_cascade.txt %S/aie_cascadex4.mlir // RUN: %run_on_npu1% ./test.exe -x aie2_cascade.xclbin -k MLIR_AIE -i insts2_cascade.txt --trace_sz 32768 diff --git a/test/npu-xrt/matrix_transpose/aie2.py b/test/npu-xrt/matrix_transpose/aie2.py index 280a748ee95..16ea15a76b6 100644 --- a/test/npu-xrt/matrix_transpose/aie2.py +++ b/test/npu-xrt/matrix_transpose/aie2.py @@ -9,7 +9,7 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit b/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit index 3f33c71fd9f..cbe7b987b0d 100644 --- a/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit +++ b/test/npu-xrt/memtile_dmas/blockwrite_using_locks/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/memtile_dmas/dma_configure_task_lock/run.lit b/test/npu-xrt/memtile_dmas/dma_configure_task_lock/run.lit index 8a2a0551217..77dfb5fb80c 100644 --- a/test/npu-xrt/memtile_dmas/dma_configure_task_lock/run.lit +++ b/test/npu-xrt/memtile_dmas/dma_configure_task_lock/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/memtile_dmas/dma_configure_task_token/run.lit b/test/npu-xrt/memtile_dmas/dma_configure_task_token/run.lit index 8a2a0551217..77dfb5fb80c 100644 --- a/test/npu-xrt/memtile_dmas/dma_configure_task_token/run.lit +++ b/test/npu-xrt/memtile_dmas/dma_configure_task_token/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/memtile_dmas/writebd/run.lit b/test/npu-xrt/memtile_dmas/writebd/run.lit index 3f33c71fd9f..cbe7b987b0d 100644 --- a/test/npu-xrt/memtile_dmas/writebd/run.lit +++ b/test/npu-xrt/memtile_dmas/writebd/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit b/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit index 3f33c71fd9f..cbe7b987b0d 100644 --- a/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit +++ b/test/npu-xrt/memtile_dmas/writebd_tokens/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/nd_memcpy_linear_repeat/aie2.py b/test/npu-xrt/nd_memcpy_linear_repeat/aie2.py index 1629e30457d..613dc03cd57 100644 --- a/test/npu-xrt/nd_memcpy_linear_repeat/aie2.py +++ b/test/npu-xrt/nd_memcpy_linear_repeat/aie2.py @@ -8,7 +8,7 @@ # REQUIRES: ryzen_ai_npu1, valid_xchess_license # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe diff --git a/test/npu-xrt/nd_memcpy_transforms/aie2.py b/test/npu-xrt/nd_memcpy_transforms/aie2.py index 99ab54947ec..37dccd8b239 100644 --- a/test/npu-xrt/nd_memcpy_transforms/aie2.py +++ b/test/npu-xrt/nd_memcpy_transforms/aie2.py @@ -9,7 +9,7 @@ # # RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cc -o ./kernel.o # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe import numpy as np diff --git a/test/npu-xrt/neighbor_tile_memory_access/aie2.py b/test/npu-xrt/neighbor_tile_memory_access/aie2.py index 420f5f24f86..75852309b43 100644 --- a/test/npu-xrt/neighbor_tile_memory_access/aie2.py +++ b/test/npu-xrt/neighbor_tile_memory_access/aie2.py @@ -10,7 +10,7 @@ # REQUIRES: ryzen_ai_npu1, chess # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/objectfifo_repeat/compute_repeat/aie2.py b/test/npu-xrt/objectfifo_repeat/compute_repeat/aie2.py index 45d214a81ef..23beea4a465 100644 --- a/test/npu-xrt/objectfifo_repeat/compute_repeat/aie2.py +++ b/test/npu-xrt/objectfifo_repeat/compute_repeat/aie2.py @@ -9,7 +9,7 @@ # REQUIRES: ryzen_ai_npu1, peano # # RUN: %python %S/aie2.py 4096 > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -l 4096 import numpy as np diff --git a/test/npu-xrt/objectfifo_repeat/distribute_repeat/aie2.py b/test/npu-xrt/objectfifo_repeat/distribute_repeat/aie2.py index 94d1ec9429c..73da8521812 100644 --- a/test/npu-xrt/objectfifo_repeat/distribute_repeat/aie2.py +++ b/test/npu-xrt/objectfifo_repeat/distribute_repeat/aie2.py @@ -10,7 +10,7 @@ # XFAIL: * # # RUN: %python %S/aie2.py 36 > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -l 36 import numpy as np diff --git a/test/npu-xrt/objectfifo_repeat/init_values_repeat/aie2.py b/test/npu-xrt/objectfifo_repeat/init_values_repeat/aie2.py index c0954931d9d..c092534cc4e 100644 --- a/test/npu-xrt/objectfifo_repeat/init_values_repeat/aie2.py +++ b/test/npu-xrt/objectfifo_repeat/init_values_repeat/aie2.py @@ -9,7 +9,7 @@ # REQUIRES: ryzen_ai_npu1, peano # # RUN: %python %S/aie2.py 4096 > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -l 4096 import numpy as np diff --git a/test/npu-xrt/objectfifo_repeat/simple_repeat/aie2.py b/test/npu-xrt/objectfifo_repeat/simple_repeat/aie2.py index 15dde2b57cf..46d81269b79 100644 --- a/test/npu-xrt/objectfifo_repeat/simple_repeat/aie2.py +++ b/test/npu-xrt/objectfifo_repeat/simple_repeat/aie2.py @@ -9,7 +9,7 @@ # REQUIRES: ryzen_ai_npu1, peano # # RUN: %python %S/aie2.py 4096 > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc --no-aiesim --no-xchesscc --no-xbridge --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x final.xclbin -i insts.bin -k MLIR_AIE -l 4096 import numpy as np diff --git a/test/npu-xrt/packet_flow/run.lit b/test/npu-xrt/packet_flow/run.lit index 7000daca40f..053e725798b 100644 --- a/test/npu-xrt/packet_flow/run.lit +++ b/test/npu-xrt/packet_flow/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/packet_flow_fanin/run.lit b/test/npu-xrt/packet_flow_fanin/run.lit index 7000daca40f..053e725798b 100644 --- a/test/npu-xrt/packet_flow_fanin/run.lit +++ b/test/npu-xrt/packet_flow_fanin/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/packet_flow_fanout/run.lit b/test/npu-xrt/packet_flow_fanout/run.lit index 7000daca40f..053e725798b 100644 --- a/test/npu-xrt/packet_flow_fanout/run.lit +++ b/test/npu-xrt/packet_flow_fanout/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe aie.xclbin // RUN: %run_on_npu2% ./test.exe aie.xclbin diff --git a/test/npu-xrt/reconfigure_loadpdi/run_loadpdi.lit b/test/npu-xrt/reconfigure_loadpdi/run_loadpdi.lit index e4e47ca68ec..3674ec45be0 100644 --- a/test/npu-xrt/reconfigure_loadpdi/run_loadpdi.lit +++ b/test/npu-xrt/reconfigure_loadpdi/run_loadpdi.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu2, peano // -// RUN: %PYTHON aiecc.py -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir +// RUN: %aiecc -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir // RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags // RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/reconfigure_loadpdi/run_write32s.lit b/test/npu-xrt/reconfigure_loadpdi/run_write32s.lit index 8e91f08a5b3..5e8ead6879c 100644 --- a/test/npu-xrt/reconfigure_loadpdi/run_write32s.lit +++ b/test/npu-xrt/reconfigure_loadpdi/run_write32s.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu2, peano // -// RUN: %PYTHON aiecc.py -v --generate-full-elf --expand-load-pdis --no-xchesscc --no-xbridge %S/aie.mlir +// RUN: %aiecc -v --generate-full-elf --expand-load-pdis --no-xchesscc --no-xbridge %S/aie.mlir // RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags // RUN: ./test.exe diff --git a/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_loadpdi.lit b/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_loadpdi.lit index e4e47ca68ec..3674ec45be0 100644 --- a/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_loadpdi.lit +++ b/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_loadpdi.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu2, peano // -// RUN: %PYTHON aiecc.py -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir +// RUN: %aiecc -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir // RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags // RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_write32s.lit b/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_write32s.lit index c32006d6961..8be2b48b19e 100644 --- a/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_write32s.lit +++ b/test/npu-xrt/reconfigure_loadpdi_persistent_memtile/run_write32s.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu2, peano // -// RUN: %PYTHON aiecc.py -v --generate-full-elf --expand-load-pdis --no-xchesscc --no-xbridge %S/aie.mlir +// RUN: %aiecc -v --generate-full-elf --expand-load-pdis --no-xchesscc --no-xbridge %S/aie.mlir // RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags // RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/runtime_cumsum/run.lit b/test/npu-xrt/runtime_cumsum/run.lit index f71d97843a7..32d47e458cd 100644 --- a/test/npu-xrt/runtime_cumsum/run.lit +++ b/test/npu-xrt/runtime_cumsum/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai_npu1, chess // // RUN: xchesscc_wrapper aie2 -I %aietools/include -DBIT_WIDTH=8 -c %S/sum.cc -o ./sum.o -// RUN: %python aiecc.py --xchesscc --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc --xchesscc --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/scratchpad_regwrite/run.lit b/test/npu-xrt/scratchpad_regwrite/run.lit index 10634da128b..3674ec45be0 100644 --- a/test/npu-xrt/scratchpad_regwrite/run.lit +++ b/test/npu-xrt/scratchpad_regwrite/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu2, peano // -// RUN: aiecc -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir -// RUN: clang -o test %S/test.cpp -std=c++17 -lstdc++ %xrt_flags -// RUN: %run_on_npu2% ./test +// RUN: %aiecc -v --generate-full-elf --no-xchesscc --no-xbridge %S/aie.mlir +// RUN: %host_clang -o test.exe %S/test.cpp -std=c++17 %host_link_flags %xrt_flags +// RUN: %run_on_npu2% ./test.exe diff --git a/test/npu-xrt/scratchpad_regwrite/test.cpp b/test/npu-xrt/scratchpad_regwrite/test.cpp index 63f30bf836e..3a0e9396041 100644 --- a/test/npu-xrt/scratchpad_regwrite/test.cpp +++ b/test/npu-xrt/scratchpad_regwrite/test.cpp @@ -16,7 +16,6 @@ #include #include #include -#include #include #include diff --git a/test/npu-xrt/shim_dma_bd_reuse/run.lit b/test/npu-xrt/shim_dma_bd_reuse/run.lit index 8a2a0551217..77dfb5fb80c 100644 --- a/test/npu-xrt/shim_dma_bd_reuse/run.lit +++ b/test/npu-xrt/shim_dma_bd_reuse/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/static_L1_init/run.lit b/test/npu-xrt/static_L1_init/run.lit index 5494bc39712..8ece9517af1 100644 --- a/test/npu-xrt/static_L1_init/run.lit +++ b/test/npu-xrt/static_L1_init/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/sync_task_complete_token/aie2.py b/test/npu-xrt/sync_task_complete_token/aie2.py index aa2789b5ac6..db67d3d2d2c 100644 --- a/test/npu-xrt/sync_task_complete_token/aie2.py +++ b/test/npu-xrt/sync_task_complete_token/aie2.py @@ -8,7 +8,7 @@ # REQUIRES: ryzen_ai_npu1 # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe diff --git a/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py b/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py index 33b246c419e..7718ac044e8 100644 --- a/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py +++ b/test/npu-xrt/sync_task_complete_token_bd_chaining/aie2.py @@ -8,7 +8,7 @@ # REQUIRES: ryzen_ai_npu1 # # RUN: %python %S/aie2.py > ./aie2.mlir -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-npu-insts --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe diff --git a/test/npu-xrt/tile_dmas/blockwrite_using_locks/run.lit b/test/npu-xrt/tile_dmas/blockwrite_using_locks/run.lit index 3f33c71fd9f..cbe7b987b0d 100644 --- a/test/npu-xrt/tile_dmas/blockwrite_using_locks/run.lit +++ b/test/npu-xrt/tile_dmas/blockwrite_using_locks/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/tile_dmas/writebd/run.lit b/test/npu-xrt/tile_dmas/writebd/run.lit index 3f33c71fd9f..cbe7b987b0d 100644 --- a/test/npu-xrt/tile_dmas/writebd/run.lit +++ b/test/npu-xrt/tile_dmas/writebd/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/tile_dmas/writebd_tokens/run.lit b/test/npu-xrt/tile_dmas/writebd_tokens/run.lit index 3f33c71fd9f..cbe7b987b0d 100644 --- a/test/npu-xrt/tile_dmas/writebd_tokens/run.lit +++ b/test/npu-xrt/tile_dmas/writebd_tokens/run.lit @@ -3,6 +3,6 @@ // // REQUIRES: ryzen_ai_npu1, chess // -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/tile_mapped_read/run.lit b/test/npu-xrt/tile_mapped_read/run.lit index 2b8296842dc..e7bfd59e00f 100644 --- a/test/npu-xrt/tile_mapped_read/run.lit +++ b/test/npu-xrt/tile_mapped_read/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai_npu1, chess // // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/kernel.cpp -o kernel.o -// RUN: %python aiecc.py %aiecc_backend_flags --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc %backend_flags --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/two_col/run.lit b/test/npu-xrt/two_col/run.lit index 76506dfa84e..8b341c002bf 100644 --- a/test/npu-xrt/two_col/run.lit +++ b/test/npu-xrt/two_col/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai_npu1, chess // // RUN: xchesscc_wrapper aie2 -I %aietools/include -DBIT_WIDTH=8 -c %S/threshold.cc -o ./threshold.o -// RUN: %python aiecc.py --xchesscc --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc --xchesscc --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/vec_mul_event_trace/test.py b/test/npu-xrt/vec_mul_event_trace/test.py index 6b2f5388bab..1d388bd9841 100644 --- a/test/npu-xrt/vec_mul_event_trace/test.py +++ b/test/npu-xrt/vec_mul_event_trace/test.py @@ -14,7 +14,7 @@ # Build the test # RUN: xchesscc_wrapper aie2p -I %aietools/include -c %S/vector_scalar_mul.cc -o vector_scalar_mul.o -# RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin %S/aie.mlir +# RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin %S/aie.mlir # Run the test (input_with_addresses.mlir contains the lowered npu_write ops) # RUN: %run_on_npu2% %python %S/test.py --xclbin final.xclbin --instr insts.bin --kernel MLIR_AIE --trace-sz 8192 --mlir aie.mlir.prj/input_with_addresses.mlir | FileCheck %s diff --git a/test/npu-xrt/vec_mul_trace_distribute_lateral/test.py b/test/npu-xrt/vec_mul_trace_distribute_lateral/test.py index e9eb365a45e..6671c2d8733 100644 --- a/test/npu-xrt/vec_mul_trace_distribute_lateral/test.py +++ b/test/npu-xrt/vec_mul_trace_distribute_lateral/test.py @@ -27,7 +27,7 @@ # Pre-lower trace ops with distribute + lateral options, then compile. # The trace pipeline in aiecc is a no-op since trace ops are already consumed. # RUN: aie-opt %S/aie.mlir -aie-insert-trace-flows="distribute-channels=true lateral-routing=true" -aie-trace-to-config -aie-trace-pack-reg-writes -aie-inline-trace-config -o trace_lowered.mlir -# RUN: %python aiecc.py --no-xchesscc --no-xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin trace_lowered.mlir +# RUN: %aiecc --no-xchesscc --no-xbridge --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.bin trace_lowered.mlir # # Run on NPU1 hardware: # RUN: %run_on_npu1% %python %S/test.py --xclbin final.xclbin --instr insts.bin --kernel MLIR_AIE --trace-sz 16384 --mlir trace_lowered.mlir.prj/input_with_addresses.mlir | FileCheck %s diff --git a/test/npu-xrt/vec_vec_add_memtile_init/run.lit b/test/npu-xrt/vec_vec_add_memtile_init/run.lit index 23ebbaceb54..e7eaead4332 100644 --- a/test/npu-xrt/vec_vec_add_memtile_init/run.lit +++ b/test/npu-xrt/vec_vec_add_memtile_init/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/vec_vec_add_objfifo_init/aie2.py b/test/npu-xrt/vec_vec_add_objfifo_init/aie2.py index 056ed79cd00..6e9341b381b 100644 --- a/test/npu-xrt/vec_vec_add_objfifo_init/aie2.py +++ b/test/npu-xrt/vec_vec_add_objfifo_init/aie2.py @@ -9,7 +9,7 @@ # REQUIRES: ryzen_ai_npu1, peano # # RUN: %python %S/aie2.py npu 0 > ./aie2.mlir -# RUN: %python aiecc.py --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --no-xchesscc --no-xbridge --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir +# RUN: %aiecc --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --no-xchesscc --no-xbridge --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie2.mlir # RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags # RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin import numpy as np diff --git a/test/npu-xrt/vec_vec_add_tile_init/run.lit b/test/npu-xrt/vec_vec_add_tile_init/run.lit index 5494bc39712..8ece9517af1 100644 --- a/test/npu-xrt/vec_vec_add_tile_init/run.lit +++ b/test/npu-xrt/vec_vec_add_tile_init/run.lit @@ -6,7 +6,7 @@ // RUN: cp %S/aie.mlir aie_arch.mlir // RUN: %run_on_npu1% sed 's/NPUDEVICE/npu1_1col/g' -i aie_arch.mlir // RUN: %run_on_npu2% sed 's/NPUDEVICE/npu2_1col/g' -i aie_arch.mlir -// RUN: %python aiecc.py %aiecc_backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir +// RUN: %aiecc %backend_flags --no-aiesim --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --alloc-scheme=basic-sequential --xclbin-name=aie.xclbin --npu-insts-name=insts.bin ./aie_arch.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin // RUN: %run_on_npu2% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin diff --git a/test/npu-xrt/vector_scalar_using_dma/run.lit b/test/npu-xrt/vector_scalar_using_dma/run.lit index b93e0faf99b..7ff4646007c 100644 --- a/test/npu-xrt/vector_scalar_using_dma/run.lit +++ b/test/npu-xrt/vector_scalar_using_dma/run.lit @@ -4,6 +4,6 @@ // REQUIRES: ryzen_ai_npu1, chess // // RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/scale.cc -o ./scale.o -// RUN: %python aiecc.py --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir +// RUN: %aiecc --xbridge --aie-generate-xclbin --aie-generate-npu-insts --no-compile-host --xclbin-name=aie.xclbin --npu-insts-name=insts.bin %S/aie.mlir // RUN: %host_clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags %host_link_flags %test_utils_flags // RUN: %run_on_npu1% ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.bin From f7cb07096ace2d665fe65ec02b0f861aa848c6f8 Mon Sep 17 00:00:00 2001 From: thomthehound Date: Fri, 15 May 2026 20:07:37 -0400 Subject: [PATCH 4/5] centralize tool subs2 Signed-off-by: thomthehound --- python/aie_lit_utils/lit_config_helpers.py | 4 +--- test/npu-xrt/dmabd_task_queue/test.cpp | 8 ++++---- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/python/aie_lit_utils/lit_config_helpers.py b/python/aie_lit_utils/lit_config_helpers.py index 20692cddab8..820e07b141c 100644 --- a/python/aie_lit_utils/lit_config_helpers.py +++ b/python/aie_lit_utils/lit_config_helpers.py @@ -380,9 +380,7 @@ def detect_xrt( "Running tests on NPU1 with command line: %s", run_on_npu1 ) else: - logger.warning( - "NPU1 detected but no AIE2 backend is available" - ) + logger.warning("NPU1 detected but no AIE2 backend is available") elif any( known in model for known in LitConfigHelper.NPU_MODELS["npu2"] ): diff --git a/test/npu-xrt/dmabd_task_queue/test.cpp b/test/npu-xrt/dmabd_task_queue/test.cpp index 8d2f2fed51a..575ae31a48f 100644 --- a/test/npu-xrt/dmabd_task_queue/test.cpp +++ b/test/npu-xrt/dmabd_task_queue/test.cpp @@ -8,18 +8,18 @@ // //===----------------------------------------------------------------------===// -#include #include -#include -#include -#include +#include #include #include +#include #include #include #include #include #include +#include +#include #include "cxxopts.hpp" #include "test_utils.h" From 34f72bbafe7ea9efbcabca0fa571bf558d98fc94 Mon Sep 17 00:00:00 2001 From: thomthehound Date: Mon, 18 May 2026 15:00:49 -0400 Subject: [PATCH 5/5] Do not let Peano force NPU2 simply by existing Signed-off-by: thomthehound --- programming_examples/lit.cfg.py | 23 ++++++++++++---------- programming_guide/lit.cfg.py | 23 ++++++++++++---------- python/aie_lit_utils/lit_config_helpers.py | 10 +++++----- test/lit.cfg.py | 23 ++++++++++++---------- utils/run_on_npu.py | 2 +- 5 files changed, 45 insertions(+), 36 deletions(-) diff --git a/programming_examples/lit.cfg.py b/programming_examples/lit.cfg.py index 7e7a5939312..ed58de2b50b 100755 --- a/programming_examples/lit.cfg.py +++ b/programming_examples/lit.cfg.py @@ -65,16 +65,6 @@ early_peano_tools_dir, config.peano_install_dir, llvm_config ) -# Detect XRT and Ryzen AI NPU devices -xrt_config = LitConfigHelper.detect_xrt( - config.xrt_lib_dir, - config.xrt_include_dir, - config.xrt_bin_dir, - config.aie_src_root, - config.vitis_components, - has_peano_backend=early_peano_config.found, -) - # Detect OpenCV opencv_config = LitConfigHelper.detect_opencv( config.opencv_include_dir, config.opencv_lib_dir, config.opencv_libs @@ -131,6 +121,19 @@ config.vitis_root, config.enable_chess_tests, llvm_config ) +# Peano may gate Ryzen AI features only when it is the active fallback backend. +can_use_peano_feature_gate = early_peano_config.found and not chess_config.found + +# Detect XRT and Ryzen AI NPU devices +xrt_config = LitConfigHelper.detect_xrt( + config.xrt_lib_dir, + config.xrt_include_dir, + config.xrt_bin_dir, + config.aie_src_root, + config.vitis_components, + can_use_peano_feature_gate=can_use_peano_feature_gate, +) + # Apply all hardware/tool configurations LitConfigHelper.apply_config_to_lit( config, diff --git a/programming_guide/lit.cfg.py b/programming_guide/lit.cfg.py index ccc8f25f9c5..019458b1804 100755 --- a/programming_guide/lit.cfg.py +++ b/programming_guide/lit.cfg.py @@ -60,16 +60,6 @@ early_peano_tools_dir, config.peano_install_dir, llvm_config ) -# Detect XRT and Ryzen AI NPU devices -xrt_config = LitConfigHelper.detect_xrt( - config.xrt_lib_dir, - config.xrt_include_dir, - config.xrt_bin_dir, - config.aie_src_root, - config.vitis_components, - has_peano_backend=early_peano_config.found, -) - llvm_config.use_default_substitutions() # excludes: A list of files and directories to exclude from the testsuite @@ -107,6 +97,19 @@ config.vitis_root, config.enable_chess_tests, llvm_config ) +# Peano may gate Ryzen AI features only when it is the active fallback backend. +can_use_peano_feature_gate = early_peano_config.found and not chess_config.found + +# Detect XRT and Ryzen AI NPU devices +xrt_config = LitConfigHelper.detect_xrt( + config.xrt_lib_dir, + config.xrt_include_dir, + config.xrt_bin_dir, + config.aie_src_root, + config.vitis_components, + can_use_peano_feature_gate=can_use_peano_feature_gate, +) + # Apply all hardware/tool configurations LitConfigHelper.apply_config_to_lit( config, diff --git a/python/aie_lit_utils/lit_config_helpers.py b/python/aie_lit_utils/lit_config_helpers.py index 820e07b141c..771b026a42b 100644 --- a/python/aie_lit_utils/lit_config_helpers.py +++ b/python/aie_lit_utils/lit_config_helpers.py @@ -257,7 +257,7 @@ def detect_xrt( xrt_bin_dir: str, aie_src_root: str, vitis_components: Optional[List[str]] = None, - has_peano_backend: bool = False, + can_use_peano_feature_gate: bool = False, ) -> HardwareConfig: """ Detect XRT installation and Ryzen AI NPU hardware. @@ -268,8 +268,8 @@ def detect_xrt( xrt_bin_dir: Path to XRT binary directory aie_src_root: Path to AIE source root (for the run_on_npu wrapper) vitis_components: List of available Vitis components for feature filtering - has_peano_backend: Whether a working Peano backend is available for - AIE2/AIE2P compilation when Chess/Vitis AIETOOLS are absent + can_use_peano_feature_gate: Whether Peano may be used for Ryzen AI + feature gating when Vitis AIETOOLS support is absent Returns: HardwareConfig with XRT detection results @@ -370,7 +370,7 @@ def detect_xrt( # Map model to NPU generation and filter by available components # Use substring matching so e.g. "Krackan" matches "Krackan 1" if any(known in model for known in LitConfigHelper.NPU_MODELS["npu1"]): - if "AIE2" in vitis_components or has_peano_backend: + if "AIE2" in vitis_components or can_use_peano_feature_gate: run_on_npu1 = LitConfigHelper._run_on_npu_wrap( aie_src_root, "npu1" ) @@ -384,7 +384,7 @@ def detect_xrt( elif any( known in model for known in LitConfigHelper.NPU_MODELS["npu2"] ): - if "AIE2P" in vitis_components or has_peano_backend: + if "AIE2P" in vitis_components or can_use_peano_feature_gate: run_on_npu2 = LitConfigHelper._run_on_npu_wrap( aie_src_root, "npu2" ) diff --git a/test/lit.cfg.py b/test/lit.cfg.py index 71923f40696..eec46e8f228 100644 --- a/test/lit.cfg.py +++ b/test/lit.cfg.py @@ -75,16 +75,6 @@ early_peano_tools_dir, config.peano_install_dir, llvm_config ) -# Detect XRT and Ryzen AI NPU devices -xrt_config = LitConfigHelper.detect_xrt( - config.xrt_lib_dir, - config.xrt_include_dir, - config.xrt_bin_dir, - config.aie_src_root, - config.vitis_components, - has_peano_backend=early_peano_config.found, -) - # Setup host target triplet and sysroot triplet, sysroot_flag = LitConfigHelper.setup_host_target_triplet( config.aieHostTarget, config.vitis_sysroot @@ -137,6 +127,19 @@ config.vitis_root, config.enable_chess_tests, llvm_config ) +# Peano may gate Ryzen AI features only when it is the active fallback backend. +can_use_peano_feature_gate = early_peano_config.found and not chess_config.found + +# Detect XRT and Ryzen AI NPU devices +xrt_config = LitConfigHelper.detect_xrt( + config.xrt_lib_dir, + config.xrt_include_dir, + config.xrt_bin_dir, + config.aie_src_root, + config.vitis_components, + can_use_peano_feature_gate=can_use_peano_feature_gate, +) + # Detect aiesimulator aiesim_config = LitConfigHelper.detect_aiesimulator(config.aie_obj_root) diff --git a/utils/run_on_npu.py b/utils/run_on_npu.py index 5512ab73b68..a8efa229c19 100644 --- a/utils/run_on_npu.py +++ b/utils/run_on_npu.py @@ -11,7 +11,7 @@ import time # Retry configuration -TRANSIENT_FAILURE_TEXT = "No such device with index" +TRANSIENT_FAILURE_TEXT = "No such device" MAX_ATTEMPTS = 3 TAIL_LINES = 200