RAM4K.hdl

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM4K.hdl

/**
 * Memory of 4K registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM4K {
    IN in[16], load, address[12];
    OUT out[16];
    //Exact same code as earlier, this is just recursive
    PARTS:
    DMux8Way(in=load,sel=address[9..11],a=l0,b=l1,c=l2,d=l3,e=l4,f=l5,g=l6,h=l7);
    RAM512(in=in, load=l0, address=address[0..8], out=out0);
    RAM512(in=in, load=l1, address=address[0..8], out=out1);
    RAM512(in=in, load=l2, address=address[0..8], out=out2);
    RAM512(in=in, load=l3, address=address[0..8], out=out3);
    RAM512(in=in, load=l4, address=address[0..8], out=out4);
    RAM512(in=in, load=l5, address=address[0..8], out=out5);
    RAM512(in=in, load=l6, address=address[0..8], out=out6);
    RAM512(in=in, load=l7, address=address[0..8], out=out7);
    Mux8Way16(a=out0,b=out1,c=out2,d=out3,e=out4,f=out5,g=out6,h=out7,sel=address[9..11],out=out);
}