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ZigaMahneZigaMahne
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Code cleanup
- Update documentation - update schemaVersion
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Lines changed: 8 additions & 58 deletions

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‎Keil.STM32N6xx_DFP.pdsc‎

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@@ -1,5 +1,5 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<package schemaVersion="1.7.36" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="https://raw.githubusercontent.com/Open-CMSIS-Pack/Open-CMSIS-Pack-Spec/v1.7.36/schema/PACK.xsd">
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<package schemaVersion="1.7.36" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="https://raw.githubusercontent.com/Open-CMSIS-Pack/Open-CMSIS-Pack-Spec/v1.7.56/schema/PACK.xsd">
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<vendor>Keil</vendor>
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<name>STM32N6xx_DFP</name>
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<description overview="Documents/OVERVIEW.md">STMicroelectronics STM32N6 Series Device Support</description>
@@ -40,7 +40,6 @@ High-performance STM32N6 MCUs with Arm Cortex-M55 core, MVE, MPU, cache, DSP, DP
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<compile define="STM32N657xx"/>
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<book name="https://www.st.com/resource/en/reference_manual/rm0486-stm32n647657xx-armbased-32bit-mcus-stmicroelectronics.pdf" title="STM32N647/657xx Reference Manual"/>
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<book name="https://www.st.com/resource/en/datasheet/stm32n657a0.pdf" title="STM32N6x5xx STM32N6x7xx Data Sheet"/>
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<feature type="NPU" n="ST Neural-ART Accelerator" m="288MACs"/>
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<!-- BootROM copies the FSBL binary into the internal AXISRAM2 -->
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<memory name="FSBL_CODE_NS" access="rwx" start="0x24180400" size="0x0003FC00" alias="FSBL_CODE_S" />
@@ -112,7 +111,6 @@ High-performance STM32N6 MCUs with Arm Cortex-M55 core, MVE, MPU, cache, DSP, DP
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<compile define="STM32N647xx"/>
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<book name="https://www.st.com/resource/en/reference_manual/rm0486-stm32n647657xx-armbased-32bit-mcus-stmicroelectronics.pdf" title="STM32N647/657xx Reference Manual"/>
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<book name="https://www.st.com/resource/en/datasheet/stm32n657a0.pdf" title="STM32N6x5xx STM32N6x7xx Data Sheet"/>
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<feature type="NPU" n="ST Neural-ART Accelerator" m="288MACs"/>
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<!-- BootROM copies the FSBL binary into the internal AXISRAM2 -->
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<memory name="FSBL_CODE_NS" access="rwx" start="0x24180400" size="0x0003FC00" default="1" init="0" startup="1" />
@@ -184,7 +182,6 @@ High-performance STM32N6 MCUs with Arm Cortex-M55 core, MVE, MPU, cache, DSP, DP
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<compile define="STM32N645xx"/>
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<book name="https://www.st.com/resource/en/reference_manual/rm0486-stm32n647657xx-armbased-32bit-mcus-stmicroelectronics.pdf" title="STM32N647/657xx Reference Manual"/>
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<book name="https://www.st.com/resource/en/datasheet/stm32n657a0.pdf" title="STM32N6x5xx STM32N6x7xx Data Sheet"/>
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<feature type="NPU" n="ST Neural-ART Accelerator" m="288MACs"/>
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<!-- BootROM copies the FSBL binary into the internal AXISRAM2 -->
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<memory name="FSBL_CODE_NS" access="rwx" start="0x24180400" size="0x0003FC00" default="1" init="0" startup="1" />
@@ -254,7 +251,6 @@ High-performance STM32N6 MCUs with Arm Cortex-M55 core, MVE, MPU, cache, DSP, DP
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<compile define="STM32N655xx"/>
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<book name="https://www.st.com/resource/en/reference_manual/rm0486-stm32n647657xx-armbased-32bit-mcus-stmicroelectronics.pdf" title="STM32N647/657xx Reference Manual"/>
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<book name="https://www.st.com/resource/en/datasheet/stm32n657a0.pdf" title="STM32N6x5xx STM32N6x7xx Data Sheet"/>
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<feature type="NPU" n="ST Neural-ART Accelerator" m="288MACs"/>
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<!-- BootROM copies the FSBL binary into the internal AXISRAM2 -->
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<memory name="FSBL_CODE_NS" access="rwx" start="0x24180400" size="0x0003FC00" default="1" init="0" startup="1" />

‎Templates/FSBL/README.md‎

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@@ -160,14 +160,14 @@ Configure `target` in STM32CubeMX
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- **FLASH MODE:**
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- Set the boot mode configuration in **flash mode** and reset board
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> To flash an unprogrammed (virgin) `target`, ensure that the board is in development mode.
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- Open .vscode\launch.json file and modify configuration named "STLink@pyOCD (launch)" under **initCommands** and **customResetCommands** commands:
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- Modify the command name from **tbreak main** to **thbreak main**
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- Open `.vscode\launch.json` file and modify configuration named "STLink@pyOCD (launch)" under **initCommands** and **customResetCommands**:
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- Modify the command from **tbreak main** to **thbreak main**
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- Click **Load & Debug application** button and now program should wait in main function to start debug
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- With Continue (F5) button, LED should blink in flash mode
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- **DEVELOPMENT MODE:**
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- Set the boot mode configuration in **development mode** and reset board
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- Open .vscode\launch.json file and modify configuration named "STLink@pyOCD (launch)"
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- Open `.vscode\launch.json` file and modify configuration named "STLink@pyOCD (launch)"
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- Comment line
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```jsonc

‎Templates/FSBL_LRUN/README.md‎

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@@ -189,14 +189,14 @@ Configure `target` in STM32CubeMX
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- **FLASH MODE:**
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- Set the boot mode configuration in **flash mode** and reset board
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> To flash an unprogrammed (virgin) `target`, ensure that the board is in development mode.
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- Open .vscode\launch.json file and modify configuration named "STLink@pyOCD (launch)" under **initCommands** and **customResetCommands** commands:
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- Modify the command name from **tbreak main** to **thbreak main**
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- Open `.vscode\launch.json` file and modify configuration named "STLink@pyOCD (launch)" under **initCommands** and **customResetCommands** commands:
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- Modify the command from **tbreak main** to **thbreak main**
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- Click **Load & Debug application** button and now program should wait in main function to start debug
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- With Continue (F5) button, LED should blink in flash mode
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- **DEVELOPMENT MODE:**
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- Set the boot mode configuration in **development mode** and reset board
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- Open .vscode\launch.json file and modify configuration named "STLink@pyOCD (launch)"
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- Open `.vscode\launch.json` file and modify configuration named "STLink@pyOCD (launch)"
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- Comment line
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```jsonc

‎Templates/FSBL_XIP/README.md‎

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Original file line numberDiff line numberDiff line change
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- **FLASH MODE:**
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- Set the boot mode configuration in **flash mode** and reset board
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> To flash an unprogrammed (virgin) `target`, ensure that the board is in development mode.
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- Open .vscode\launch.json file and modify configuration named "STLink@pyOCD (launch)"
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- Open `.vscode\launch.json` file and modify configuration named "STLink@pyOCD (launch)"
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- Comment line
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```jsonc
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- Click **Load & Debug application** button and now program should wait in main function to start debug
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- With Continue (F5) button, LED should blink in flash mode
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- **DEVELOPMENT MODE:**
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- Set the boot mode configuration in **development mode** and reset board
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- Open .vscode\launch.json file and modify configuration named "STLink@pyOCD (launch)"
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- Comment line
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```jsonc
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// "preLaunchTask": "CMSIS Load",
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```
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- add commands into initCommands
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```json
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"initCommands": [
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"monitor reset halt",
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"symbol-file \"out/FSBL/<target>/Debug/FSBL.axf\"",
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"load out/FSBL/<target>/Debug/FSBL.hex",
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"set $pc = Reset_Handler",
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"set $sp = (int) &Image$$ARM_LIB_STACK$$ZI$$Limit",
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"thbreak JumpToApplication",
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"continue",
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"symbol-file \"out/Appli/<target>/Debug/Appli.axf\"",
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"tbreak main"
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```
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- add commands into customResetCommands
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```json
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"customResetCommands": [
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"monitor reset halt",
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"maintenance flush register-cache",
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"maintenance flush dcache",
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"symbol-file \"out/FSBL/<target>/Debug/FSBL.axf\"",
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"load out/FSBL/<target>/Debug/FSBL.hex",
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"set $pc = Reset_Handler",
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"set $sp = (int) &Image$$ARM_LIB_STACK$$ZI$$Limit",
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"thbreak JumpToApplication",
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"continue",
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"symbol-file \"out/Appli/<target>/Debug/Appli.axf\"",
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"tbreak main",
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"continue"
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```
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- Save launch.json
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- Click **Load & Debug application** button and now program should wait in main function to start debug
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- With Continue (F5) button, configured LED should blink in development mode
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> [STM32N6570-DK board](https://github.com/Open-CMSIS-Pack/STM32N6570-DK_BSP/blob/main/Examples/FSBL_XIP#build-and-load-in-vscode) Build, Load and Debug configuration

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