Skip to content

Commit f1ca631

Browse files
knn-kknn-k
committed
AArch64: Add new overloads of generateConditionalBranchInstruction()
This commit adds new function overloads of generateConditionalBranchInstruction() for AArch64 that don't take opcode as one of the parameters, because it must always be TR::InstOpCode::b_cond. Signed-off-by: KONNO Kazuhiro <konno@jp.ibm.com>
1 parent 100ae6b commit f1ca631

5 files changed

Lines changed: 81 additions & 48 deletions

File tree

‎compiler/aarch64/codegen/ControlFlowEvaluator.cpp‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -249,9 +249,9 @@ static TR::Instruction *ificmpHelper(TR::Node *node, TR::ARM64ConditionCode cc,
249249
cg->evaluate(thirdChild);
250250

251251
deps = generateRegisterDependencyConditions(cg, thirdChild, 0);
252-
result = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, cc, deps);
252+
result = generateConditionalBranchInstruction(cg, node, dstLabel, cc, deps);
253253
} else {
254-
result = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, cc);
254+
result = generateConditionalBranchInstruction(cg, node, dstLabel, cc);
255255
}
256256

257257
cg->decReferenceCount(firstChild);
@@ -595,8 +595,8 @@ TR::Register *OMR::ARM64::TreeEvaluator::lookupEvaluator(TR::Node *node, TR::Cod
595595
cg->evaluate(child->getFirstChild());
596596
cond = cond->clone(cg, generateRegisterDependencyConditions(cg, child->getFirstChild(), 0));
597597
}
598-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node,
599-
child->getBranchDestination()->getNode()->getLabel(), TR::CC_EQ, cond);
598+
generateConditionalBranchInstruction(cg, node, child->getBranchDestination()->getNode()->getLabel(), TR::CC_EQ,
599+
cond);
600600
}
601601

602602
// Branch to default
@@ -643,7 +643,7 @@ TR::Register *OMR::ARM64::TreeEvaluator::tableEvaluator(TR::Node *node, TR::Code
643643
if (5 > numBranchTableEntries) {
644644
for (i = 0; i < numBranchTableEntries; i++) {
645645
generateCompareImmInstruction(cg, node, selectorReg, i);
646-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node,
646+
generateConditionalBranchInstruction(cg, node,
647647
node->getChild(2 + i)->getBranchDestination()->getNode()->getLabel(), TR::CC_EQ);
648648
}
649649

@@ -657,8 +657,8 @@ TR::Register *OMR::ARM64::TreeEvaluator::tableEvaluator(TR::Node *node, TR::Code
657657
generateCompareImmInstruction(cg, node, selectorReg, numBranchTableEntries);
658658
}
659659

660-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node,
661-
defaultChild->getBranchDestination()->getNode()->getLabel(), TR::CC_CS);
660+
generateConditionalBranchInstruction(cg, node, defaultChild->getBranchDestination()->getNode()->getLabel(),
661+
TR::CC_CS);
662662
generateTrg1ImmInstruction(cg, TR::InstOpCode::adr, node, tmpRegister,
663663
12); // distance between this instruction to the jump table
664664
generateTrg1Src2ShiftedInstruction(cg, TR::InstOpCode::addx, node, tmpRegister, tmpRegister, selectorReg,

‎compiler/aarch64/codegen/FPTreeEvaluator.cpp‎

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -540,33 +540,32 @@ static TR::Instruction *iffcmpHelper(TR::Node *node, TR::ARM64ConditionCode cc,
540540

541541
TR::RegisterDependencyConditions *deps = generateRegisterDependencyConditions(cg, thirdChild, 0);
542542
if (!needsExplicitUnorderedCheck) {
543-
result = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, cc, deps);
543+
result = generateConditionalBranchInstruction(cg, node, dstLabel, cc, deps);
544544
} else {
545545
if (cc == TR::CC_NE) {
546546
/* iffcmpne/ifdcmpne: false if CC_VS is set */
547547
TR::LabelSymbol *doneLabel = generateLabelSymbol(cg);
548-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, doneLabel, TR::CC_VS);
549-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, cc, deps);
548+
generateConditionalBranchInstruction(cg, node, doneLabel, TR::CC_VS);
549+
generateConditionalBranchInstruction(cg, node, dstLabel, cc, deps);
550550
result = generateLabelInstruction(cg, TR::InstOpCode::label, node, doneLabel);
551551
} else {
552-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, cc);
553-
result
554-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, TR::CC_VS, deps);
552+
generateConditionalBranchInstruction(cg, node, dstLabel, cc);
553+
result = generateConditionalBranchInstruction(cg, node, dstLabel, TR::CC_VS, deps);
555554
}
556555
}
557556
} else {
558557
if (!needsExplicitUnorderedCheck) {
559-
result = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, cc);
558+
result = generateConditionalBranchInstruction(cg, node, dstLabel, cc);
560559
} else {
561560
if (cc == TR::CC_NE) {
562561
/* iffcmpne/ifdcmpne: false if CC_VS is set */
563562
TR::LabelSymbol *doneLabel = generateLabelSymbol(cg);
564-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, doneLabel, TR::CC_VS);
565-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, cc);
563+
generateConditionalBranchInstruction(cg, node, doneLabel, TR::CC_VS);
564+
generateConditionalBranchInstruction(cg, node, dstLabel, cc);
566565
result = generateLabelInstruction(cg, TR::InstOpCode::label, node, doneLabel);
567566
} else {
568-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, cc);
569-
result = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, dstLabel, TR::CC_VS);
567+
generateConditionalBranchInstruction(cg, node, dstLabel, cc);
568+
result = generateConditionalBranchInstruction(cg, node, dstLabel, TR::CC_VS);
570569
}
571570
}
572571
}
@@ -770,7 +769,7 @@ static TR::Register *floatThreeWayCompareHelper(TR::Node *node, bool isDouble, b
770769

771770
generateSrc2Instruction(cg, cmpOp, node, src1Reg, src2Reg); // compare
772771
generateTrg1ImmInstruction(cg, TR::InstOpCode::movzx, node, trgReg, 0);
773-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, doneLabel, TR::CC_EQ);
772+
generateConditionalBranchInstruction(cg, node, doneLabel, TR::CC_EQ);
774773
generateTrg1ImmInstruction(cg, movOp, node, trgReg, movVal); // 1 or -1
775774
generateCondTrg1Src2Instruction(cg, TR::InstOpCode::csnegx, node, trgReg, trgReg, trgReg, cc);
776775
generateLabelInstruction(cg, TR::InstOpCode::label, node, doneLabel);

‎compiler/aarch64/codegen/GenerateInstructions.cpp‎

Lines changed: 23 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -97,21 +97,38 @@ TR::Instruction *generateLabelInstruction(TR::CodeGenerator *cg, TR::InstOpCode:
9797
return new (cg->trHeapMemory()) TR::ARM64LabelInstruction(op, node, sym, cond, cg);
9898
}
9999

100+
TR::Instruction *generateConditionalBranchInstruction(TR::CodeGenerator *cg, TR::Node *node, TR::LabelSymbol *sym,
101+
TR::ARM64ConditionCode cc, TR::Instruction *preced)
102+
{
103+
if (preced)
104+
return new (cg->trHeapMemory())
105+
TR::ARM64ConditionalBranchInstruction(TR::InstOpCode::b_cond, node, sym, cc, preced, cg);
106+
return new (cg->trHeapMemory()) TR::ARM64ConditionalBranchInstruction(TR::InstOpCode::b_cond, node, sym, cc, cg);
107+
}
108+
109+
TR::Instruction *generateConditionalBranchInstruction(TR::CodeGenerator *cg, TR::Node *node, TR::LabelSymbol *sym,
110+
TR::ARM64ConditionCode cc, TR::RegisterDependencyConditions *cond, TR::Instruction *preced)
111+
{
112+
if (preced)
113+
return new (cg->trHeapMemory())
114+
TR::ARM64ConditionalBranchInstruction(TR::InstOpCode::b_cond, node, sym, cc, cond, preced, cg);
115+
return new (cg->trHeapMemory())
116+
TR::ARM64ConditionalBranchInstruction(TR::InstOpCode::b_cond, node, sym, cc, cond, cg);
117+
}
118+
100119
TR::Instruction *generateConditionalBranchInstruction(TR::CodeGenerator *cg, TR::InstOpCode::Mnemonic op,
101120
TR::Node *node, TR::LabelSymbol *sym, TR::ARM64ConditionCode cc, TR::Instruction *preced)
102121
{
103-
if (preced)
104-
return new (cg->trHeapMemory()) TR::ARM64ConditionalBranchInstruction(op, node, sym, cc, preced, cg);
105-
return new (cg->trHeapMemory()) TR::ARM64ConditionalBranchInstruction(op, node, sym, cc, cg);
122+
TR_ASSERT_FATAL(op == TR::InstOpCode::b_cond, "Unsupported opcode for Conditional branch");
123+
return generateConditionalBranchInstruction(cg, node, sym, cc, preced);
106124
}
107125

108126
TR::Instruction *generateConditionalBranchInstruction(TR::CodeGenerator *cg, TR::InstOpCode::Mnemonic op,
109127
TR::Node *node, TR::LabelSymbol *sym, TR::ARM64ConditionCode cc, TR::RegisterDependencyConditions *cond,
110128
TR::Instruction *preced)
111129
{
112-
if (preced)
113-
return new (cg->trHeapMemory()) TR::ARM64ConditionalBranchInstruction(op, node, sym, cc, cond, preced, cg);
114-
return new (cg->trHeapMemory()) TR::ARM64ConditionalBranchInstruction(op, node, sym, cc, cond, cg);
130+
TR_ASSERT_FATAL(op == TR::InstOpCode::b_cond, "Unsupported opcode for Conditional branch");
131+
return generateConditionalBranchInstruction(cg, node, sym, cc, cond, preced);
115132
}
116133

117134
TR::Instruction *generateCompareBranchInstruction(TR::CodeGenerator *cg, TR::InstOpCode::Mnemonic op, TR::Node *node,

‎compiler/aarch64/codegen/GenerateInstructions.hpp‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -135,6 +135,31 @@ TR::Instruction *generateLabelInstruction(TR::CodeGenerator *cg, TR::InstOpCode:
135135
TR::Instruction *generateLabelInstruction(TR::CodeGenerator *cg, TR::InstOpCode::Mnemonic op, TR::Node *node,
136136
TR::LabelSymbol *sym, TR::RegisterDependencyConditions *cond, TR::Instruction *preced = NULL);
137137

138+
/*
139+
* @brief Generates conditional branch instruction
140+
* @param[in] cg : CodeGenerator
141+
* @param[in] node : node
142+
* @param[in] sym : label symbol
143+
* @param[in] cc : branch condition code
144+
* @param[in] preced : preceding instruction
145+
* @return generated instruction
146+
*/
147+
TR::Instruction *generateConditionalBranchInstruction(TR::CodeGenerator *cg, TR::Node *node, TR::LabelSymbol *sym,
148+
TR::ARM64ConditionCode cc, TR::Instruction *preced = NULL);
149+
150+
/*
151+
* @brief Generates conditional branch instruction with register dependency
152+
* @param[in] cg : CodeGenerator
153+
* @param[in] node : node
154+
* @param[in] sym : label symbol
155+
* @param[in] cc : branch condition code
156+
* @param[in] cond : register dependency condition
157+
* @param[in] preced : preceding instruction
158+
* @return generated instruction
159+
*/
160+
TR::Instruction *generateConditionalBranchInstruction(TR::CodeGenerator *cg, TR::Node *node, TR::LabelSymbol *sym,
161+
TR::ARM64ConditionCode cc, TR::RegisterDependencyConditions *cond, TR::Instruction *preced = NULL);
162+
138163
/*
139164
* @brief Generates conditional branch instruction
140165
* @param[in] cg : CodeGenerator

‎compiler/aarch64/codegen/OMRTreeEvaluator.cpp‎

Lines changed: 15 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -4767,8 +4767,7 @@ static TR::Instruction *compareIntsAndBranchForArrayCopyBNDCHK(TR::ARM64Conditio
47674767

47684768
TR_ASSERT_FATAL_WITH_NODE(node, sr, "Must provide an ArrayCopyBNDCHK symref");
47694769
cg->addSnippet(new (cg->trHeapMemory()) TR::ARM64HelperCallSnippet(cg, node, snippetLabel, sr));
4770-
TR::Instruction *instr
4771-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, snippetLabel, branchCond);
4770+
TR::Instruction *instr = generateConditionalBranchInstruction(cg, node, snippetLabel, branchCond);
47724771

47734772
cg->machine()->setLinkRegisterKilled(true);
47744773
cg->decReferenceCount(firstChild);
@@ -6010,7 +6009,7 @@ TR::Register *OMR::ARM64::TreeEvaluator::arraysetEvaluator(TR::Node *node, TR::C
60106009
generateMemSrc2Instruction(cg, TR::InstOpCode::vstppreq, node,
60116010
TR::MemoryReference::createWithDisplacement(cg, dstReg, 256), vectorValueReg,
60126011
vectorValueReg);
6013-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, loopLabel, TR::CC_GT);
6012+
generateConditionalBranchInstruction(cg, node, loopLabel, TR::CC_GT);
60146013
srm->reclaimScratchRegister(countReg);
60156014
}
60166015
int64_t remainingLength = useLoop ? ((length - 32) % constLoopLen) : (length - 32);
@@ -6181,16 +6180,15 @@ TR::Register *OMR::ARM64::TreeEvaluator::arraysetEvaluator(TR::Node *node, TR::C
61816180
generateTrg1Src2Instruction(cg, TR::InstOpCode::addx, node, dstEndReg, dstReg, lengthReg);
61826181
TR::LabelSymbol *lessThan32Label = generateLabelSymbol(cg);
61836182
generateCompareImmInstruction(cg, node, lengthReg, 32, true);
6184-
auto branchToLessThan32LabelInstr
6185-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, lessThan32Label, TR::CC_CC);
6183+
auto branchToLessThan32LabelInstr = generateConditionalBranchInstruction(cg, node, lessThan32Label, TR::CC_CC);
61866184

61876185
generateMemSrc2Instruction(cg, TR::InstOpCode::vstpoffq, node,
61886186
TR::MemoryReference::createWithDisplacement(cg, dstReg, 0), vectorValueReg, vectorValueReg);
61896187

61906188
TR::LabelSymbol *lessThanOrEqual96Label = generateLabelSymbol(cg);
61916189
generateCompareImmInstruction(cg, node, lengthReg, 96, true);
61926190
auto branchToLessThanOrEqual96LabelInstr
6193-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, lessThanOrEqual96Label, TR::CC_LS);
6191+
= generateConditionalBranchInstruction(cg, node, lessThanOrEqual96Label, TR::CC_LS);
61946192
if (debugObj) {
61956193
debugObj->addInstructionComment(branchToLessThan32LabelInstr, "Jumps to lessThan32Label if length < 32.");
61966194
debugObj->addInstructionComment(branchToLessThanOrEqual96LabelInstr,
@@ -6224,8 +6222,7 @@ TR::Register *OMR::ARM64::TreeEvaluator::arraysetEvaluator(TR::Node *node, TR::C
62246222
TR::MemoryReference::createWithDisplacement(cg, dstReg, 32), vectorValueReg, vectorValueReg);
62256223
generateMemSrc2Instruction(cg, TR::InstOpCode::vstppreq, node,
62266224
TR::MemoryReference::createWithDisplacement(cg, dstReg, 64), vectorValueReg, vectorValueReg);
6227-
auto branchBackToMainLoopLabelInstr
6228-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, mainLoopLabel, TR::CC_HI);
6225+
auto branchBackToMainLoopLabelInstr = generateConditionalBranchInstruction(cg, node, mainLoopLabel, TR::CC_HI);
62296226
auto adjustDstRegInstr = generateTrg1Src2Instruction(cg, TR::InstOpCode::addx, node, dstReg, dstReg, lengthReg);
62306227
generateMemSrc2Instruction(cg, TR::InstOpCode::vstpoffq, node,
62316228
TR::MemoryReference::createWithDisplacement(cg, dstReg, 32), vectorValueReg, vectorValueReg);
@@ -6301,7 +6298,7 @@ TR::Register *OMR::ARM64::TreeEvaluator::arraysetEvaluator(TR::Node *node, TR::C
63016298
generateMemSrc1Instruction(cg, strOpCode, node,
63026299
TR::MemoryReference::createWithDisplacement(cg, dstReg, elementSize), valueReg);
63036300
auto branchBackToElementLoopLabelInstr
6304-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, elementLoopLabel, TR::CC_HI);
6301+
= generateConditionalBranchInstruction(cg, node, elementLoopLabel, TR::CC_HI);
63056302
if (debugObj) {
63066303
debugObj->addInstructionComment(lessThan16LabelInstr, "lessThan16Label");
63076304
debugObj->addInstructionComment(elementLoopLabelInstr, "elementLoopLabel");
@@ -6476,8 +6473,7 @@ static TR::Register *arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *
64766473
"Compares lengthReg with 0 if src1 and src2 are not the same array. Otherwise, sets EQ flag.");
64776474
}
64786475
}
6479-
auto branchToDoneLabelInstr
6480-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, doneLabel, TR::CC_EQ);
6476+
auto branchToDoneLabelInstr = generateConditionalBranchInstruction(cg, node, doneLabel, TR::CC_EQ);
64816477
if (debugObj) {
64826478
debugObj->addInstructionComment(branchToDoneLabelInstr,
64836479
"Done if src1 and src2 are the same array or length is 0.");
@@ -6493,8 +6489,7 @@ static TR::Register *arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *
64936489
TR::Register *data4Reg = srm->findOrCreateScratchRegister();
64946490
if (!isLengthGreaterThan15) {
64956491
generateCompareImmInstruction(cg, node, lengthReg, 16, /* is64bit */ true);
6496-
auto branchToLessThan16LabelInstr
6497-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, lessThan16Label, TR::CC_CC);
6492+
auto branchToLessThan16LabelInstr = generateConditionalBranchInstruction(cg, node, lessThan16Label, TR::CC_CC);
64986493
if (debugObj) {
64996494
debugObj->addInstructionComment(branchToLessThan16LabelInstr, "Jumps to lessThan16Label if length < 16.");
65006495
}
@@ -6514,12 +6509,10 @@ static TR::Register *arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *
65146509
generateCompareInstruction(cg, node, data1Reg, data2Reg, true);
65156510
}
65166511
generateConditionalCompareInstruction(cg, node, data3Reg, data4Reg, 0, TR::CC_EQ, true);
6517-
auto branchToNotEqual16LabelInstr2
6518-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, notEqual16Label, TR::CC_NE);
6512+
auto branchToNotEqual16LabelInstr2 = generateConditionalBranchInstruction(cg, node, notEqual16Label, TR::CC_NE);
65196513
auto subtractLengthInstr
65206514
= generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::subsimmx, node, lengthReg, lengthReg, 16);
6521-
auto branchBacktoLoop16LabelInstr
6522-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, loop16Label, TR::CC_CS);
6515+
auto branchBacktoLoop16LabelInstr = generateConditionalBranchInstruction(cg, node, loop16Label, TR::CC_CS);
65236516
if (debugObj) {
65246517
debugObj->addInstructionComment(loop16LabelInstr, "loop16Label");
65256518
debugObj->addInstructionComment(branchToNotEqual16LabelInstr2,
@@ -6530,8 +6523,7 @@ static TR::Register *arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *
65306523
}
65316524
if (isLengthGreaterThan15) {
65326525
generateCompareImmInstruction(cg, node, lengthReg, -16, true);
6533-
auto branchToDoneLabelInstr3
6534-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, done0Label, TR::CC_EQ);
6526+
auto branchToDoneLabelInstr3 = generateConditionalBranchInstruction(cg, node, done0Label, TR::CC_EQ);
65356527
auto adjustSrc1RegInstr
65366528
= generateTrg1Src2Instruction(cg, TR::InstOpCode::addx, node, src1Reg, src1Reg, lengthReg);
65376529
generateTrg1Src2Instruction(cg, TR::InstOpCode::addx, node, src2Reg, src2Reg, lengthReg);
@@ -6615,7 +6607,7 @@ static TR::Register *arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *
66156607
TR::MemoryReference::createWithDisplacement(cg, src2Reg, 1));
66166608
generateConditionalCompareInstruction(cg, node, data1Reg, data2Reg, 0, TR::CC_HI);
66176609
auto branchBacktoLessThan16LabelInstr
6618-
= generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, lessThan16Label, TR::CC_EQ);
6610+
= generateConditionalBranchInstruction(cg, node, lessThan16Label, TR::CC_EQ);
66196611
if (debugObj) {
66206612
debugObj->addInstructionComment(branchToDone0LabelInstr, "Jumps to done0Label.");
66216613
debugObj->addInstructionComment(lessThan16LabelInstr, "lessThan16Label");
@@ -6978,20 +6970,20 @@ static void inlinePrimitiveForwardArraycopy(TR::Node *node, TR::Register *srcAdd
69786970

69796971
const int32_t inlineThresholdBytes = 63;
69806972
generateCompareImmInstruction(cg, node, lengthReg, inlineThresholdBytes, true);
6981-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, oolArraycopyLabel, TR::CC_HI);
6973+
generateConditionalBranchInstruction(cg, node, oolArraycopyLabel, TR::CC_HI);
69826974

69836975
generateTrg1Src2Instruction(cg, TR::InstOpCode::subsx, node, x3ScratchReg, dstAddrReg, srcAddrReg);
69846976

69856977
// Skip if src and dest are the same
69866978
//
6987-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, doneLabel, TR::CC_EQ);
6979+
generateConditionalBranchInstruction(cg, node, doneLabel, TR::CC_EQ);
69886980

69896981
if (!node->isForwardArrayCopy()) {
69906982
// Check for forward arraycopy dynamically if not known. Forward arraycopies should be
69916983
// the more common case and are optimized inline.
69926984
//
69936985
generateCompareInstruction(cg, node, lengthReg, x3ScratchReg, true);
6994-
generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, oolArraycopyLabel, TR::CC_HI);
6986+
generateConditionalBranchInstruction(cg, node, oolArraycopyLabel, TR::CC_HI);
69956987
}
69966988

69976989
// Copy 32 bytes

0 commit comments

Comments
 (0)