Skip to content

Commit cd83161

Browse files
bama-nordicrlubos
authored andcommitted
boards: wifi: Add Wi-Fi support to nrf54lm20a PDK
Add Wi-Fi support to Daylight SoC on nRF54lm20a PDK via EB-II shield Signed-off-by: Bansidhar Mangalwedhekar <bansidhar.mangalwedhekar@nordicsemi.no>
1 parent 6795b98 commit cd83161

2 files changed

Lines changed: 80 additions & 0 deletions

File tree

boards/nordic/nrf54lm20pdk/nrf54lm20pdk_nrf54lm20a_cpuapp.dts

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,3 +25,6 @@
2525
&bt_hci_controller {
2626
status = "disabled";
2727
};
28+
29+
/* Get a node label for wi-fi spi to use in shield files */
30+
wifi_spi: &spi22 {};
Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,77 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor
3+
*
4+
* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
5+
*/
6+
7+
#include "../nrf7002eb2_gpio_pins_1.dtsi"
8+
9+
/ {
10+
chosen {
11+
zephyr,wifi = &wlan0;
12+
zephyr,console = &uart30;
13+
zephyr,shell-uart = &uart30;
14+
zephyr,uart-mcumgr = &uart30;
15+
zephyr,bt-mon-uart = &uart30;
16+
zephyr,bt-c2h-uart = &uart30;
17+
};
18+
};
19+
20+
&pinctrl {
21+
spi22_default: spi22_default {
22+
group1 {
23+
psels = <NRF_PSEL(SPIM_SCK, 1, 4)>,
24+
<NRF_PSEL(SPIM_MISO, 1, 5)>,
25+
<NRF_PSEL(SPIM_MOSI, 1, 6)>;
26+
bias-pull-down;
27+
};
28+
};
29+
30+
spi22_sleep: spi22_sleep {
31+
group1 {
32+
psels = <NRF_PSEL(SPIM_SCK, 1, 4)>,
33+
<NRF_PSEL(SPIM_MISO, 1, 5)>,
34+
<NRF_PSEL(SPIM_MOSI, 1, 6)>;
35+
bias-pull-down;
36+
low-power-enable;
37+
};
38+
};
39+
40+
uart30_default: uart30_default {
41+
group1 {
42+
psels = <NRF_PSEL(UART_TX, 0, 6)>;
43+
};
44+
45+
group2 {
46+
psels = <NRF_PSEL(UART_RX, 0, 7)>;
47+
bias-pull-up;
48+
};
49+
};
50+
51+
uart30_sleep: uart30_sleep {
52+
group1 {
53+
psels = <NRF_PSEL(UART_TX, 0, 6)>,
54+
<NRF_PSEL(UART_RX, 0, 7)>;
55+
low-power-enable;
56+
};
57+
};
58+
};
59+
60+
&spi22 {
61+
status = "okay";
62+
cs-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
63+
pinctrl-0 = <&spi22_default>;
64+
pinctrl-1 = <&spi22_sleep>;
65+
pinctrl-names = "default", "sleep";
66+
};
67+
68+
/* uart20 has pin conflicts with EB-II shield hence disabling that
69+
* and enabling uart30 as console port.
70+
*/
71+
&uart20 {
72+
status = "disabled";
73+
};
74+
75+
&uart30 {
76+
status = "okay";
77+
};

0 commit comments

Comments
 (0)