Update RV32 qemu Demo to support RVA23 (FreeRTOS#1329)

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Increase the memory for RVA23 compilation

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Update the regtest to include fpu registers

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Fix small issues for 64-bit configs

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Enable FPU unit

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Enable compilation for RVA23 platforms

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Fix copyright related CI issues

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Update submodule manifest

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Update a few typos and left overs

* Demo: RISC-V_RV32_QEMU_VIRT_GCC: Apply @aggarg's sugestions

* Update pointer to Freertos-Kernel

Author: cubidesj

FreeRTOS/Demo/RISC-V_RV32_QEMU_VIRT_GCC/FreeRTOSConfig.h

@@ -51,8 +51,13 @@
 #define configUSE_TICK_HOOK				1
 #define configCPU_CLOCK_HZ				( ( unsigned long ) 25000000 )
 #define configTICK_RATE_HZ				( ( TickType_t ) 1000 )
+#if __riscv_xlen == 64
+#define configMINIMAL_STACK_SIZE		( ( unsigned short ) 240 )
+#define configTOTAL_HEAP_SIZE			( ( size_t ) ( 220 * 1024 ) )
+#else
 #define configMINIMAL_STACK_SIZE		( ( unsigned short ) 120 )
 #define configTOTAL_HEAP_SIZE			( ( size_t ) ( 80 * 1024 ) )
+#endif
 #define configMAX_TASK_NAME_LEN			( 12 )
 #define configUSE_TRACE_FACILITY		1
 #define configUSE_16_BIT_TICKS			0

FreeRTOS/Demo/RISC-V_RV32_QEMU_VIRT_GCC/Readme.md

@@ -2,11 +2,15 @@
 
 ## Requirements
 
-1. GNU RISC-V toolchains (tested on pre-built Sifive GNU Embedded Toolchain — v2020.12.8)
-  - https://www.sifive.com/software
-1. qemu-riscv32-system  (tested on pre-built Sifive QEMU — v2020.08.1)
-  - https://www.sifive.com/software
-1. Linux OS (tested on Ubuntu 20.04.3 LTS)
+1. GNU RISC-V toolchains Tested on:
+  * Pre-built Sifive GNU Embedded Toolchain — v3.0.4 - https://www.sifive.com/software
+  * Self built from https://github.com/riscv-collab/riscv-gnu-toolchain/tree/a33dac0251d17a7b74d99bd8fd401bfce87d2aed (tag: 2025.01.20)
+
+1. qemu-riscv64-system. Tested on:
+  * pre-built Sifive QEMU — v3.0.4 - https://www.sifive.com/software
+  * qemu-system-riscv64 v 8.2.2
+1. Linux OS. Tested on:
+  * Ubuntu 24.04 LTS
 
 
 ## How to build
@@ -35,16 +39,31 @@ To clean build artifacts:
 $ make -C build/gcc/ clean
 ```
 
+For any of the previous configurations, if you want to use the port on a RVA23 system instead of a RV32, you may append append `RVA23=1`
+
+```
+$ make -C build/gcc/ RVA23=1
+```
+
 If the build was successful, the RTOSDemo.elf executable will be located in the build/gcc/output directory.
 
 
 ## How to run
 
+For the RV32 build:
+
+```
+$ qemu-system-riscv32 -nographic -machine virt -net none -chardev stdio,id=con,mux=on \
+    -serial chardev:con -mon chardev=con,mode=readline -bios none -smp 4 \
+    -s --kernel build/gcc/output/RTOSDemo.elf
+```
+
+For the RVA23 build:
+
 ```
-$ qemu-system-riscv32 -nographic -machine virt -net none \
-  -chardev stdio,id=con,mux=on -serial chardev:con \
-  -mon chardev=con,mode=readline -bios none \
-  -smp 4 -kernel ./build/gcc/output/RTOSDemo.elf
+$ qemu-system-riscv64 -nographic -machine virt -net none -chardev stdio,id=con,mux=on \
+    -serial chardev:con -mon chardev=con,mode=readline -bios none -smp 4 \
+    -s --kernel build/gcc/output/RTOSDemo.elf
 ```
 
 

FreeRTOS/Demo/RISC-V_RV32_QEMU_VIRT_GCC/build/gcc/Makefile

@@ -13,24 +13,39 @@ MAKE = make
 GCC_VERSION = $(shell $(CC) --version | grep ^$(CC) | sed 's/^.* //g' | awk -F. '{ printf("%d%02d%02d"), $$1, $$2, $$3 }')
 GCC_VERSION_NEED_ZICSR = "110100"
 
+ifeq ($(RVA23),1)
+  # For the time being, we don't include the vector extensions.
+  MARCH = rv64imafdc_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa_zicclsm_za64rs_zihintpause_zic64b_zicbom_zicbop_zicboz_zfhmin_zkt_zihintntl_zawrs
+  MABI = lp64d
+  MCMODEL = medany
+  CFLAGS+=-DconfigENABLE_FPU=1
+  $(info  Using RVA23 build)
+else
+  ifeq ($(shell test $(GCC_VERSION) -ge $(GCC_VERSION_NEED_ZICSR) && echo true),true)
+    MARCH=rv32imac_zicsr
+  else
+    MARCH=rv32imac
+  endif
+  MABI=ilp32
+  MCMODEL=medlow
+  $(info  Using RV32 build)
+endif
+
+INCLUDE_DIRS += -I$(KERNEL_PORT_DIR)/chip_specific_extensions/RV32I_CLINT_no_extensions
+
 CFLAGS += $(INCLUDE_DIRS) -fmessage-length=0 \
-          -mabi=ilp32 -mcmodel=medlow -ffunction-sections -fdata-sections \
+          -march=$(MARCH) -mabi=$(MABI) -mcmodel=$(MCMODEL) -ffunction-sections -fdata-sections \
           -Wno-unused-parameter -nostartfiles -g3 -Os
 
-ifeq ($(shell test $(GCC_VERSION) -ge $(GCC_VERSION_NEED_ZICSR) && echo true),true)
-    CFLAGS += -march=rv32imac_zicsr
-else
-    CFLAGS += -march=rv32imac
-endif
-          
+
 ifeq ($(PICOLIBC),1)
-CFLAGS += --specs=picolibc.specs -DPICOLIBC_INTEGER_PRINTF_SCANF 
+CFLAGS += --specs=picolibc.specs -DPICOLIBC_INTEGER_PRINTF_SCANF
 else
 CFLAGS += --specs=nano.specs -fno-builtin-printf
 endif
 
 LDFLAGS += -nostartfiles -Xlinker --gc-sections -Wl,-Map,$(OUTPUT_DIR)/RTOSDemo.map \
-           -T./fake_rom.ld -march=rv32imac -mabi=ilp32 -mcmodel=medlow -Xlinker \
+           -T./fake_rom.ld -march=$(MARCH) -mabi=$(MABI) -mcmodel=$(MCMODEL) -Xlinker \
            --defsym=__stack_size=350 -Wl,--start-group -Wl,--end-group
 
 ifeq ($(PICOLIBC),1)
@@ -54,8 +69,7 @@ endif
 KERNEL_DIR = $(FREERTOS_ROOT)/Source
 KERNEL_PORT_DIR += $(KERNEL_DIR)/portable/GCC/RISC-V
 INCLUDE_DIRS += -I$(KERNEL_DIR)/include \
-				-I$(KERNEL_PORT_DIR) \
-				-I$(KERNEL_PORT_DIR)/chip_specific_extensions/RV32I_CLINT_no_extensions
+				-I$(KERNEL_PORT_DIR)
 VPATH += $(KERNEL_DIR) $(KERNEL_PORT_DIR) $(KERNEL_DIR)/portable/MemMang
 SOURCE_FILES += $(KERNEL_DIR)/tasks.c
 SOURCE_FILES += $(KERNEL_DIR)/list.c