🐛 Fixing issue with SSMIS models

IFenton · IFenton · commit 509d33357adf · 2026-06-26T11:31:12.000+01:00
diff --git a/icenet_mp/config/model/cnn_null_cnn.yaml b/icenet_mp/config/model/cnn_null_cnn.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.CNNEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.CNNEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.CNNEncoder
 
 processor:
   _target_: icenet_mp.models.processors.NullProcessor
diff --git a/icenet_mp/config/model/cnn_unet_cnn.yaml b/icenet_mp/config/model/cnn_unet_cnn.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.CNNEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.CNNEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.CNNEncoder
 
 processor:
   _target_: icenet_mp.models.processors.UNetProcessor
diff --git a/icenet_mp/config/model/cnn_vit_cnn.yaml b/icenet_mp/config/model/cnn_vit_cnn.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.CNNEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.CNNEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.CNNEncoder
 
 processor:
   _target_: icenet_mp.models.processors.VitProcessor
diff --git a/icenet_mp/config/model/naive_null_naive.yaml b/icenet_mp/config/model/naive_null_naive.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.NaiveLinearEncoder
 
 processor:
   _target_: icenet_mp.models.processors.NullProcessor
diff --git a/icenet_mp/config/model/naive_unet_naive.yaml b/icenet_mp/config/model/naive_unet_naive.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.NaiveLinearEncoder
 
 processor:
   _target_: icenet_mp.models.processors.UNetProcessor
diff --git a/icenet_mp/config/model/naive_vit_naive.yaml b/icenet_mp/config/model/naive_vit_naive.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.NaiveLinearEncoder
 
 processor:
   _target_: icenet_mp.models.processors.VitProcessor
diff --git a/icenet_mp/config/model/piecewise_null_piecewise.yaml b/icenet_mp/config/model/piecewise_null_piecewise.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.PiecewiseEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.PiecewiseEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.PiecewiseEncoder
 
 processor:
   _target_: icenet_mp.models.processors.NullProcessor
diff --git a/icenet_mp/config/model/piecewise_unet_piecewise.yaml b/icenet_mp/config/model/piecewise_unet_piecewise.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.PiecewiseEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.PiecewiseEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.PiecewiseEncoder
 
 processor:
   _target_: icenet_mp.models.processors.UNetProcessor
diff --git a/icenet_mp/config/model/piecewise_vit_piecewise.yaml b/icenet_mp/config/model/piecewise_vit_piecewise.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.PiecewiseEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.PiecewiseEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.PiecewiseEncoder
 
 processor:
   _target_: icenet_mp.models.processors.VitProcessor
diff --git a/icenet_mp/config/model/quick_test.yaml b/icenet_mp/config/model/quick_test.yaml
@@ -10,6 +10,8 @@ encoders:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
   sic-icenet:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.NaiveLinearEncoder
 
 processor:
   _target_: icenet_mp.models.processors.UNetProcessor
diff --git a/icenet_mp/config/model/reproject_unet_naive.yaml b/icenet_mp/config/model/reproject_unet_naive.yaml
@@ -12,6 +12,8 @@ encoders:
     project_to: "sic-icenet"
   sic-icenet:
     _target_: icenet_mp.models.encoders.NaiveLinearEncoder
+  sic-ssmis:
+    _target_: icenet_mp.models.encoders.NaiveLinearEncoder
 
 processor:
   _target_: icenet_mp.models.processors.UNetProcessor
