Missing socfpga_agilex5_vanilla files

[steve-ai-accelerator]

The prescribed build process fails due to missing socfpga_agilex5_vanilla dts and .dtb files. Can you please add them to the repo or provide guidance otherwise?

[radubacrauintel]

Please let me know exactly what commands you are using, so I can reproduce the issue. Thanks!

[steve-ai-accelerator]

Running on Ubuntu 22.04.1
git clone https://github.com/altera-fpga/agilex5-ed-pcie-rp.git
cd agilex5-ed-pcie-rp/src/sw/
. agilex5_dk_a5e065bb32aes1-rped-build.sh <<< (this runs without warnings or errors)
build_setup <<< (this runs without warnings or errors)
bitbake_image (see error details below)

running this command shows no match in the cloned repo
find . -name "socfpga_agilex5_vanilla*"

The logfile (see below "log.do_compile.1860444.txt") shows a fatal error related to the missing dts file:

/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/device-tree/1.0/sources/socfpga_agilex5_socdk.dts:5:10: fatal error: socfpga_agilex5_vanilla.dts: No such file or directory
5 | #include "socfpga_agilex5_vanilla.dts"
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~

log.do_compile.1860444.txt

ERROR: device-tree-1.0-r0 do_compile: Error executing a python function in exec_func_python() autogenerated:

The stack trace of python calls that resulted in this exception/failure was:
File: 'exec_func_python() autogenerated', lineno: 2, function:
0001:
*** 0002:devicetree_do_compile(d)
0003:
File: '/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/poky/meta/classes-recipe/devicetree.bbclass', lineno: 143, function: devicetree_do_compile
0139: if not(os.path.isfile(dtspath)) or not(dts.endswith(".dts") or devicetree_source_is_overlay(dtspath)):
0140: continue # skip non-.dts files and non-overlay files
0141: except:
0142: continue # skip if can't determine if overlay
*** 0143: devicetree_compile(dtspath, includes, d)
0144:}
0145:
0146:devicetree_do_install() {
0147: for DTB_FILE in ls *.dtb *.dtbo; do
File: '/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/poky/meta/classes-recipe/devicetree.bbclass', lineno: 112, function: devicetree_compile
0108: for i in includes:
0109: ppargs.append("-I{0}".format(i))
0110: ppargs += ["-o", "{0}.pp".format(dts), dtspath]
0111: bb.note("Running {0}".format(" ".join(ppargs)))
*** 0112: subprocess.run(ppargs, check = True)
0113:
0114: # determine if the file is an overlay or not (using the preprocessed file)
0115: isoverlay = devicetree_source_is_overlay("{0}.pp".format(dts))
0116:
File: '/usr/lib/python3.10/subprocess.py', lineno: 526, function: run
0522: # We don't call process.wait() as .exit does that for us.
0523: raise
0524: retcode = process.poll()
0525: if check and retcode:
*** 0526: raise CalledProcessError(retcode, process.args,
0527: output=stdout, stderr=stderr)
0528: return CompletedProcess(process.args, retcode, stdout, stderr)
0529:
0530:
Exception: subprocess.CalledProcessError: Command '['gcc', '-E', '-nostdinc', '-undef', '-D__DTS__', '-x', 'assembler-with-cpp', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/bitmain', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/apm', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/altera', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/realtek', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/qcom', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/apple', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/hisilicon', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/allwinner', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/socionext', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/nvidia', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/broadcom', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/sprd', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/airoha', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/tesla', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/amazon', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/rockchip', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/ti', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/intel', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/toshiba', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/device-tree/1.0/sources', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/freescale', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/synaptics', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/exynos', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/mediatek', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/amd', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/actions', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/scripts/dtc/include-prefixes', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/nuvoton', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/microchip', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/amlogic', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/lg', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/arm', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/marvell', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/cavium', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/renesas', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/xilinx', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts', '-I/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/st', '-o', 'socfpga_agilex5_socdk.dts.pp', '/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/device-tree/1.0/sources/socfpga_agilex5_socdk.dts']' returned non-zero exit status 1.

ERROR: Logfile of failure stored in: /home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/device-tree/1.0/temp/log.do_compile.1860444
ERROR: Task (/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/meta-intel-fpga-refdes/recipes-bsp/device-tree/device-tree.bb:do_compile) failed with exit code '1'
NOTE: Tasks Summary: Attempted 5987 tasks of which 0 didn't need to be rerun and 1 failed.

Summary: 1 task failed:
/home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/meta-intel-fpga-refdes/recipes-bsp/device-tree/device-tree.bb:do_compile
log: /home/my_user/ghrd/agilex5-ed-pcie-rp/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/device-tree/1.0/temp/log.do_compile.1860444
Summary: There were 21 WARNING messages.
Summary: There was 1 ERROR message, returning a non-zero exit code.

[INFO] Proceed with: package

[radubacrauintel]

Hi Steve,

I am not familiar with the https://github.com/altera-fpga/agilex5-ed-pcie-rp.git repo. Let me find the responsible team, and get back to you.

Thank you,
Radu

[kelvinvkenkah]

Hi Steve,
Do you change any config ?
I will do a recompile on my side too.

[steve-ai-accelerator]

I didn't change anything. I ran the build flow as-is using commands listed above. Could there be a broken symbolic link?

[kelvinvkenkah]

I have complete recompilation, I don't see the error. I don't think is cause by broken symbolic link.
Please make sure you have the required packages to build.
https://docs.yoctoproject.org/ref-manual/system-requirements.html#required-packages-for-the-build-host

[steve-ai-accelerator]

I have all of the required packages.

The file socfpga_agilex5_socdk.dts has a #include for the vanilla file: socfpga_agilex5_vanilla.dts

// SPDX-License-Identifier: GPL-2.0
/*

• Copyright (C) 2024, Intel Corporation
  */
  #include "socfpga_agilex5_vanilla.dts"
  #include "socfpga_agilex5_ghrd.dtsi"
  #include "socfpga_agilex5_pcie_root_port.dtsi"

&pcie_0_pcie_aglx {
status = "okay";
};

&pcie_0_msi_irq {
status = "okay";
};

If you do a find command in the project directory structure, the other two dtsi files are present but the socfpga_agilex5_vanilla.dts is not present.

find . -name socfpga_agilex5_ghrd.dtsi
./src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/device-tree/1.0/archiver-sources/aarch64-poky-linux/device-tree-1.0-r0/socfpga_agilex5_ghrd.dtsi
./src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/device-tree/1.0/sources/socfpga_agilex5_ghrd.dtsi
./src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/deploy/sources/aarch64-poky-linux/device-tree-1.0-r0/socfpga_agilex5_ghrd.dtsi
./src/sw/meta-intel-fpga-refdes/recipes-bsp/device-tree/files/socfpga_agilex5_ghrd.dtsi

find . -name socfpga_agilex5_pcie_root_port.dtsi
./src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work-shared/agilex5_dk_a5e065bb32aes1/kernel-source/arch/arm64/boot/dts/intel/socfpga_agilex5_pcie_root_port.dtsi

find . -name socfpga_agilex5_vanilla.dts

[steve-ai-accelerator]

To re-iterate - there are no error or warning messages in the build flow about any missing packages of any kind.

If you clone the github project, do you find socfpga_agilex5_vanilla.dts in the directory structure? Is it supposed to be dynamically built as part of the flow?

git clone https://github.com/altera-fpga/agilex5-ed-pcie-rp.git
cd agilex5-ed-pcie-rp/src/sw/
. agilex5_dk_a5e065bb32aes1-rped-build.sh <<< (this runs without warnings or errors)
build_setup <<< (this runs without warnings or errors)
bitbake_image (see error details below)

[steve-ai-accelerator]

/home/my_user/PremDevKit/PCIeGen3RootPortDesignExample/agilex5-ed-pcie-rp/src/sw/agilex5_dk_a5e065bb32aes1-rped-rootfs/tmp/work/agilex5_dk_a5e065bb32aes1-poky-linux/device-tree/1.0/sources/socfpga_agilex5_socdk.dts:5:10: fatal error: socfpga_agilex5_vanilla.dts: No such file or directory
5 | #include "socfpga_agilex5_vanilla.dts"
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[davidhuwyler]

Hi Steve.
The _vanilla.dts is generated by the yocto build flow. Its a copy of the socfpga_agilex5.dts. See the yocto recipe: device-tree.bb. I guess your yocto setup is not working correctly?
Hope this helps.

Dave