linux/arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-userspace.dts at 722fc2819170f9e12611fdb9ef0995580b6db0dc · analogdevicesinc/linux · GitHub

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// SPDX-License-Identifier: GPL-2.0
/*
 * AD9361-Z7035 System on Module (SOM) SDR - Userspace Portable Radio Reference Design
 * Link: https://www.analog.com/ADRV9361-Z7035
 * Link: https://wiki.analog.com/resources/eval/user-guides/adrv936x_rfsom
 * Link: https://wiki.analog.com/resources/eval/user-guides/pzsdr/carriers/portable-radio-reference-design/features
 *
 * hdl_project: <adrv9361z7035/ccfmc_lvds>
 * board_revision: <>
 *
 * Copyright 2015-2019 Analog Devices Inc.
 */
/dts-v1/;
#include "zynq.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Analog Devices ADRV9361-Z7035";
	memory {
		device_type = "memory";
		reg = <0x00000000 0x40000000>;
	};

	chosen {
		stdout-path = "/amba@0/uart@E0001000";
	};

	clocks {
		usb_ulpi_fixed_clk: clock@1 {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
			clock-output-names = "24MHz";
		};

		usb_ulpi_clk: clock@2 {
			compatible = "gpio-gate-clock";
			clocks = <&usb_ulpi_fixed_clk>;
			#clock-cells = <0>;
			enable-gpios = <&gpio0 9 1>; /* Active  Low */
		};
	};
};

&gem0 {
	phy-handle = <&phy0>;
	phy-mode = "rgmii-id";

	phy0: phy@0 {
		device_type = "ethernet-phy";
		reg = <0x0>;
		marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;
	};
};

&usb0 {
	xlnx,phy-reset-gpio = <&gpio0 7 GPIO_ACTIVE_LOW>;
};

&qspi {
	status = "okay";
	is-dual = <0>;
	num-cs = <1>;
	primary_flash: ps7-qspi@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		compatible = "n25q128a11", "jedec,spi-nor"; /* same as S25FL128 */
		reg = <0x0>;
		spi-max-frequency = <50000000>;
		partition@0 {
			label = "boot";
			reg = <0x00000000 0x00500000>;
		};
		partition@500000 {
			label = "bootenv";
			reg = <0x00500000 0x00020000>;
		};
		partition@520000 {
			label = "config";
			reg = <0x00520000 0x00020000>;
		};
		partition@540000 {
			label = "image";
			reg = <0x00540000 0x00a80000>;
		};
		partition@fc0000 {
			label = "spare";
			reg = <0x00fc0000 0x00000000>;
		};
	};
};

&sdhci0 {
	status = "okay";
	disable-wp;
};

/ {
	fpga_axi: fpga-axi@0 {
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		i2c@41600000 {
			compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";
			reg = <0x41600000 0x10000>;
			interrupt-parent = <&intc>;
			interrupts = <0 58 4>;
			clocks = <&clkc 15>;
			clock-names = "pclk";

			#address-cells = <1>;
			#size-cells = <0>;

			adm1166: adm1166@68 {
				compatible = "adi,adm1166";
				reg = <0x68>;
			};
		};

		ad9361_rx@79020000 {
			compatible = "dmem-uio";
			reg = <0x79020000 0x6000>;
		};

		ad9361_tx@79024000 {
			compatible = "dmem-uio";
			reg = <0x79024000 0x2000>;
		};

		rx_dma@7c400000 {
			compatible = "dmem-uio";
			reg = <0x7c400000 0x10000>;
			uio,number-of-dynamic-regions = <1>;
			uio,dynamic-regions-sizes = <262144>;
		};

		tx_dma@7c420000 {
			compatible = "dmem-uio";
			reg = <0x7c420000 0x10000>;
			uio,number-of-dynamic-regions = <1>;
			uio,dynamic-regions-sizes = <262144>;
		};
	};
};

&spi0 {
	status = "okay";

	spi@0 {
		compatible = "adi,swspi";
		spi-cpha;
		reg = <0x0>;
		spi-max-frequency = <1000000>;
	};
};