iio: adc: ad4630: Set proper data width for AD4630/AD4632-20

Using a larger data width made SPI transfers run 4 additional bits which
caused the capture data to be shifted by 4 bits. Use the correct data width
for 20-bit precision ADCs, making SPI transfers run 20 SCLK pulses per
transfer which in turn will make the controller gather only the expected
data bits to the sample buffer.

Fixes: 299dc60 ("iio: adc: ad4630: Add support for AD4630-20 and AD4632-20")
Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
(cherry picked from commit dfb6a9f)

Author: machschmitt

drivers/iio/adc/ad4630.c

@@ -856,7 +856,7 @@ static const struct ad4630_out_mode ad4630_20_modes[] = {
 			AD4630_CHAN(0, AD4630_CHAN_INFO_NONE, 32, 20, 0, AD4630_CHAN_INFO_NONE),
 			AD4630_CHAN(1, AD4630_CHAN_INFO_NONE, 32, 20, 0, AD4630_CHAN_INFO_NONE),
 		},
-		.data_width = 24,
+		.data_width = 20,
 	},
 	[AD4630_16_DIFF_8_COM] = {
 		.channels = {