From f14f354de0622e77c79ad61118fb53d9dda81428 Mon Sep 17 00:00:00 2001 From: AndrDragomir Date: Thu, 13 Nov 2025 18:37:47 +0200 Subject: [PATCH 1/3] firmware: Update ActiveUseCase_NLS.profile for RX_M=8 New profile for adrv9025 in JESD204B NLS mode that enables all RX channels Signed-off-by: AndrDragomir --- firmware/ActiveUseCase_NLS.profile | 383 ++++++++++++++--------------- 1 file changed, 191 insertions(+), 192 deletions(-) diff --git a/firmware/ActiveUseCase_NLS.profile b/firmware/ActiveUseCase_NLS.profile index 08a6e298f73aec..4fcadcb5835084 100644 --- a/firmware/ActiveUseCase_NLS.profile +++ b/firmware/ActiveUseCase_NLS.profile @@ -13,10 +13,10 @@ "conv1": 0, "conv2": 3, "conv3": 2, - "conv4": 127, - "conv5": 127, - "conv6": 127, - "conv7": 127, + "conv4": 5, + "conv5": 4, + "conv6": 7, + "conv7": 6, "conv8": 127, "conv9": 127, "conv10": 127, @@ -38,9 +38,9 @@ "bankId": 0, "deviceId": 0, "lane0Id": 0, - "jesd204M": 4, + "jesd204M": 8, "jesd204K": 32, - "jesd204F": 4, + "jesd204F": 8, "jesd204Np": 16, "jesd204E": 0, "scramble": 1, @@ -188,7 +188,7 @@ "deserializerLanesEnabled": 15, "lmfcOffset": 0, "syncbOutSelect": 0, - "syncbOutLvdsMode": 1, + "syncbOutLvdsMode": 0, "syncbOutLvdsPnInvert": 0, "syncbOutCmosSlewRate": 0, "syncbOutCmosDriveLevel": 0, @@ -402,37 +402,37 @@ "rhb3Decimation": 1, "rxFir1Decimation": 1, "rxFir2Decimation": 1, - "rxOutputRate_kHz": 245760, - "rfBandwidth_kHz": 60000, - "rxBbf3dBCorner_kHz": 60000, - "rxAdcBandWidth_kHz": 30000, + "rxOutputRate_kHz": 122880, + "rfBandwidth_kHz": 200000, + "rxBbf3dBCorner_kHz": 200000, + "rxAdcBandWidth_kHz": 100000, "rxFir": { - "gain_dB": 0, + "gain_dB": 6, "numFirCoefs": 24, "coefs": [ - 11, - -78, - 245, - -419, - 264, - 518, - -1562, - 1556, - 886, - -5552, - 8439, - 24149, - 8439, - -5552, - 886, - 1556, - -1562, - 518, - 264, - -419, - 245, - -78, - 11, + 1, + -2, + 3, + -4, + 6, + -6, + 5, + 2, + -22, + 88, + -500, + 17244, + -500, + 88, + -22, + 2, + 5, + -6, + 6, + -4, + 3, + -2, + 1, 0, 0, 0, @@ -484,7 +484,7 @@ 0 ] }, - "rxDdcMode": 0, + "rxDdcMode": 3, "rxNcoShifterCfg": { "bandAInputBandWidth_kHz": 0, "bandAInputCenterFreq_kHz": 0, @@ -550,37 +550,37 @@ "rhb3Decimation": 1, "rxFir1Decimation": 1, "rxFir2Decimation": 1, - "rxOutputRate_kHz": 245760, - "rfBandwidth_kHz": 60000, - "rxBbf3dBCorner_kHz": 60000, - "rxAdcBandWidth_kHz": 30000, + "rxOutputRate_kHz": 122880, + "rfBandwidth_kHz": 200000, + "rxBbf3dBCorner_kHz": 200000, + "rxAdcBandWidth_kHz": 100000, "rxFir": { - "gain_dB": 0, + "gain_dB": 6, "numFirCoefs": 24, "coefs": [ - 11, - -78, - 245, - -419, - 264, - 518, - -1562, - 1556, - 886, - -5552, - 8439, - 24149, - 8439, - -5552, - 886, - 1556, - -1562, - 518, - 264, - -419, - 245, - -78, - 11, + 1, + -2, + 3, + -4, + 6, + -6, + 5, + 2, + -22, + 88, + -500, + 17244, + -500, + 88, + -22, + 2, + 5, + -6, + 6, + -4, + 3, + -2, + 1, 0, 0, 0, @@ -632,7 +632,7 @@ 0 ] }, - "rxDdcMode": 0, + "rxDdcMode": 3, "rxNcoShifterCfg": { "bandAInputBandWidth_kHz": 0, "bandAInputCenterFreq_kHz": 0, @@ -698,37 +698,37 @@ "rhb3Decimation": 1, "rxFir1Decimation": 1, "rxFir2Decimation": 1, - "rxOutputRate_kHz": 245760, - "rfBandwidth_kHz": 60000, - "rxBbf3dBCorner_kHz": 60000, - "rxAdcBandWidth_kHz": 30000, + "rxOutputRate_kHz": 122880, + "rfBandwidth_kHz": 200000, + "rxBbf3dBCorner_kHz": 200000, + "rxAdcBandWidth_kHz": 100000, "rxFir": { - "gain_dB": 0, + "gain_dB": 6, "numFirCoefs": 24, "coefs": [ - 11, - -78, - 245, - -419, - 264, - 518, - -1562, - 1556, - 886, - -5552, - 8439, - 24149, - 8439, - -5552, - 886, - 1556, - -1562, - 518, - 264, - -419, - 245, - -78, - 11, + 1, + -2, + 3, + -4, + 6, + -6, + 5, + 2, + -22, + 88, + -500, + 17244, + -500, + 88, + -22, + 2, + 5, + -6, + 6, + -4, + 3, + -2, + 1, 0, 0, 0, @@ -780,7 +780,7 @@ 0 ] }, - "rxDdcMode": 0, + "rxDdcMode": 3, "rxNcoShifterCfg": { "bandAInputBandWidth_kHz": 0, "bandAInputCenterFreq_kHz": 0, @@ -846,37 +846,37 @@ "rhb3Decimation": 1, "rxFir1Decimation": 1, "rxFir2Decimation": 1, - "rxOutputRate_kHz": 245760, - "rfBandwidth_kHz": 60000, - "rxBbf3dBCorner_kHz": 60000, - "rxAdcBandWidth_kHz": 30000, + "rxOutputRate_kHz": 122880, + "rfBandwidth_kHz": 200000, + "rxBbf3dBCorner_kHz": 200000, + "rxAdcBandWidth_kHz": 100000, "rxFir": { - "gain_dB": 0, + "gain_dB": 6, "numFirCoefs": 24, "coefs": [ - 11, - -78, - 245, - -419, - 264, - 518, - -1562, - 1556, - 886, - -5552, - 8439, - 24149, - 8439, - -5552, - 886, - 1556, - -1562, - 518, - 264, - -419, - 245, - -78, - 11, + 1, + -2, + 3, + -4, + 6, + -6, + 5, + 2, + -22, + 88, + -500, + 17244, + -500, + 88, + -22, + 2, + 5, + -6, + 6, + -4, + 3, + -2, + 1, 0, 0, 0, @@ -928,7 +928,7 @@ 0 ] }, - "rxDdcMode": 0, + "rxDdcMode": 3, "rxNcoShifterCfg": { "bandAInputBandWidth_kHz": 0, "bandAInputCenterFreq_kHz": 0, @@ -1879,7 +1879,7 @@ { "profile": { "txInputRate_kHz": 245760, - "primarySigBandwidth_kHz": 120000, + "primarySigBandwidth_kHz": 100000, "rfBandwidth_kHz": 450000, "txDac3dBCorner_kHz": 450000, "txBbf3dBCorner_kHz": 225000, @@ -1991,7 +1991,7 @@ { "profile": { "txInputRate_kHz": 245760, - "primarySigBandwidth_kHz": 120000, + "primarySigBandwidth_kHz": 100000, "rfBandwidth_kHz": 450000, "txDac3dBCorner_kHz": 450000, "txBbf3dBCorner_kHz": 225000, @@ -2103,7 +2103,7 @@ { "profile": { "txInputRate_kHz": 245760, - "primarySigBandwidth_kHz": 120000, + "primarySigBandwidth_kHz": 100000, "rfBandwidth_kHz": 450000, "txDac3dBCorner_kHz": 450000, "txBbf3dBCorner_kHz": 225000, @@ -2215,7 +2215,7 @@ { "profile": { "txInputRate_kHz": 245760, - "primarySigBandwidth_kHz": 120000, + "primarySigBandwidth_kHz": 100000, "rfBandwidth_kHz": 450000, "txDac3dBCorner_kHz": 450000, "txBbf3dBCorner_kHz": 225000, @@ -2330,25 +2330,25 @@ "RxChannel1": [ 386, 273, - 500, - 320, - 7, - 591, - 308, - 120, - 25, - 210, + 505, + 512, + 10, + 294, + 153, + 96, + 40, + 148, 132, 1, 10, - 48, + 16, + 0, 0, + 16, 0, - 32, 0, 0, 0, - 13, 128, 7, 7, @@ -2358,14 +2358,14 @@ 7, 7, 7, - 7, - 7, + 1, + 2, 0, 7, - 13, - 13, + 4, 0, - 13, + 0, + 4, 0, 12, 0, @@ -2388,25 +2388,25 @@ "RxChannel2": [ 386, 273, - 500, - 320, - 7, - 591, - 308, - 120, - 25, - 210, + 505, + 512, + 10, + 294, + 153, + 96, + 40, + 148, 132, 1, 10, - 48, + 16, 0, 0, - 32, + 16, + 0, 0, 0, 0, - 13, 128, 7, 7, @@ -2416,14 +2416,14 @@ 7, 7, 7, - 7, - 7, + 1, + 2, 0, 7, - 13, - 13, + 4, 0, - 13, + 0, + 4, 0, 12, 0, @@ -2446,25 +2446,25 @@ "RxChannel3": [ 386, 273, - 500, - 320, - 7, - 591, - 308, - 120, - 25, - 210, + 505, + 512, + 10, + 294, + 153, + 96, + 40, + 148, 132, 1, 10, - 48, + 16, 0, 0, - 32, + 16, + 0, 0, 0, 0, - 13, 128, 7, 7, @@ -2474,14 +2474,14 @@ 7, 7, 7, - 7, - 7, + 1, + 2, 0, 7, - 13, - 13, + 4, + 0, 0, - 13, + 4, 0, 12, 0, @@ -2504,25 +2504,25 @@ "RxChannel4": [ 386, 273, - 500, - 320, - 7, - 591, - 308, - 120, - 25, - 210, + 505, + 512, + 10, + 294, + 153, + 96, + 40, + 148, 132, 1, 10, - 48, + 16, + 0, 0, + 16, 0, - 32, 0, 0, 0, - 13, 128, 7, 7, @@ -2532,14 +2532,14 @@ 7, 7, 7, - 7, - 7, + 1, + 2, 0, 7, - 13, - 13, + 4, 0, - 13, + 0, + 4, 0, 12, 0, @@ -3027,4 +3027,3 @@ "OrxChannel2Index": 0 } } - From 385b2fda16eaefcd1850aa7e6646245a3cc562e2 Mon Sep 17 00:00:00 2001 From: AndrDragomir Date: Thu, 13 Nov 2025 18:36:37 +0200 Subject: [PATCH 2/3] arm64: dts: zcu102_adrv9025: Update NLS profile RX_M=8 Previous JESD204B NLS profile didn't enable all RX channels. This dts changes are needed for the new NLS profile and don't affect the other profiles. Signed-off-by: AndrDragomir --- .../zynqmp-zcu102-rev10-adrv9025-jesd204c.dts | 15 +++++++++++++++ .../xilinx/zynqmp-zcu102-rev10-adrv9025-nls.dts | 4 ++-- .../dts/xilinx/zynqmp-zcu102-rev10-adrv9025.dts | 10 +++++----- 3 files changed, 22 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025-jesd204c.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025-jesd204c.dts index acd8e0e41077a7..3e472ce825096d 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025-jesd204c.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025-jesd204c.dts @@ -17,6 +17,21 @@ adi,device-profile-name = "ActiveUseCase_204C.profile"; }; +&axi_adrv9025_rx_jesd { + clocks = <&zynqmp_clk 71>, <&axi_rx_clkgen>, <&axi_adrv9025_adxcvr_rx 0>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk"; +}; + +&axi_adrv9025_rx_os_jesd { + clocks = <&zynqmp_clk 71>, <&axi_rx_os_clkgen>, <&axi_adrv9025_adxcvr_rx_os 0>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk"; +}; + +&axi_adrv9025_tx_jesd { + clocks = <&zynqmp_clk 71>, <&axi_tx_clkgen>, <&axi_adrv9025_adxcvr_tx 0>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk"; +}; + &axi_adrv9025_adxcvr_rx { adi,sys-clk-select = ; /delete-property/ adi,use-cpll-enable; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025-nls.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025-nls.dts index b0d647353805a1..d378583afc6611 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025-nls.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025-nls.dts @@ -65,8 +65,8 @@ interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&zynqmp_clk 71>, <&axi_rx_os_clkgen>, <&axi_adrv9025_adxcvr_rx_os 0>; - clock-names = "s_axi_aclk", "device_clk", "lane_clk"; + clocks = <&zynqmp_clk 71>, <&axi_rx_os_clkgen>, <&axi_adrv9025_adxcvr_rx_os 0>, <&axi_adrv9025_adxcvr_rx_os 1>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk", "link_clk"; #clock-cells = <0>; clock-output-names = "jesd_rx_os_lane_clk"; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025.dts index 52bdba5893e40c..37b46ec5875deb 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025.dts @@ -62,7 +62,7 @@ adi,sysref-pattern-mode = ; adi,sysref-k-div = <512>; adi,sysref-nshot-mode = ; - adi,jesd204-desired-sysref-frequency-hz = <3840000>; + adi,jesd204-desired-sysref-frequency-hz = <1920000>; adi,rpole2 = ; adi,rzero = ; @@ -313,8 +313,8 @@ interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&zynqmp_clk 71>, <&axi_rx_clkgen>, <&axi_adrv9025_adxcvr_rx 0>; - clock-names = "s_axi_aclk", "device_clk", "lane_clk"; + clocks = <&zynqmp_clk 71>, <&axi_rx_clkgen>, <&axi_adrv9025_adxcvr_rx 0>, <&axi_adrv9025_adxcvr_rx 1>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk", "link_clk"; #clock-cells = <0>; clock-output-names = "jesd_rx_lane_clk"; @@ -330,8 +330,8 @@ interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&zynqmp_clk 71>, <&axi_tx_clkgen>, <&axi_adrv9025_adxcvr_tx 0>; - clock-names = "s_axi_aclk", "device_clk", "lane_clk"; + clocks = <&zynqmp_clk 71>, <&axi_tx_clkgen>, <&axi_adrv9025_adxcvr_tx 0>, <&axi_adrv9025_adxcvr_tx 1>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk", "link_clk"; #clock-cells = <0>; clock-output-names = "jesd_tx_lane_clk"; From 8ad9e4dc8ecab9d1e1b22bb4566441370d6a005d Mon Sep 17 00:00:00 2001 From: AndrDragomir Date: Thu, 13 Nov 2025 19:31:51 +0200 Subject: [PATCH 3/3] microblaze: dts: vcu118_adrv9025: Update NLS profile RX_M=8 Previous JESD204B NLS profile didn't enable all RX channels. This dts changes are needed for the new NLS profile and don't affect the other profiles. Signed-off-by: AndrDragomir --- arch/microblaze/boot/dts/vcu118_adrv9025.dts | 10 +++++----- arch/microblaze/boot/dts/vcu118_adrv9025_nls.dts | 4 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/microblaze/boot/dts/vcu118_adrv9025.dts b/arch/microblaze/boot/dts/vcu118_adrv9025.dts index 07cd8e7abfbb43..ef69f0d0e7cc1e 100644 --- a/arch/microblaze/boot/dts/vcu118_adrv9025.dts +++ b/arch/microblaze/boot/dts/vcu118_adrv9025.dts @@ -104,8 +104,8 @@ interrupt-parent = <&axi_intc>; interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_bus_0>, <&axi_rx_clkgen>, <&axi_adrv9025_adxcvr_rx 0>; - clock-names = "s_axi_aclk", "device_clk", "lane_clk"; + clocks = <&clk_bus_0>, <&axi_rx_clkgen>, <&axi_adrv9025_adxcvr_rx 0>, <&axi_adrv9025_adxcvr_rx 1>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk", "link_clk"; #clock-cells = <0>; clock-output-names = "jesd_rx_lane_clk"; @@ -121,8 +121,8 @@ interrupt-parent = <&axi_intc>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_bus_0>, <&axi_tx_clkgen>, <&axi_adrv9025_adxcvr_tx 0>; - clock-names = "s_axi_aclk", "device_clk", "lane_clk"; + clocks = <&clk_bus_0>, <&axi_tx_clkgen>, <&axi_adrv9025_adxcvr_tx 0>, <&axi_adrv9025_adxcvr_tx 1>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk", "link_clk"; #clock-cells = <0>; clock-output-names = "jesd_tx_lane_clk"; @@ -229,7 +229,7 @@ adi,sysref-pattern-mode = ; adi,sysref-k-div = <512>; adi,sysref-nshot-mode = ; - adi,jesd204-desired-sysref-frequency-hz = <3840000>; + adi,jesd204-desired-sysref-frequency-hz = <1920000>; adi,rpole2 = ; adi,rzero = ; diff --git a/arch/microblaze/boot/dts/vcu118_adrv9025_nls.dts b/arch/microblaze/boot/dts/vcu118_adrv9025_nls.dts index 04d25df6ec9130..fe6f03348dc274 100644 --- a/arch/microblaze/boot/dts/vcu118_adrv9025_nls.dts +++ b/arch/microblaze/boot/dts/vcu118_adrv9025_nls.dts @@ -66,8 +66,8 @@ interrupt-parent = <&axi_intc>; interrupts = <15 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_bus_0>, <&axi_rx_os_clkgen>, <&axi_adrv9025_adxcvr_rx_os 0>; - clock-names = "s_axi_aclk", "device_clk", "lane_clk"; + clocks = <&clk_bus_0>, <&axi_rx_os_clkgen>, <&axi_adrv9025_adxcvr_rx_os 0>, <&axi_adrv9025_adxcvr_rx_os 1>; + clock-names = "s_axi_aclk", "device_clk", "lane_clk", "link_clk"; #clock-cells = <0>; clock-output-names = "jesd_rx_os_lane_clk";