@@ -146,7 +146,9 @@ int MXC_SPI_RevA1_Shutdown(mxc_spi_reva_regs_t *spi)
146146 if (states [spi_num ].req != NULL ) {
147147 //save the request
148148 temp_req = states [spi_num ].req ;
149+ #ifndef __riscv
149150 MXC_FreeLock ((uint32_t * )(uint32_t * )& states [spi_num ].req );
151+ #endif
150152
151153 // Callback if not NULL
152154 if (states [spi_num ].req -> completeCB != NULL ) {
@@ -476,7 +478,9 @@ int MXC_SPI_RevA1_AbortTransmission(mxc_spi_reva_regs_t *spi)
476478
477479 // Unlock this SPI
478480 mxc_spi_reva_req_t * temp = states [spi_num ].req ;
481+ #ifndef __riscv
479482 MXC_FreeLock ((uint32_t * )& states [spi_num ].req );
483+ #endif
480484
481485 // Callback if not NULL
482486 if (temp -> completeCB != NULL ) {
@@ -530,11 +534,11 @@ unsigned int MXC_SPI_RevA1_ReadRXFIFO(mxc_spi_reva_regs_t *spi, unsigned char *b
530534 // or FIFO32 register could result in '01, 00, 03, 02' - depending on the part.
531535 if (bits > 8 ) {
532536 if (len > 3 ) {
533- memcpy (( uint8_t * )(& bytes [count ]), ( void * )( & spi -> fifo32 ), 4 ) ;
537+ * ( uint32_t * )(& bytes [count ]) = spi -> fifo32 ;
534538 len -= 4 ;
535539 count += 4 ;
536540 } else if (len > 1 ) {
537- memcpy (( uint8_t * )(& bytes [count ]), ( void * )( & spi -> fifo16 [0 ]), 2 ) ;
541+ * ( uint16_t * )(& bytes [count ]) = spi -> fifo16 [0 ];
538542 len -= 2 ;
539543 count += 2 ;
540544 }
@@ -593,11 +597,11 @@ unsigned int MXC_SPI_RevA1_WriteTXFIFO(mxc_spi_reva_regs_t *spi, unsigned char *
593597 // result in this message shifted out: '01, 00, 03, 02' - depending on the part.
594598 if (bits > 8 ) {
595599 if (len > 3 ) {
596- memcpy (( void * )( & spi -> fifo32 ), ( uint8_t * )(& bytes [count ]), 4 );
600+ spi -> fifo32 = * ( uint32_t * )(& bytes [count ]);
597601 len -= 4 ;
598602 count += 4 ;
599603 } else if (len > 1 ) {
600- memcpy (( void * )( & spi -> fifo16 [0 ]), ( uint8_t * )( & bytes [count ]), 2 ) ;
604+ spi -> fifo16 [0 ] = (( uint16_t * )bytes ) [count ];
601605 len -= 2 ;
602606 count += 2 ;
603607 }
@@ -843,7 +847,9 @@ uint32_t MXC_SPI_RevA1_TransHandler(mxc_spi_reva_regs_t *spi, mxc_spi_reva_req_t
843847 if ((req -> rxData == NULL ) && (req -> txCnt == tx_length )) {
844848 spi -> inten = 0 ;
845849 int_en = 0 ;
850+ #ifndef __riscv
846851 MXC_FreeLock ((uint32_t * )& states [spi_num ].req );
852+ #endif
847853
848854 // Callback if not NULL
849855 if (states [spi_num ].async && req -> completeCB != NULL ) {
@@ -872,7 +878,9 @@ uint32_t MXC_SPI_RevA1_TransHandler(mxc_spi_reva_regs_t *spi, mxc_spi_reva_req_t
872878 if ((req -> txData == NULL ) && (req -> rxCnt == rx_length )) {
873879 spi -> inten = 0 ;
874880 int_en = 0 ;
881+ #ifndef __riscv
875882 MXC_FreeLock ((uint32_t * )& states [spi_num ].req );
883+ #endif
876884
877885 // Callback if not NULL
878886 if (states [spi_num ].async && req -> completeCB != NULL ) {
@@ -884,7 +892,9 @@ uint32_t MXC_SPI_RevA1_TransHandler(mxc_spi_reva_regs_t *spi, mxc_spi_reva_req_t
884892 if ((req -> rxCnt == rx_length ) && (req -> txCnt == tx_length )) {
885893 spi -> inten = 0 ;
886894 int_en = 0 ;
895+ #ifndef __riscv
887896 MXC_FreeLock ((uint32_t * )& states [spi_num ].req );
897+ #endif
888898
889899 // Callback if not NULL
890900 if (states [spi_num ].async && req -> completeCB != NULL ) {
@@ -1317,7 +1327,9 @@ void MXC_SPI_RevA1_DMACallback(int ch, int error)
13171327 if (!states [i ].txrx_req || (states [i ].txrx_req && states [i ].req_done == 2 )) {
13181328 //save the request
13191329 temp_req = states [i ].req ;
1330+ #ifndef __riscv
13201331 MXC_FreeLock ((uint32_t * )& states [i ].req );
1332+ #endif
13211333 // Callback if not NULL
13221334 if (temp_req -> completeCB != NULL ) {
13231335 temp_req -> completeCB (temp_req , E_NO_ERROR );
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